1*83d290c5STom Rini// SPDX-License-Identifier: GPL-2.0+ 2e94ffee3SKever Yang/* 3e94ffee3SKever Yang * (C) Copyright 2016 Rockchip Electronics Co., Ltd 4e94ffee3SKever Yang */ 5e94ffee3SKever Yang 6e94ffee3SKever Yang/dts-v1/; 7e94ffee3SKever Yang#include "rk3328.dtsi" 8e94ffee3SKever Yang 9e94ffee3SKever Yang/ { 10e94ffee3SKever Yang model = "Rockchip RK3328 EVB"; 11e94ffee3SKever Yang compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; 12e94ffee3SKever Yang 13e94ffee3SKever Yang chosen { 14e94ffee3SKever Yang stdout-path = &uart2; 15e94ffee3SKever Yang }; 16296bd19eSMeng Dongyang 17c132f38dSDavid Wu gmac_clkin: external-gmac-clock { 18c132f38dSDavid Wu compatible = "fixed-clock"; 19c132f38dSDavid Wu clock-frequency = <125000000>; 20c132f38dSDavid Wu clock-output-names = "gmac_clkin"; 21c132f38dSDavid Wu #clock-cells = <0>; 22c132f38dSDavid Wu }; 23c132f38dSDavid Wu 24df813322SKever Yang vcc3v3_sdmmc: sdmmc-pwren { 25df813322SKever Yang compatible = "regulator-fixed"; 26df813322SKever Yang regulator-name = "vcc3v3"; 27df813322SKever Yang gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; 28df813322SKever Yang regulator-always-on; 29df813322SKever Yang regulator-boot-on; 30df813322SKever Yang }; 31df813322SKever Yang 32863456adSMeng Dongyang vcc5v0_otg: vcc5v0-otg-drv { 33863456adSMeng Dongyang compatible = "regulator-fixed"; 34863456adSMeng Dongyang enable-active-high; 35863456adSMeng Dongyang regulator-name = "vcc5v0_otg"; 36863456adSMeng Dongyang gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; 37863456adSMeng Dongyang regulator-min-microvolt = <5000000>; 38863456adSMeng Dongyang regulator-max-microvolt = <5000000>; 39863456adSMeng Dongyang }; 40863456adSMeng Dongyang 41296bd19eSMeng Dongyang vcc5v0_host_xhci: vcc5v0-host-xhci-drv { 42296bd19eSMeng Dongyang compatible = "regulator-fixed"; 43296bd19eSMeng Dongyang enable-active-high; 44296bd19eSMeng Dongyang regulator-name = "vcc5v0_host_xhci"; 45296bd19eSMeng Dongyang gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; 46296bd19eSMeng Dongyang regulator-min-microvolt = <5000000>; 47296bd19eSMeng Dongyang regulator-max-microvolt = <5000000>; 48296bd19eSMeng Dongyang }; 49c132f38dSDavid Wu 50c132f38dSDavid Wu vcc_phy: vcc-phy-regulator { 51c132f38dSDavid Wu compatible = "regulator-fixed"; 52c132f38dSDavid Wu regulator-name = "vcc_phy"; 53c132f38dSDavid Wu regulator-always-on; 54c132f38dSDavid Wu regulator-boot-on; 55c132f38dSDavid Wu }; 56e94ffee3SKever Yang}; 57e94ffee3SKever Yang 58f957dec6SDavid Wu&saradc { 59f957dec6SDavid Wu status = "okay"; 60f957dec6SDavid Wu}; 61f957dec6SDavid Wu 62e94ffee3SKever Yang&uart2 { 63e94ffee3SKever Yang status = "okay"; 64e94ffee3SKever Yang}; 65e94ffee3SKever Yang 66e94ffee3SKever Yang&sdmmc { 67e94ffee3SKever Yang bus-width = <4>; 68e94ffee3SKever Yang cap-mmc-highspeed; 69e94ffee3SKever Yang cap-sd-highspeed; 70e94ffee3SKever Yang card-detect-delay = <200>; 71e94ffee3SKever Yang disable-wp; 72e94ffee3SKever Yang num-slots = <1>; 73e94ffee3SKever Yang pinctrl-names = "default"; 74e94ffee3SKever Yang pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; 75e94ffee3SKever Yang status = "okay"; 76e94ffee3SKever Yang}; 77e94ffee3SKever Yang 78e94ffee3SKever Yang&emmc { 79e94ffee3SKever Yang bus-width = <8>; 80e94ffee3SKever Yang cap-mmc-highspeed; 81e94ffee3SKever Yang supports-emmc; 82e94ffee3SKever Yang disable-wp; 83e94ffee3SKever Yang non-removable; 84e94ffee3SKever Yang num-slots = <1>; 85e94ffee3SKever Yang pinctrl-names = "default"; 86e94ffee3SKever Yang pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 87e94ffee3SKever Yang status = "okay"; 88e94ffee3SKever Yang}; 89ef82a0dbSMeng Dongyang 90c132f38dSDavid Wu&gmac2io { 91c132f38dSDavid Wu phy-supply = <&vcc_phy>; 92c132f38dSDavid Wu phy-mode = "rgmii"; 93c132f38dSDavid Wu clock_in_out = "input"; 94c132f38dSDavid Wu snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 95c132f38dSDavid Wu snps,reset-active-low; 96c132f38dSDavid Wu snps,reset-delays-us = <0 10000 50000>; 97c132f38dSDavid Wu assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 98c132f38dSDavid Wu assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 99c132f38dSDavid Wu pinctrl-names = "default"; 100c132f38dSDavid Wu pinctrl-0 = <&rgmiim1_pins>; 101c132f38dSDavid Wu tx_delay = <0x26>; 102c132f38dSDavid Wu rx_delay = <0x11>; 103c132f38dSDavid Wu status = "okay"; 104c132f38dSDavid Wu}; 105c132f38dSDavid Wu 106ef82a0dbSMeng Dongyang&usb_host0_ehci { 107ef82a0dbSMeng Dongyang status = "okay"; 108ef82a0dbSMeng Dongyang}; 109ef82a0dbSMeng Dongyang 110ef82a0dbSMeng Dongyang&usb_host0_ohci { 111ef82a0dbSMeng Dongyang status = "okay"; 112ef82a0dbSMeng Dongyang}; 11375ff918fSMeng Dongyang 114863456adSMeng Dongyang&usb20_otg { 115863456adSMeng Dongyang vbus-supply = <&vcc5v0_otg>; 116863456adSMeng Dongyang status = "okay"; 117863456adSMeng Dongyang}; 118863456adSMeng Dongyang 11975ff918fSMeng Dongyang&usb_host0_xhci { 120296bd19eSMeng Dongyang vbus-supply = <&vcc5v0_host_xhci>; 12175ff918fSMeng Dongyang status = "okay"; 12275ff918fSMeng Dongyang}; 123f9674f5eSElaine Zhang 124f9674f5eSElaine Zhang&i2c1 { 125f9674f5eSElaine Zhang clock-frequency = <400000>; 126f9674f5eSElaine Zhang i2c-scl-rising-time-ns = <168>; 127f9674f5eSElaine Zhang i2c-scl-falling-time-ns = <4>; 128f9674f5eSElaine Zhang status = "okay"; 129f9674f5eSElaine Zhang 130f9674f5eSElaine Zhang rk805: pmic@18 { 131f9674f5eSElaine Zhang compatible = "rockchip,rk805"; 132f9674f5eSElaine Zhang status = "okay"; 133f9674f5eSElaine Zhang reg = <0x18>; 134f9674f5eSElaine Zhang interrupt-parent = <&gpio2>; 135f9674f5eSElaine Zhang interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 136f9674f5eSElaine Zhang pinctrl-names = "default"; 137f9674f5eSElaine Zhang pinctrl-0 = <&pmic_int_l>; 138f9674f5eSElaine Zhang rockchip,system-power-controller; 139f9674f5eSElaine Zhang wakeup-source; 140f9674f5eSElaine Zhang gpio-controller; 141f9674f5eSElaine Zhang #gpio-cells = <2>; 142f9674f5eSElaine Zhang #clock-cells = <1>; 143f9674f5eSElaine Zhang clock-output-names = "xin32k", "rk805-clkout2"; 144f9674f5eSElaine Zhang 145f9674f5eSElaine Zhang regulators { 146f9674f5eSElaine Zhang vdd_logic: DCDC_REG1 { 147f9674f5eSElaine Zhang regulator-name = "vdd_logic"; 148f9674f5eSElaine Zhang regulator-min-microvolt = <712500>; 149f9674f5eSElaine Zhang regulator-max-microvolt = <1450000>; 150f9674f5eSElaine Zhang regulator-ramp-delay = <6001>; 151f9674f5eSElaine Zhang regulator-boot-on; 152f9674f5eSElaine Zhang regulator-always-on; 153f9674f5eSElaine Zhang regulator-state-mem { 154f9674f5eSElaine Zhang regulator-on-in-suspend; 155f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 156f9674f5eSElaine Zhang }; 157f9674f5eSElaine Zhang }; 158f9674f5eSElaine Zhang 159f9674f5eSElaine Zhang vdd_arm: DCDC_REG2 { 160f9674f5eSElaine Zhang regulator-name = "vdd_arm"; 161f9674f5eSElaine Zhang regulator-min-microvolt = <712500>; 162f9674f5eSElaine Zhang regulator-max-microvolt = <1450000>; 163f9674f5eSElaine Zhang regulator-ramp-delay = <6001>; 164f9674f5eSElaine Zhang regulator-boot-on; 165f9674f5eSElaine Zhang regulator-always-on; 166f9674f5eSElaine Zhang regulator-state-mem { 167f9674f5eSElaine Zhang regulator-on-in-suspend; 168f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 169f9674f5eSElaine Zhang }; 170f9674f5eSElaine Zhang }; 171f9674f5eSElaine Zhang 172f9674f5eSElaine Zhang vcc_ddr: DCDC_REG3 { 173f9674f5eSElaine Zhang regulator-name = "vcc_ddr"; 174f9674f5eSElaine Zhang regulator-boot-on; 175f9674f5eSElaine Zhang regulator-always-on; 176f9674f5eSElaine Zhang regulator-state-mem { 177f9674f5eSElaine Zhang regulator-on-in-suspend; 178f9674f5eSElaine Zhang }; 179f9674f5eSElaine Zhang }; 180f9674f5eSElaine Zhang 181f9674f5eSElaine Zhang vcc_io: DCDC_REG4 { 182f9674f5eSElaine Zhang regulator-name = "vcc_io"; 183f9674f5eSElaine Zhang regulator-min-microvolt = <3300000>; 184f9674f5eSElaine Zhang regulator-max-microvolt = <3300000>; 185f9674f5eSElaine Zhang regulator-boot-on; 186f9674f5eSElaine Zhang regulator-always-on; 187f9674f5eSElaine Zhang regulator-state-mem { 188f9674f5eSElaine Zhang regulator-on-in-suspend; 189f9674f5eSElaine Zhang regulator-suspend-microvolt = <3300000>; 190f9674f5eSElaine Zhang }; 191f9674f5eSElaine Zhang }; 192f9674f5eSElaine Zhang 193f9674f5eSElaine Zhang vdd_18: LDO_REG1 { 194f9674f5eSElaine Zhang regulator-name = "vdd_18"; 195f9674f5eSElaine Zhang regulator-min-microvolt = <1800000>; 196f9674f5eSElaine Zhang regulator-max-microvolt = <1800000>; 197f9674f5eSElaine Zhang regulator-boot-on; 198f9674f5eSElaine Zhang regulator-always-on; 199f9674f5eSElaine Zhang regulator-state-mem { 200f9674f5eSElaine Zhang regulator-on-in-suspend; 201f9674f5eSElaine Zhang regulator-suspend-microvolt = <1800000>; 202f9674f5eSElaine Zhang }; 203f9674f5eSElaine Zhang }; 204f9674f5eSElaine Zhang 205f9674f5eSElaine Zhang vcc_18emmc: LDO_REG2 { 206f9674f5eSElaine Zhang regulator-name = "vcc_18emmc"; 207f9674f5eSElaine Zhang regulator-min-microvolt = <1800000>; 208f9674f5eSElaine Zhang regulator-max-microvolt = <1800000>; 209f9674f5eSElaine Zhang regulator-boot-on; 210f9674f5eSElaine Zhang regulator-always-on; 211f9674f5eSElaine Zhang regulator-state-mem { 212f9674f5eSElaine Zhang regulator-on-in-suspend; 213f9674f5eSElaine Zhang regulator-suspend-microvolt = <1800000>; 214f9674f5eSElaine Zhang }; 215f9674f5eSElaine Zhang }; 216f9674f5eSElaine Zhang 217f9674f5eSElaine Zhang vdd_10: LDO_REG3 { 218f9674f5eSElaine Zhang regulator-name = "vdd_10"; 219f9674f5eSElaine Zhang regulator-min-microvolt = <1000000>; 220f9674f5eSElaine Zhang regulator-max-microvolt = <1000000>; 221f9674f5eSElaine Zhang regulator-boot-on; 222f9674f5eSElaine Zhang regulator-always-on; 223f9674f5eSElaine Zhang regulator-state-mem { 224f9674f5eSElaine Zhang regulator-on-in-suspend; 225f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 226f9674f5eSElaine Zhang }; 227f9674f5eSElaine Zhang }; 228f9674f5eSElaine Zhang }; 229f9674f5eSElaine Zhang }; 230f9674f5eSElaine Zhang}; 231f9674f5eSElaine Zhang 232f9674f5eSElaine Zhang&pinctrl { 233f9674f5eSElaine Zhang pmic { 234f9674f5eSElaine Zhang pmic_int_l: pmic-int-l { 235f9674f5eSElaine Zhang rockchip,pins = 236f9674f5eSElaine Zhang <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ 237f9674f5eSElaine Zhang }; 238f9674f5eSElaine Zhang }; 239f9674f5eSElaine Zhang}; 240f9674f5eSElaine Zhang 241