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/openbmc/linux/arch/m68k/ifpsp060/
H A DCHANGES3 M68000 Hi-Performance Microprocessor Division
5 Production Release P1.00 -- October 10, 1994
17 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21 Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
26 No licenses are granted by implication, estoppel or otherwise under any patents
31 ---------------------------
42 mode was pre-decrement or post-increment and the address register
49 ---------
50 If {i,d}mem_{read,write}_{byte,word,long}() returns
56 -------
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-prodikeys7 that the pc-midi keyboard will output.midi data.
9 Type: Read/write
16 note held by the pc-midi driver.
19 Type: Read/write
25 Controls the octave shift modifier in the pc-midi driver.
27 0 means the no ocatve shift.
28 Range: -2..2 (minus 2 to plus 2)
29 Type: Read/Write
/openbmc/linux/arch/sparc/mm/
H A Dfault_32.c1 // SPDX-License-Identifier: GPL-2.0
50 printk(KERN_ALERT "tsk->{mm,active_mm}->context = %08lx\n", in unhandled_fault()
51 (tsk->mm ? tsk->mm->context : tsk->active_mm->context)); in unhandled_fault()
52 printk(KERN_ALERT "tsk->{mm,active_mm}->pgd = %08lx\n", in unhandled_fault()
53 (tsk->mm ? (unsigned long) tsk->mm->pgd : in unhandled_fault()
54 (unsigned long) tsk->active_mm->pgd)); in unhandled_fault()
70 tsk->comm, task_pid_nr(tsk), address, in show_signal_msg()
71 (void *)regs->pc, (void *)regs->u_regs[UREG_I7], in show_signal_msg()
72 (void *)regs->u_regs[UREG_FP], code); in show_signal_msg()
74 print_vma_addr(KERN_CONT " in ", regs->pc); in show_signal_msg()
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/openbmc/linux/arch/m68k/kernel/
H A Dtraps.c46 [VEC_RESETPC] = "RESET PC",
136 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */ in access_error060()
138 pr_debug("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr); in access_error060()
141 /* branch prediction error -> clear branch cache */ in access_error060()
146 /* return if there's no other error */ in access_error060()
153 unsigned long addr = fp->un.fmt4.effaddr; in access_error060()
156 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK; in access_error060()
166 do_page_fault(&fp->ptregs, addr, errorcode); in access_error060()
171 send_fault_sig(&fp->ptregs); in access_error060()
173 send_fault_sig(&fp->ptregs) > 0) { in access_error060()
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H A Dhead.S1 /* -*- mode: asm -*-
3 ** head.S -- This file contains the initial boot code for the
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
22 ** Magnum- and FX-alternate ram
25 ** for linux-2.1.115
53 * 1) Remove register dependency through-out the file.
61 * write-ups on the structure of the file, and the features of the
65 * ------------------
74 * actual per-machine specific code very simple.
77 * (the same for all machines) and mapping machine-specific I/O
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/openbmc/linux/arch/s390/kernel/
H A Dmodule.c1 // SPDX-License-Identifier: GPL-2.0+
25 #include <asm/nospec-branch.h>
79 module_memfree(mod->arch.trampolines_start); in module_arch_cleanup()
86 mod->state == MODULE_STATE_LIVE) in module_arch_freeing_init()
89 vfree(mod->arch.syminfo); in module_arch_freeing_init()
90 mod->arch.syminfo = NULL; in module_arch_freeing_init()
97 info = me->arch.syminfo + ELF_R_SYM (rela->r_info); in check_rela()
98 switch (ELF_R_TYPE (rela->r_info)) { in check_rela()
104 case R_390_GOTENT: /* 32 bit PC rel. to GOT entry shifted by 1. */ in check_rela()
111 if (info->got_offset == -1UL) { in check_rela()
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/openbmc/linux/arch/arm/boot/compressed/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2002 Russell King
12 #include "efi-header.S"
20 AR_CLASS( .arch armv7-a )
21 M_CLASS( .arch armv7-m )
101 kputc #'-'
105 kputc #'-'
110 kputc #'-'
145 mcr p15, 0, \reg, c1, c0, 0 @ write SCTLR
154 * in little-endian form.
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/openbmc/qemu/hw/misc/
H A Dpc-testdev.c18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * qemu-system-x86_64 -device pc-testdev -serial stdio \
31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
35 * https://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
58 #define TYPE_TESTDEV "pc-testdev"
77 .write = test_irq_line_write,
89 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit; in test_ioport_write()
90 dev->ioport_data &= ~mask; in test_ioport_write()
91 dev->ioport_data |= data << start_bit; in test_ioport_write()
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/openbmc/linux/arch/arm/mm/
H A Dabort-lv4t.S1 /* SPDX-License-Identifier: GPL-2.0 */
8 * : r4 = aborted context pc
11 * Returns : r4-r5, r9-r11, r13 preserved
15 * abort here if the I-TLB and D-TLB aren't seeing the same
25 mov r0, #0 @ clear r0, r1 (no FSR/FAR)
31 tst r8, #1 << 20 @ L = 1 -> write?
34 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
63 beq do_DataAbort @ no writeback -> no fixup
64 str r9, [sp, #-4]!
76 and r6, r6, #15 @ r6 = no. of registers to transfer.
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/openbmc/u-boot/arch/arm/mach-uniphier/arm32/
H A Dlowlevel_init.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012-2015 Panasonic Corporation
4 * Copyright (C) 2015-2016 Socionext Inc.
49 mov pc, lr @ back to my caller
64 mov r0, #-1 @ manager for all domains (No permission check)
78 mov pc, lr
82 * For PH1-Pro4 or older SoCs, the size of WAY is 32KB.
86 #define BOOT_RAM_BASE ((CONFIG_SPL_STACK) - (BOOT_RAM_SIZE))
119 mov pc, lr
122 #define DEVICE 0x00002002 /* Non-shareable Device */
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/openbmc/linux/drivers/char/
H A Ddtlk.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* -*- linux-c -*-
3 * dtlk.c - DoubleTalk PC driver for Linux
8 * 2000-03-18 Jim Van Zandt: Fix polling.
15 /* This driver is for the DoubleTalk PC, a speech synthesizer
20 The DoubleTalk PC contains four voice synthesizers: text-to-speech
30 DoubleTalk PC implement index markers. Both the TTS and LPC ports
33 The DoubleTalk PC generates no interrupts.
38 "write" sends bytes to the TTS port. It is the responsibility of
40 This driver was written for use with the text-to-speech
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/openbmc/linux/scripts/
H A Dspdxcheck.py2 # SPDX-License-Identifier: GPL-2.0
63 for l in open(el.path, encoding="utf-8").readlines():
64 if l.startswith('Valid-License-Identifier:'):
71 elif l.startswith('SPDX-Exception-Identifier:'):
75 elif l.startswith('SPDX-Licenses:'):
81 elif l.startswith("License-Text:"):
84 … raise SPDXException(el, 'Exception %s is missing SPDX-Licenses' %exception)
105 # Initialize the parser. No debug file and no parser rules stored on disk
114 self.dirdepth = -1
157 r'[A-Za-z.0-9\-+]+'
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/openbmc/u-boot/board/kosagi/novena/
H A Dnovena_spl.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/mx6-ddr.h>
13 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/iomux-v3.h>
18 #include <asm/mach-imx/mxc_i2c.h>
25 #include <asm/arch/mx6-ddr.h>
68 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
132 * Use imx6 internal pull-ups to drive PHY mode pins during PHY reset in novena_spl_setup_iomux_enet()
133 * de-assertion. The intention is to use weak signal drivers (pull-ups) in novena_spl_setup_iomux_enet()
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/openbmc/qemu/linux-user/alpha/
H A Dcpu_loop.c4 * Copyright (c) 2003-2008 Fabrice Bellard
22 #include "user-internals.h"
23 #include "cpu_loop-common.h"
24 #include "signal-common.h"
57 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->pc); in cpu_loop()
60 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_FLTINV, env->pc); in cpu_loop()
63 /* No-op. Linux simply re-enables the FPU. */ in cpu_loop()
66 switch (env->error_code) { in cpu_loop()
75 trapnr = env->ir[IR_V0]; in cpu_loop()
77 env->ir[IR_A0], env->ir[IR_A1], in cpu_loop()
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/openbmc/qemu/
H A Dcpu-common.c2 * CPU thread main loop - common bits for user and system mode emulation
4 * Copyright (c) 2003-2005 Fabrice Bellard
21 #include "qemu/main-loop.h"
22 #include "exec/cpu-common.h"
26 #include "trace/trace-root.h"
67 if (some_cpu->cpu_index >= max_cpu_index) { in cpu_get_free_index()
68 max_cpu_index = some_cpu->cpu_index + 1; in cpu_get_free_index()
87 if (cpu->cpu_index == UNASSIGNED_CPU_INDEX) { in cpu_list_add()
89 cpu->cpu_index = cpu_get_free_index(); in cpu_list_add()
90 assert(cpu->cpu_index != UNASSIGNED_CPU_INDEX); in cpu_list_add()
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/openbmc/qemu/include/exec/
H A Dexec-all.h28 #include "exec/mmu-access-type.h"
29 #include "exec/translation-block.h"
30 #include "qemu/clang-tsa.h"
46 return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; in cpu_loop_exit_requested()
52 * tlb_init - initialize a CPU's TLB
57 * tlb_destroy - destroy a CPU's TLB
78 * When this function returns, no CPUs will subsequently perform
98 * When this function returns, no CPUs will subsequently perform
122 * When this function returns, no CPUs will subsequently perform
145 * When this function returns, no CPUs will subsequently perform
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/openbmc/linux/Documentation/trace/
H A Dmmiotrace.rst2 In-kernel memory-mapped I/O tracing
11 Injection Test Harness. In Dec 2006 - Jan 2007, using the code from Intel,
15 Mmiotrace was built for reverse engineering any memory-mapped IO device with
19 Out-of-tree mmiotrace was originally modified for mainline inclusion and
24 -----------
29 is on-line, therefore mmiotrace takes all but one CPU off-line during run-time
30 activation. You can re-enable CPUs by hand, but you have been warned, there
31 is no way to automatically detect if you are losing events due to CPUs racing.
35 ---------------------
38 $ mount -t debugfs debugfs /sys/kernel/debug
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/openbmc/linux/arch/mips/dec/
H A Dkn01-berr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 * Bits 7:0 of the Control Register are write-only -- the
41 * There is no default value -- it has to be initialized.
70 static const char writestr[] = "write"; in dec_kn01_be_backend()
74 int data = regs->cp0_cause & 4; in dec_kn01_be_backend()
75 unsigned int __user *pc = (unsigned int __user *)regs->cp0_epc + in dec_kn01_be_backend() local
76 ((regs->cp0_cause & CAUSEF_BD) != 0); in dec_kn01_be_backend()
100 __get_user(insn.word, pc); in dec_kn01_be_backend()
101 vaddr = regs->regs[insn.i_format.rs] + in dec_kn01_be_backend()
104 vaddr = (long)pc; in dec_kn01_be_backend()
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/openbmc/linux/arch/alpha/mm/
H A Dfault.c1 // SPDX-License-Identifier: GPL-2.0
48 next_mm->context[smp_processor_id()] = mmc; in __load_new_mm_context()
50 pcb = &current_thread_info()->pcb; in __load_new_mm_context()
51 pcb->asn = mmc & HARDWARE_ASN_MASK; in __load_new_mm_context()
52 pcb->ptbr = ((unsigned long) next_mm->pgd - IDENT_ADDR) >> PAGE_SHIFT; in __load_new_mm_context()
65 * 2 = fault-on-read
66 * 3 = fault-on-execute
67 * 4 = fault-on-write
70 * -1 = instruction fetch
81 (((unsigned long *)regs)[(r) <= 8 ? (r) : (r) <= 15 ? (r)-16 : \
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/openbmc/qemu/contrib/plugins/
H A Dlockstep.c10 * - single-threaded linux-user apps only with non-deterministic syscalls
11 * - no MTTCG enabled system emulation (icount may help)
17 * serial only test cases are a better bet. -d nochain may also help
18 * as well as -accel tcg,one-insn-per-tb=on
24 * SPDX-License-Identifier: GPL-2.0-or-later
35 #include <qemu-plugin.h>
47 uint64_t pc; member
60 uint64_t pc; member
95 g_autoptr(GString) out = g_string_new("No divergence :-)\n"); in plugin_exit()
99 qemu_plugin_outs(out->str); in plugin_exit()
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/openbmc/linux/drivers/ssb/
H A Ddriver_pcicore.c3 * Broadcom PCI-core driver
19 static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address);
20 static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data);
21 static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
22 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
26 u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset) in pcicore_read32() argument
28 return ssb_read32(pc->dev, offset); in pcicore_read32()
32 void pcicore_write32(struct ssb_pcicore *pc, u16 offset, u32 value) in pcicore_write32() argument
34 ssb_write32(pc->dev, offset, value); in pcicore_write32()
38 u16 pcicore_read16(struct ssb_pcicore *pc, u16 offset) in pcicore_read16() argument
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/openbmc/qemu/tests/qemu-iotests/
H A D0514 # Test command line configuration of block devices and driver-specific options
49 if [ "$QEMU_DEFAULT_MACHINE" = "pc" ]; then
57 if ! test -t 0; then
63 ) | $QEMU -nographic -monitor stdio -serial none "$@"
79 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT $size
85 run_qemu -drive file="$TEST_IMG",format=qcow2,unknown_opt=,if=none,id=$device_id
86 run_qemu -drive file="$TEST_IMG",format=qcow2,unknown_opt=on,if=none,id=$device_id
87 run_qemu -drive file="$TEST_IMG",format=qcow2,unknown_opt=1234,if=none,id=$device_id
88 run_qemu -drive file="$TEST_IMG",format=qcow2,unknown_opt=foo,if=none,id=$device_id
94 run_qemu -drive file="$TEST_IMG",format=qcow2,file.unknown_opt=
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/openbmc/linux/arch/microblaze/mm/
H A Dfault.c7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
43 * Check whether the instruction at regs->pc is a store using
50 if (get_user(inst, (unsigned int __user *)regs->pc)) in store_updates_sp()
70 /* MS: no context */ in bad_page_fault()
72 fixup = search_exception_tables(regs->pc); in bad_page_fault()
74 regs->pc = fixup->fixup; in bad_page_fault()
90 struct mm_struct *mm = current->mm; in do_page_fault()
96 regs->ear = address; in do_page_fault()
97 regs->esr = error_code; in do_page_fault()
114 as is current->mm == NULL. */ in do_page_fault()
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/openbmc/linux/arch/alpha/kernel/
H A Dptrace.c1 // SPDX-License-Identifier: GPL-2.0
47 * Processes always block with the following stack-layout:
49 * +================================+ <---- task + 2*PAGE_SIZE
50 * | PALcode saved frame (ps, pc, | ^
65 * which the register is saved. Register indices are 0-31 for integer
66 * regs, 32-63 for fp regs, and 64 for the pc. Notice that sp and
67 * zero have no stack-slot and need to be treated specially (see
75 (PAGE_SIZE*2 - sizeof(struct pt_regs) + offsetof(struct pt_regs, reg))
78 (PAGE_SIZE*2 - sizeof(struct pt_regs) - sizeof(struct switch_stack) \
91 PT_REG( r28), PT_REG( gp), -1, -1,
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/openbmc/qemu/docs/interop/
H A Dfirmware.json1 # -*- Mode: Python -*-
11 # later. See the COPYING file in the top-level directory.
18 'member-name-exceptions': [
25 # Lists the firmware-OS interface types provided by various firmware
32 # 1275-1994 standard. Examples for firmware projects that
35 # @uboot: Firmware interface defined by the U-Boot project.
71 # @aarch64: 64-bit Arm.
73 # @arm: 32-bit Arm.
75 # @i386: 32-bit x86.
77 # @loongarch64: 64-bit LoongArch. (since: 7.1)
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