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/openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dheadc57d.c33 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_or()
34 const int i = head->base.index; in headc57d_or()
41 switch (asyh->or.depth) { in headc57d_or()
47 depth = asyh->or.depth; in headc57d_or()
56 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc57d_or()
57 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc57d_or()
58 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc57d_or()
68 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_procamp()
69 const int i = head->base.index; in headc57d_procamp()
86 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_clr()
[all …]
H A Dhead907d.c39 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in head907d_or()
40 const int i = head->base.index; in head907d_or()
47 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in head907d_or()
48 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in head907d_or()
49 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in head907d_or()
50 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, asyh->or.depth), in head907d_or()
52 HEAD_SET_CONTROL(i), 0x31ec6000 | head->base.index << 25 | in head907d_or()
53 NVVAL(NV907D, HEAD_SET_CONTROL, STRUCTURE, asyh->mode.interlace)); in head907d_or()
60 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in head907d_procamp()
61 const int i = head->base.index; in head907d_procamp()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gpuvm.c1 // SPDX-License-Identifier: MIT
3 * Copyright 2014-2018 Advanced Micro Devices, Inc.
23 #include <linux/dma-buf.h>
72 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]
77 struct kgd_mem *mem) in kfd_mem_is_attached() argument
81 list_for_each_entry(entry, &mem->attachments, list) in kfd_mem_is_attached()
82 if (entry->bo_va->base.vm == avm) in kfd_mem_is_attached()
89 * reuse_dmamap() - Check whether adev can share the original
103 return (adev->ram_is_direct_mapped && bo_adev->ram_is_direct_mapped) || in reuse_dmamap()
104 (adev->dev->iommu_group == bo_adev->dev->iommu_group); in reuse_dmamap()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
H A Dnv50.c32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush() argument
34 struct nv50_bar *bar = nv50_bar(base); in nv50_bar_flush()
35 struct nvkm_device *device = bar->base.subdev.device; in nv50_bar_flush()
37 spin_lock_irqsave(&bar->base.lock, flags); in nv50_bar_flush()
43 spin_unlock_irqrestore(&bar->base.lock, flags); in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm() argument
49 return nv50_bar(base)->bar1_vmm; in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait() argument
55 nvkm_bar_flush(base); in nv50_bar_bar1_wait()
61 nvkm_wr32(bar->subdev.device, 0x001708, 0x00000000); in nv50_bar_bar1_fini()
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/openbmc/linux/drivers/watchdog/
H A Dmenz69_wdt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Watchdog driver for the MEN z069 IP-Core
15 void __iomem *base; member
16 struct resource *mem; member
39 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
41 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
51 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
53 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
64 val = readw(drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
66 writew(val, drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
[all …]
/openbmc/linux/drivers/gpu/drm/ttm/
H A Dttm_bo_util.c1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
41 struct ttm_buffer_object base; member
46 struct ttm_resource *mem) in ttm_mem_io_reserve() argument
48 if (mem->bus.offset || mem->bus.addr) in ttm_mem_io_reserve()
51 mem->bus.is_iomem = false; in ttm_mem_io_reserve()
52 if (!bdev->funcs->io_mem_reserve) in ttm_mem_io_reserve()
55 return bdev->funcs->io_mem_reserve(bdev, mem); in ttm_mem_io_reserve()
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/openbmc/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_stolen.c2 * SPDX-License-Identifier: MIT
4 * Copyright © 2008-2012 Intel Corporation
46 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
47 return -ENODEV; in i915_gem_stolen_insert_node_in_range()
53 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
54 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
57 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
75 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
77 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
82 return (dsm->start != 0 || HAS_LMEMBAR_SMEM_STOLEN(i915)) && dsm->end > dsm->start; in valid_stolen_size()
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/openbmc/linux/drivers/spi/
H A Dspi-sn-f-ospi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/spi/spi-mem.h>
111 void __iomem *base; member
119 if (!op->dummy.nbytes) in f_ospi_get_dummy_cycle()
122 return (op->dummy.nbytes * 8) / op->dummy.buswidth; in f_ospi_get_dummy_cycle()
128 ospi->base + OSPI_IRQ); in f_ospi_clear_irq()
135 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
137 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
144 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
146 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
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H A Dspi-intel.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016 - 2022, Intel Corporation
13 #include <linux/mtd/spi-nor.h>
17 #include <linux/spi/spi-mem.h>
19 #include "spi-intel.h"
21 /* Offsets are from @ispi->base */
60 /* Offset is from @ispi->pregs */
68 /* Offsets are from @ispi->sregs */
140 * struct intel_spi - Driver private data
143 * @base: Beginning of MMIO space
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/openbmc/linux/drivers/net/can/sja1000/
H A Dsja1000_isa.c1 // SPDX-License-Identifier: GPL-2.0-only
24 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
32 static unsigned long mem[MAXDEV]; variable
35 static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
36 static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
37 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
43 module_param_hw_array(mem, ulong, iomem, NULL, 0444);
44 MODULE_PARM_DESC(mem, "I/O memory address");
71 return readb(priv->reg_base + reg); in sja1000_isa_mem_read_reg()
77 writeb(val, priv->reg_base + reg); in sja1000_isa_mem_write_reg()
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/openbmc/linux/drivers/iio/adc/
H A Dmen_z188_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
25 struct resource *mem; member
26 void __iomem *base; member
59 tmp = readw(adc->base + chan->channel * 4); in z188_iio_read_raw()
62 dev_info(&iio_dev->dev, in z188_iio_read_raw()
64 chan->channel); in z188_iio_read_raw()
65 return -EIO; in z188_iio_read_raw()
71 ret = -EINVAL; in z188_iio_read_raw()
105 struct resource *mem; in men_z188_probe() local
108 indio_dev = devm_iio_device_alloc(&dev->dev, sizeof(struct z188_adc)); in men_z188_probe()
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/openbmc/linux/drivers/mcb/
H A Dmcb-lpc.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "mcb-internal.h"
18 struct resource *mem; member
19 void __iomem *base; member
28 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in mcb_lpc_probe()
30 return -ENOMEM; in mcb_lpc_probe()
32 priv->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); in mcb_lpc_probe()
33 if (!priv->mem) { in mcb_lpc_probe()
34 dev_err(&pdev->dev, "No Memory resource\n"); in mcb_lpc_probe()
35 return -ENODEV; in mcb_lpc_probe()
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/openbmc/linux/drivers/pci/controller/
H A Dpci-v3-semi.c1 // SPDX-License-Identifier: GPL-2.0
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
134 /* PCI BASE bits (PCI -> Local Bus) */
141 /* PCI MAP bits (PCI -> Local bus) */
150 /* LB_BASE0,1 bits (Local bus -> PCI) */
172 /* LB_MAP0,1 bits (Local bus -> PCI) */
185 /* LB_BASE2 bits (Local bus -> PCI IO) */
192 /* LB_MAP2 bits (Local bus -> PCI IO) */
229 /* ARM Integrator-specific extended control registers */
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/openbmc/linux/drivers/net/can/cc770/
H A Dcc770_isa.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Bosch CC770 and Intel AN82527 CAN controllers on the ISA or PC-104 bus.
17 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11
32 * Note: for clk, cir, bcr and cor, the first argument re-defines the
35 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000
39 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000,24000000
61 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the ISA bus");
69 static unsigned long mem[MAXDEV]; variable
72 static u8 cir[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
73 static u8 cor[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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/openbmc/linux/arch/arm/mm/
H A Dpmsa-v7.c20 phys_addr_t base; member
25 static struct region __initdata mem[MPU_MAX_REGIONS]; variable
52 /* Data-side / unified region attributes */
66 /* Region base address register */
76 /* Optional instruction-side region attributes */
78 /* I-side Region access control register */
84 /* I-side Region size register */
90 /* I-side Region base address register */
108 /* Data-side / unified region attributes */
126 /* Region base address register */
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/openbmc/qemu/target/rx/
H A Dtranslate.c21 #include "qemu/qemu-print.h"
23 #include "exec/exec-all.h"
24 #include "tcg/tcg-op.h"
25 #include "exec/helper-proto.h"
26 #include "exec/helper-gen.h"
31 #include "exec/helper-info.c.inc"
36 DisasContextBase base; member
60 /* Target-specific values for dc->base.is_jmp. */
80 uint8_t b = translator_ldub(ctx->env, &ctx->base, ctx->base.pc_next++); in decode_load_bytes()
81 insn |= b << (32 - i * 8); in decode_load_bytes()
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/openbmc/linux/kernel/module/
H A Dkdb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * kdb_lsmod - This function implements the 'lsmod' command. Lists
26 if (mod->state == MODULE_STATE_UNFORMED) in kdb_lsmod()
29 kdb_printf("%-20s%8u", mod->name, mod->mem[MOD_TEXT].size); in kdb_lsmod()
30 kdb_printf("/%8u", mod->mem[MOD_RODATA].size); in kdb_lsmod()
31 kdb_printf("/%8u", mod->mem[MOD_RO_AFTER_INIT].size); in kdb_lsmod()
32 kdb_printf("/%8u", mod->mem[MOD_DATA].size); in kdb_lsmod()
38 if (mod->state == MODULE_STATE_GOING) in kdb_lsmod()
40 else if (mod->state == MODULE_STATE_COMING) in kdb_lsmod()
44 kdb_printf(" 0x%px", mod->mem[MOD_TEXT].base); in kdb_lsmod()
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/openbmc/qemu/hw/pci-host/
H A Ddesignware.c29 #include "hw/qdev-properties.h"
32 #include "hw/pci-host/designware.h"
64 return DESIGNWARE_PCIE_HOST(bus->parent); in designware_pcie_root_to_host()
75 * AHB/AXI bus like any other PCI-device-initiated DMA read. in designware_pcie_root_msi_read()
77 * well-behaved guests won't ever ask a PCI device to DMA from in designware_pcie_root_msi_read()
90 root->msi.intr[0].status |= BIT(val) & root->msi.intr[0].enable; in designware_pcie_root_msi_write()
92 if (root->msi.intr[0].status & ~root->msi.intr[0].mask) { in designware_pcie_root_msi_write()
93 qemu_set_irq(host->pci.irqs[DESIGNWARE_PCIE_IRQ_MSI], 1); in designware_pcie_root_msi_write()
110 MemoryRegion *mem = &root->msi.iomem; in designware_pcie_root_update_msi_mapping() local
111 const uint64_t base = root->msi.base; in designware_pcie_root_update_msi_mapping() local
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/openbmc/linux/arch/powerpc/boot/
H A Dcuboot-pq2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Old U-boot compatibility for PowerQUICC II
15 #include "fsl-soc.h"
25 u32 base; /* must be zero */ member
40 /* Different versions of u-boot put the BCSR in different places, and
44 * For any node defined as compatible with fsl,pq2-localbus,
58 if (!bus_node || !dt_is_compatible(bus_node, "fsl,pq2-localbus")) in update_cs_ranges()
80 u32 base, option; in update_cs_ranges() local
85 if (cs_ranges_buf[i].base != 0) in update_cs_ranges()
88 base = in_be32(&ctrl_addr[cs * 2]); in update_cs_ranges()
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/openbmc/linux/drivers/video/
H A Daperture.c1 // SPDX-License-Identifier: MIT
21 * graphics drivers, such as EFI-GOP or VESA, early during the boot process.
23 * hardware-specific driver. To take over the device, the dedicated driver
25 * ownership of framebuffer memory and hand-over between drivers.
32 * .. code-block:: c
36 * struct resource *mem;
37 * resource_size_t base, size;
40 * mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
41 * if (!mem)
42 * return -ENODEV;
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_plane_initial.c1 // SPDX-License-Identifier: MIT
22 for_each_intel_crtc(&i915->drm, crtc) { in intel_reuse_initial_plane_obj()
24 to_intel_crtc_state(crtc->base.state); in intel_reuse_initial_plane_obj()
26 to_intel_plane(crtc->base.primary); in intel_reuse_initial_plane_obj()
28 to_intel_plane_state(plane->base.state); in intel_reuse_initial_plane_obj()
30 if (!crtc_state->uapi.active) in intel_reuse_initial_plane_obj()
33 if (!plane_state->ggtt_vma) in intel_reuse_initial_plane_obj()
36 if (intel_plane_ggtt_offset(plane_state) == plane_config->base) { in intel_reuse_initial_plane_obj()
37 *fb = plane_state->hw.fb; in intel_reuse_initial_plane_obj()
38 *vma = plane_state->ggtt_vma; in intel_reuse_initial_plane_obj()
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/openbmc/linux/drivers/of/
H A Dfdt.c1 // SPDX-License-Identifier: GPL-2.0
36 * of_fdt_limit_memory - limit the number of regions in the /memory node
60 "#address-cells", NULL); in of_fdt_limit_memory()
65 "#size-cells", NULL); in of_fdt_limit_memory()
96 static void *unflatten_dt_alloc(void **mem, unsigned long size, in unflatten_dt_alloc() argument
101 *mem = PTR_ALIGN(*mem, align); in unflatten_dt_alloc()
102 res = *mem; in unflatten_dt_alloc()
103 *mem += size; in unflatten_dt_alloc()
110 void **mem, in populate_properties() argument
119 pprev = &np->properties; in populate_properties()
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fault/
H A Dgv100.c34 struct nvkm_fault_buffer *buffer = fault->buffer[0]; in gv100_fault_buffer_process()
35 struct nvkm_device *device = fault->subdev.device; in gv100_fault_buffer_process()
36 struct nvkm_memory *mem = buffer->mem; in gv100_fault_buffer_process() local
37 u32 get = nvkm_rd32(device, buffer->get); in gv100_fault_buffer_process()
38 u32 put = nvkm_rd32(device, buffer->put); in gv100_fault_buffer_process()
42 nvkm_kmap(mem); in gv100_fault_buffer_process()
44 const u32 base = get * buffer->fault->func->buffer.entry_size; in gv100_fault_buffer_process() local
45 const u32 instlo = nvkm_ro32(mem, base + 0x00); in gv100_fault_buffer_process()
46 const u32 insthi = nvkm_ro32(mem, base + 0x04); in gv100_fault_buffer_process()
47 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process()
[all …]
/openbmc/linux/drivers/net/ethernet/amd/
H A Dsun3lance.c76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base)
111 unsigned short base; /* Low word of base addr */ member
113 unsigned char base_hi; /* High word of base addr (unused) */
119 unsigned short base; /* Low word of base addr */ member
121 unsigned char base_hi; /* High word of base addr (unused) */
128 unsigned short mode; /* Pre-set mode */
131 /* Receive and transmit ring base, along with length bits. */
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/openbmc/linux/drivers/mfd/
H A Dvexpress-sysreg.c1 // SPDX-License-Identifier: GPL-2.0-only
43 .base = -1,
49 .base = -1,
55 .base = -1,
61 .name = "basic-mmio-gpio",
62 .of_compatible = "arm,vexpress-sysreg,sys_led",
68 .name = "basic-mmio-gpio",
69 .of_compatible = "arm,vexpress-sysreg,sys_mci",
75 .name = "basic-mmio-gpio",
76 .of_compatible = "arm,vexpress-sysreg,sys_flash",
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