#
0d67249c |
| 19-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Use tcg_gen_ext_i32
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@li
target/rx: Use tcg_gen_ext_i32
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
b77af26e |
| 13-Sep-2023 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Replace CPUState.env_ptr with cpu_env()
Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
ad75a51e |
| 13-Sep-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@li
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
8b81968c |
| 14-Jul-2023 |
Michael Tokarev <mjt@tls.msk.ru> |
other architectures: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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#
dfd1b812 |
| 23-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Introduce translator_io_start
New wrapper around gen_io_start which takes care of the USE_ICOUNT check, as well as marking the DisasContext to end the TB. Remove exec/gen-icount.h.
Revie
accel/tcg: Introduce translator_io_start
New wrapper around gen_io_start which takes care of the USE_ICOUNT check, as well as marking the DisasContext to end the TB. Remove exec/gen-icount.h.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0 |
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#
d53106c9 |
| 31-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Pass TCGHelperInfo to tcg_gen_callN
In preparation for compiling tcg/ only once, eliminate the all_helpers array. Instantiate the info structs for the generic helpers in accel/tcg/, and the st
tcg: Pass TCGHelperInfo to tcg_gen_callN
In preparation for compiling tcg/ only once, eliminate the all_helpers array. Instantiate the info structs for the generic helpers in accel/tcg/, and the structs for the target-specific helpers in each translate.c.
Since we don't see all of the info structs at startup, initialize at first use, using g_once_init_* to make sure we don't race while doing so.
Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
daefc085 |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Avoid tcg_const_i32
All remaining uses are strictly read-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
09374ee2 |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Avoid tcg_const_i32 when new temp needed
These three cases use a constant as first input, and then overwrite the temp in the output. Separate them.
Reviewed-by: Philippe Mathieu-Daudé <
target/rx: Avoid tcg_const_i32 when new temp needed
These three cases use a constant as first input, and then overwrite the temp in the output. Separate them.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
bb09b540 |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Use cpu_psw_z as temp in flags computation
Since PSW_Z = PSW_S, we can move that assignment to the end and use PSW_Z as a temporary while computing PSW_O. Use tcg_constant_i32 instead of
target/rx: Use cpu_psw_z as temp in flags computation
Since PSW_Z = PSW_S, we can move that assignment to the end and use PSW_Z as a temporary while computing PSW_O. Use tcg_constant_i32 instead of tcg_const_i32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
4b01ff25 |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Use tcg_gen_abs_i32
Remove the local definition of rx_abs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
55ab157b |
| 25-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Drop tcg_temp_free
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@l
target/rx: Drop tcg_temp_free
Translators are no longer required to free tcg temporaries.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
597f9b2d |
| 28-Jan-2023 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Pass max_insn to gen_intermediate_code by pointer
In preparation for returning the number of insns generated via the same pointer. Adjust only the prototypes so far.
Reviewed-by: Philip
accel/tcg: Pass max_insn to gen_intermediate_code by pointer
In preparation for returning the number of insns generated via the same pointer. Adjust only the prototypes so far.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.2.0 |
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#
5439d7a6 |
| 24-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Convert to tcg_ops restore_state_to_opc
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
306c8721 |
| 11-Aug-2022 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Add pc and host_pc params to gen_intermediate_code
Pass these along to translator_loop -- pc may be used instead of tb->pc, and host_pc is currently unused. Adjust all targets at one tim
accel/tcg: Add pc and host_pc params to gen_intermediate_code
Pass these along to translator_loop -- pc may be used instead of tb->pc, and host_pc is currently unused. Adjust all targets at one time.
Acked-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Tested-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.0.0 |
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#
724eaece |
| 17-Apr-2022 |
Tomoaki Kawada <i@yvt.jp> |
target/rx: update PC correctly in wait instruction
`cpu_pc` at this point does not necessary point to the current instruction (i.e., the wait instruction being translated), so it's incorrect to calc
target/rx: update PC correctly in wait instruction
`cpu_pc` at this point does not necessary point to the current instruction (i.e., the wait instruction being translated), so it's incorrect to calculate the new value of `cpu_pc` based on this. It must be updated with `ctx->base.pc_next`, which contains the correct address of the next instruction.
This change fixes the wait instruction skipping the subsequent branch when used in an idle loop like this:
0: wait bra.b 0b brk // should be unreachable
Signed-off-by: Tomoaki Kawada <i@yvt.jp> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220417060224.2131788-1-i@yvt.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
3c69336a |
| 17-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Swap stack pointers on clrpsw/setpsw instruction
We properly perform this swap in helper_set_psw for MVTC, but we missed doing so for the CLRPSW/SETPSW of the U bit.
Reported-by: Tomoaki
target/rx: Swap stack pointers on clrpsw/setpsw instruction
We properly perform this swap in helper_set_psw for MVTC, but we missed doing so for the CLRPSW/SETPSW of the U bit.
Reported-by: Tomoaki Kawada <i@yvt.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220417165130.695085-5-richard.henderson@linaro.org>
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#
d3562fe2 |
| 17-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Move DISAS_UPDATE check for write to PSW
Have one check in move_to_cr instead of one in each function that calls move_to_cr.
Signed-off-by: Richard Henderson <richard.henderson@linaro.or
target/rx: Move DISAS_UPDATE check for write to PSW
Have one check in move_to_cr instead of one in each function that calls move_to_cr.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220417165130.695085-4-richard.henderson@linaro.org>
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#
3626a3fe |
| 17-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Store PSW.U in tb->flags
With this, we don't need movcond to determine which stack pointer is current.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshin
target/rx: Store PSW.U in tb->flags
With this, we don't need movcond to determine which stack pointer is current.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220417165130.695085-3-richard.henderson@linaro.org>
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#
4341631e |
| 17-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Put tb_flags into DisasContext
Copy tb->flags into ctx->tb_flags; we'll want to modify this value throughout the tb in future.
Signed-off-by: Richard Henderson <richard.henderson@linaro.
target/rx: Put tb_flags into DisasContext
Copy tb->flags into ctx->tb_flags; we'll want to modify this value throughout the tb in future.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220417165130.695085-2-richard.henderson@linaro.org>
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#
8eb806a7 |
| 17-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
exec/translator: Pass the locked filepointer to disas_log hook
We have fetched and locked the logfile in translator_loop. Pass the filepointer down to the disas_log hook so that it need not be fetch
exec/translator: Pass the locked filepointer to disas_log hook
We have fetched and locked the logfile in translator_loop. Pass the filepointer down to the disas_log hook so that it need not be fetched and locked again.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220417183019.755276-13-richard.henderson@linaro.org>
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Revision tags: v6.2.0, v6.1.0 |
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#
b6509e35 |
| 19-Jul-2021 |
Richard Henderson <richard.henderson@linaro.org> |
target/rx: Drop checks for singlestep_enabled
GDB single-stepping is now handled generically.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henders
target/rx: Drop checks for singlestep_enabled
GDB single-stepping is now handled generically.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
1d6f147f |
| 26-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210725' into staging The Hexagon target was silently failing the SIGSEGV test because the signal handler was not called.
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20210725' into staging The Hexagon target was silently failing the SIGSEGV test because the signal handler was not called. Patch 1/2 fixes the Hexagon target Patch 2/2 drops include qemu.h from target/hexagon/op_helper.c **** Changes in v2 **** Drop changes to linux-test.c due to intermittent failures on riscv # gpg: Signature made Sun 25 Jul 2021 22:39:38 BST # gpg: using RSA key 7B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422 * remotes/quic/tags/pull-hex-20210725: target/hexagon: Drop include of qemu.h Hexagon (target/hexagon) remove put_user_*/get_user_* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
a146af86 |
| 23-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20210723-pull-request' into staging vga: fixes for qxl and virtio-gpu # gpg: Signature made Fri 23 Jul 2021 06:54:34 BST #
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20210723-pull-request' into staging vga: fixes for qxl and virtio-gpu # gpg: Signature made Fri 23 Jul 2021 06:54:34 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20210723-pull-request: hw/display: fix virgl reset regression vl: add virtio-vga-gl to the default_list hw/display: fail early when multiple virgl devices are requested Revert "qxl: add migration blocker to avoid pre-save assert" qxl: remove assert in qxl_pre_save. hw/display/virtio-gpu: Fix memory leak (CID 1453811) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
7b7ca8eb |
| 22-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging Bugfixes. # gpg: Signature made Thu 22 Jul 2021 14:11:27 BST # gpg: using RSA
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging Bugfixes. # gpg: Signature made Thu 22 Jul 2021 14:11:27 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: configure: Let --without-default-features disable vhost-kernel and vhost-vdpa configure: Fix the default setting of the "xen" feature configure: Allow vnc to get disabled with --without-default-features configure: Fix --without-default-features propagation to meson meson: fix dependencies for modinfo configure: Drop obsolete check for the alloc_size attribute target/i386: Added consistency checks for EFER target/i386: Added consistency checks for CR4 target/i386: Added V_INTR_PRIO check to virtual interrupts qemu-config: restore "machine" in qmp_query_command_line_options() usb: fix usb-host dependency check chardev-spice: add missing module_obj directive vl: Parse legacy default_machine_opts qemu-config: fix memory leak on ferror() qemu-config: never call the callback after an error, fix leak Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
beb19138 |
| 22-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210721' into staging Atomic build fixes for clang-12 Breakpoint reorg # gpg: Signature made Wed 21 Jul 2021 20:5
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210721' into staging Atomic build fixes for clang-12 Breakpoint reorg # gpg: Signature made Wed 21 Jul 2021 20:57:50 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20210721: (27 commits) accel/tcg: Record singlestep_enabled in tb->cflags accel/tcg: Hoist tb_cflags to a local in translator_loop accel/tcg: Remove TranslatorOps.breakpoint_check accel/tcg: Move breakpoint recognition outside translation accel/tcg: Merge tb_find into its only caller target/avr: Implement gdb_adjust_breakpoint hw/core: Introduce CPUClass.gdb_adjust_breakpoint target/i386: Implement debug_check_breakpoint target/arm: Implement debug_check_breakpoint hw/core: Introduce TCGCPUOps.debug_check_breakpoint accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic accel/tcg: Handle -singlestep in curr_cflags accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR target/alpha: Drop goto_tb path in gen_call_pal accel/tcg: Move curr_cflags into cpu-exec.c accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS accel/tcg: Push trace info building into atomic_common.c.inc trace: Fold mem-internal.h into mem.h accel/tcg: Expand ATOMIC_MMU_LOOKUP_* ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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