History log of /openbmc/u-boot/board/armltd/vexpress64/pcie.c (Results 1 – 10 of 10)
Revision Date Author Comments
# 4d6647ab 30-Nov-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx


# 6b29a395 29-Nov-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-mpc85xx


# 88e0d593 22-Nov-2016 Liviu Dudau <Liviu.Dudau@foss.arm.com>

vexpress64: Juno: Change PCI buss addresses for IO to start from zero.

Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more th

vexpress64: Juno: Change PCI buss addresses for IO to start from zero.

Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.

Change the mapping to start IO bus addresses from zero.

Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>

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# f1993ca0 03-Jan-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx


# a85670e4 04-Dec-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx


# c1924d85 30-Nov-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-video


# 80d307d1 22-Nov-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of http://git.denx.de/u-boot-sunxi


# bc8d3bc0 18-Nov-2015 Ryan Harkin <ryan.harkin@linaro.org>

vexpress64: compile Juno PCIe conditionally

Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.

Sig

vexpress64: compile Juno PCIe conditionally

Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

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# 0ee1a22b 13-Nov-2015 Andre Przywara <andre.przywara@arm.com>

Juno: don't print PCI debug information by default

On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to av

Juno: don't print PCI debug information by default

On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>

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# 2fdc9b74 19-Oct-2015 Liviu Dudau <Liviu.Dudau@foss.arm.com>

vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.

Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able

vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.

Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.

Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
[trini: Always declare vexpress64_pcie_init and continue handling logic
inside the function]
Signed-off-by: Tom Rini <trini@konsulko.com>

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