Home
last modified time | relevance | path

Searched full:mailboxes (Results 1 – 25 of 120) sorted by relevance

12345

/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dnvidia,tegra186-hsp.yaml21 The features that HSP supported are shared mailboxes, shared
29 For shared mailboxes, the first cell composed of two fields:
36 TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.
41 For shared mailboxes, the second cell is composed of two fields:
53 mailboxes may vary by instance of the HSP block and SoC
H A Dapple,mailbox.yaml26 ASC mailboxes are the most common variant found on the M1 used
37 M3 mailboxes are an older variant with a slightly different MMIO
H A Dti,omap-mailbox.yaml49 within a SoC. The sub-mailboxes (actual communication channels) are
78 on mailboxes that have multiple interrupt lines connected to the MPU
109 the Tx ticker. Should be used only on sub-mailboxes used to
H A Dmailbox.txt27 users of these mailboxes for IPC, one for each mailbox. This shared
/openbmc/qemu/hw/intc/
H A Dbcm2836_control.c8 * At present, only implements interrupt routing, and mailboxes (i.e.,
124 /* handle mailboxes for this core */ in bcm2836_control_update()
126 if (s->mailboxes[i * BCM2836_MBPERCORE + j] != 0) { in bcm2836_control_update()
267 return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2]; in bcm2836_control_read()
294 s->mailboxes[(offset - REG_MBOX0_WR) >> 2] |= val; in bcm2836_control_write()
296 s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val; in bcm2836_control_write()
332 s->mailboxes[i] = 0; in bcm2836_control_reset()
373 VMSTATE_UINT32_ARRAY(mailboxes, BCM2836ControlState,
/openbmc/linux/drivers/net/can/flexcan/
H A Dflexcan.h47 /* Use mailboxes (not FIFO) for RX path */
63 /* Setup 16 mailboxes */
65 /* Device supports RX via mailboxes */
67 /* Device supports RTR reception via mailboxes */
/openbmc/linux/drivers/mailbox/
H A Dtegra-hsp.c121 struct tegra_hsp_mailbox *mailboxes; member
234 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq()
260 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq()
514 * Shared mailboxes start out as consumers by default. FULL and EMPTY in tegra_hsp_mailbox_startup()
520 * enabled all the time would cause an interrupt storm while mailboxes in tegra_hsp_mailbox_startup()
634 mb = &hsp->mailboxes[index]; in tegra_hsp_sm_xlate()
674 hsp->mailboxes = devm_kcalloc(dev, hsp->num_sm, sizeof(*hsp->mailboxes), in tegra_hsp_add_mailboxes()
676 if (!hsp->mailboxes) in tegra_hsp_add_mailboxes()
680 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; in tegra_hsp_add_mailboxes()
834 dev_err(&pdev->dev, "failed to add mailboxes: %d\n", in tegra_hsp_probe()
[all …]
H A DKconfig7 signals. Say Y if your platform supports hardware mailboxes.
36 which provides unidirectional mailboxes between processing elements.
/openbmc/linux/Documentation/driver-api/rapidio/
H A Drio_cm.rst23 messaging mailboxes in case of multi-packet message (up to 4KB) and
24 up to 64 mailboxes if single-packet messages (up to 256 B) are used. In addition
26 have reduced number of messaging mailboxes. RapidIO aware applications must
95 mailboxes.
/openbmc/linux/include/linux/
H A Dpsp.h15 * Fields and bits used by most PSP mailboxes
17 * Note: Some mailboxes (such as SEV) have extra bits or different meanings
/openbmc/u-boot/drivers/mailbox/
H A DKconfig7 Enable support for the mailbox driver class. Mailboxes provide the
25 implements doorbells, mailboxes, semaphores, and shared interrupts.
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/lockfile-progs/
H A Dlockfile-progs_0.1.19.bb1 SUMMARY = "Command-line programs to safely lock and unlock files and mailboxes"
3 lockfile-progs provide a method to lock and unlock mailboxes and files \
/openbmc/linux/drivers/net/can/
H A Dti_hecc.c36 #define HECC_MAX_MAILBOXES 32 /* hardware mailboxes - do not change */
40 * TX mailboxes should be restricted to the number of SKB buffers to avoid
41 * maintaining SKB buffers separately. TX mailboxes should be a power of 2
43 * and lower mailboxes for TX.
60 * The remaining mailboxes are used for reception and are delivered
366 /* Prepare configured mailboxes to receive messages */ in ti_hecc_start()
409 /* Disable interrupts and disable mailboxes */ in ti_hecc_stop()
446 * The transmit mailboxes start from 0 to HECC_MAX_TX_MBOX. In HECC the
449 * is transmitted first. Only when two mailboxes have the same value in
455 * transmit mailboxes we choose the next priority level (lower) and so on
[all …]
H A Dat91_can.c321 * mailbox is disabled. The next 11 mailboxes are used as a in at91_setup_mailboxes()
343 /* The last 4 mailboxes are used for transmitting. */ in at91_setup_mailboxes()
429 * is the lowest. If two mailboxes have the same priority level the
433 * the next mailbox with prio 0, and so on, until all mailboxes are
505 * at91_activate_rx_low - activate lower rx mailboxes
508 * Reenables the lower mailboxes for reception of new CAN messages
624 * at91_poll_rx - read multiple CAN messages from mailboxes
630 * About 3/4 of the mailboxes (get_mb_rx_first()...get_mb_rx_last())
658 * message from. As long we're in the lower mailboxes we just read the
661 * With completion of the last of the lower mailboxes, we re-enable the
[all …]
/openbmc/qemu/include/hw/intc/
H A Dbcm2836_control.h22 /* 4 mailboxes per core, for 16 total */
36 uint32_t mailboxes[BCM2836_NCORES * BCM2836_MBPERCORE]; member
/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Di2c.c120 /* Local in/out mailboxes: 20 bits for offset, 12 for size */ in mlxsw_i2c_convert_mbox()
667 /* In order to use mailboxes through the i2c, special area is reserved in mlxsw_i2c_probe()
669 * mailboxes. Such mailboxes are called local mailboxes. When using a in mlxsw_i2c_probe()
676 * local mailboxes addresses from immedate output parameters. in mlxsw_i2c_probe()
704 dev_err(&client->dev, "Fail to get mailboxes\n"); in mlxsw_i2c_probe()
/openbmc/qemu/hw/misc/
H A Dbcm2835_mbox.c4 * This file models the system mailboxes, which are used for
6 * https://github.com/raspberrypi/firmware/wiki/Mailboxes
7 * https://github.com/raspberrypi/firmware/wiki/Accessing-mailboxes
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Darm,scmi.yaml61 Specifies the mailboxes used to communicate with SCMI compliant
77 exactly one, two or three mailboxes; the first one or two for transmitting
80 The number of mailboxes needed for transmitting messages depends on the
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/imapfilter/
H A Dimapfilter_2.8.2.bb1 SUMMARY = "IMAPFilter is a mail filtering utility that processes mailboxes based on IMAP queries"
/openbmc/linux/include/dt-bindings/mailbox/
H A Dtegra186-hsp.h31 * Shared mailboxes are unidirectional, so the direction needs to be specified
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/uw-imap/uw-imap/
H A DCVE-2018-19518.patch4 mailboxes through running imapd over rsh, and therefore ssh (Closes:
/openbmc/linux/drivers/scsi/smartpqi/
H A Dsmartpqi_sis.c169 u32 mailbox[6]; /* mailboxes 0-5 */
187 * Write the command parameters to mailboxes 1-4 (mailbox 5 is not used in sis_send_sync_cmd()
236 * read the values returned in mailboxes 1-5. in sis_send_sync_cmd()
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dnvidia,tegra194-tcu.yaml16 based protocol where each "virtual UART" has a pair of mailboxes, one
/openbmc/u-boot/doc/device-tree-bindings/mailbox/
H A Dnvidia,tegra186-hsp.txt9 The features that HSP supported are shared mailboxes, shared semaphores,
/openbmc/qemu/include/hw/arm/
H A Dbcm2836.h56 hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */

12345