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/openbmc/qemu/hw/ppc/
H A Dppc440_uc.c79 ppc4xx_l2sram_t *l2sram = opaque; in dcr_read_l2sram() local
91 ret = l2sram->l2cache[dcrn - DCR_L2CACHE_BASE]; in dcr_read_l2sram()
105 ret = l2sram->isram0[dcrn - DCR_ISRAM0_BASE]; in dcr_read_l2sram()
117 /*ppc4xx_l2sram_t *l2sram = opaque;*/ in dcr_write_l2sram()
129 /*l2sram->l2cache[dcrn - DCR_L2CACHE_BASE] = val;*/ in dcr_write_l2sram()
143 /*l2sram->isram0[dcrn - DCR_L2CACHE_BASE] = val;*/ in dcr_write_l2sram()
154 /*l2sram->isram1[dcrn - DCR_L2CACHE_BASE] = val;*/ in dcr_write_l2sram()
161 ppc4xx_l2sram_t *l2sram = opaque; in l2sram_reset() local
163 memset(l2sram->l2cache, 0, sizeof(l2sram->l2cache)); in l2sram_reset()
164 l2sram->l2cache[DCR_L2CACHE_STAT - DCR_L2CACHE_BASE] = 0x80000000; in l2sram_reset()
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/openbmc/u-boot/doc/
H A DREADME.ramboot-ppc85xx51 Preconfigure DDR/L2SRAM through JTAG interface.
55 Load the RAM based boot loader to the proper location in DDR/L2SRAM.
60 get the rambased boot loader binary into DDR/L2SRAM via tftp.
65 Please note that L2SRAM can also be used instead of DDR if the SOC has
66 sufficient size of L2SRAM.
/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk.dtsi161 reg-names = "l2sram", "l1pram", "l1dram";
177 reg-names = "l2sram", "l1pram", "l1dram";
193 reg-names = "l2sram", "l1pram", "l1dram";
209 reg-names = "l2sram", "l1pram", "l1dram";
225 reg-names = "l2sram", "l1pram", "l1dram";
241 reg-names = "l2sram", "l1pram", "l1dram";
257 reg-names = "l2sram", "l1pram", "l1dram";
273 reg-names = "l2sram", "l1pram", "l1dram";
H A Dkeystone-k2l.dtsi331 reg-names = "l2sram", "l1pram", "l1dram";
347 reg-names = "l2sram", "l1pram", "l1dram";
363 reg-names = "l2sram", "l1pram", "l1dram";
379 reg-names = "l2sram", "l1pram", "l1dram";
H A Dkeystone-k2e.dtsi127 reg-names = "l2sram", "l1pram", "l1dram";
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,k3-dsp-rproc.yaml106 - const: l2sram
125 - const: l2sram
171 reg-names = "l2sram", "l1pram", "l1dram";
187 reg-names = "l2sram", "l1dram";
H A Dti,davinci-rproc.txt35 "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig_base"
74 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg",
H A Dti,keystone-rproc.txt39 "l2sram", "l1pram", "l1dram"
133 reg-names = "l2sram", "l1pram", "l1dram";
172 reg-names = "l2sram", "l1pram", "l1dram";
/openbmc/u-boot/board/freescale/mpc8536ds/
H A DREADME16 configure the L2SRAM, then copy the second stage image to L2SRAM and jump
52 SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it.
H A Dtlb.c59 /* *I*G - L2SRAM */
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dspl_minimal.c25 /* set L2E=1 & L2SRAM=001 */ in cpu_init_f()
H A Dcpu_init.c613 /* set L2E=0, L2SRAM=0 */ in l2cache_init()
635 cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */ in l2cache_init()
646 /* set L2E=1, L2I=1, & L2SRAM=0 */ in l2cache_init()
652 /* set L2E=1, L2I=1, & L2SRAM=0 */ in l2cache_init()
H A Dcpu_init_early.c151 * Copy the code in setup_ifc to L2SRAM. Do a word copy in cpu_init_early_f()
/openbmc/u-boot/board/gdsys/p1022/
H A Dtlb.c46 /* *I*G - L2SRAM */
/openbmc/u-boot/board/freescale/mpc8569mds/
H A Dtlb.c83 /* *I*G - L2SRAM */
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dpsc.txt60 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
/openbmc/u-boot/board/freescale/p1010rdb/
H A Dtlb.c83 /* *I*G - L2SRAM */
/openbmc/u-boot/board/Arcturus/ucp1020/
H A Dtlb.c87 /* *I*G - L2SRAM */
/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dtlb.c75 /* *I*G - L2SRAM */
/openbmc/u-boot/board/freescale/p1022ds/
H A Dtlb.c94 /* *I*G - L2SRAM */
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dtlb.c97 /* *I*G - L2SRAM */
/openbmc/linux/drivers/remoteproc/
H A Dti_k3_dsp_remoteproc.c862 { .name = "l2sram", .dev_addr = 0x800000 },
869 { .name = "l2sram", .dev_addr = 0x800000 },
874 { .name = "l2sram", .dev_addr = 0x800000 },
H A Dda8xx_remoteproc.c201 static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"}; in da8xx_rproc_get_internal_memories()
H A Dkeystone_remoteproc.c298 static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"}; in keystone_rproc_of_get_memories()
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi1524 reg-names = "l2sram", "l1dram";
1537 reg-names = "l2sram", "l1dram";
1550 reg-names = "l2sram", "l1dram";
1563 reg-names = "l2sram", "l1dram";

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