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/openbmc/linux/drivers/gpu/ipu-v3/
H A Dipu-common.c26 #include <video/imx-ipu-v3.h>
27 #include "ipu-prv.h"
29 static inline u32 ipu_cm_read(struct ipu_soc *ipu, unsigned offset) in ipu_cm_read() argument
31 return readl(ipu->cm_reg + offset); in ipu_cm_read()
34 static inline void ipu_cm_write(struct ipu_soc *ipu, u32 value, unsigned offset) in ipu_cm_write() argument
36 writel(value, ipu->cm_reg + offset); in ipu_cm_write()
39 int ipu_get_num(struct ipu_soc *ipu) in ipu_get_num() argument
41 return ipu->id; in ipu_get_num()
45 void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync) in ipu_srm_dp_update() argument
49 val = ipu_cm_read(ipu, IPU_SRM_PRI2); in ipu_srm_dp_update()
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H A DMakefile2 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
4 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
5 ipu-dp.o ipu-dmfc.o ipu-ic.o ipu-ic-csc.o \
6 ipu-image-convert.o ipu-smfc.o ipu-vdi.o
9 imx-ipu-v3-objs += ipu-pre.o ipu-prg.o
H A Dipu-prv.h17 #include <video/imx-ipu-v3.h>
30 /* IPU Common registers */
152 struct ipu_soc *ipu; member
203 static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset) in ipu_idmac_read() argument
205 return readl(ipu->idmac_reg + offset); in ipu_idmac_read()
208 static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value, in ipu_idmac_write() argument
211 writel(value, ipu->idmac_reg + offset); in ipu_idmac_write()
214 void ipu_srm_dp_update(struct ipu_soc *ipu, bool sync);
216 int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
217 int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
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H A Dipu-dmfc.c11 #include <video/imx-ipu-v3.h>
12 #include "ipu-prv.h"
87 struct ipu_soc *ipu; member
93 struct ipu_soc *ipu; member
107 ipu_module_enable(priv->ipu, IPU_CONF_DMFC_EN); in ipu_dmfc_enable_channel()
126 ipu_module_disable(priv->ipu, IPU_CONF_DMFC_EN); in ipu_dmfc_disable_channel()
155 struct dmfc_channel *ipu_dmfc_get(struct ipu_soc *ipu, int ipu_channel) in ipu_dmfc_get() argument
157 struct ipu_dmfc_priv *priv = ipu->dmfc_priv; in ipu_dmfc_get()
172 int ipu_dmfc_init(struct ipu_soc *ipu, struct device *dev, unsigned long base, in ipu_dmfc_init() argument
187 priv->ipu = ipu; in ipu_dmfc_init()
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H A Dipu-dp.c14 #include <video/imx-ipu-v3.h>
15 #include "ipu-prv.h"
61 struct ipu_soc *ipu; member
107 ipu_srm_dp_update(priv->ipu, true); in ipu_dp_set_global_alpha()
122 ipu_srm_dp_update(priv->ipu, true); in ipu_dp_set_window_pos()
221 ipu_srm_dp_update(priv->ipu, true); in ipu_dp_setup_channel()
229 int ipu_dp_enable(struct ipu_soc *ipu) in ipu_dp_enable() argument
231 struct ipu_dp_priv *priv = ipu->dp_priv; in ipu_dp_enable()
236 ipu_module_enable(priv->ipu, IPU_CONF_DP_EN); in ipu_dp_enable()
261 ipu_srm_dp_update(priv->ipu, true); in ipu_dp_enable_channel()
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H A Dipu-ic.c15 #include "ipu-prv.h"
158 struct ipu_soc *ipu; member
222 struct ipu_soc *ipu = priv->ipu; in calc_resize_coeffs() local
230 dev_err(ipu->dev, "Unsupported resize (in_size > 4096)\n"); in calc_resize_coeffs()
234 dev_err(ipu->dev, "Unsupported resize (out_size > 1024)\n"); in calc_resize_coeffs()
240 dev_err(ipu->dev, "Unsupported downsize\n"); in calc_resize_coeffs()
261 dev_err(ipu->dev, "Warning! Overflow on resize coeff.\n"); in calc_resize_coeffs()
457 struct ipu_soc *ipu = priv->ipu; in ipu_ic_task_idma_init() local
465 dev_err(ipu->dev, "Illegal burst length for IC\n"); in ipu_ic_task_idma_init()
597 ipu_module_enable(priv->ipu, IPU_CONF_ROT_EN); in ipu_irt_enable()
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H A Dipu-smfc.c13 #include <video/imx-ipu-v3.h>
15 #include "ipu-prv.h"
26 struct ipu_soc *ipu; member
104 ipu_module_enable(priv->ipu, IPU_CONF_SMFC_EN); in ipu_smfc_enable()
124 ipu_module_disable(priv->ipu, IPU_CONF_SMFC_EN); in ipu_smfc_disable()
135 struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno) in ipu_smfc_get() argument
137 struct ipu_smfc_priv *priv = ipu->smfc_priv; in ipu_smfc_get()
172 int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev, in ipu_smfc_init() argument
182 ipu->smfc_priv = priv; in ipu_smfc_init()
184 priv->ipu = ipu; in ipu_smfc_init()
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H A Dipu-vdi.c7 #include "ipu-prv.h"
14 struct ipu_soc *ipu; member
171 ipu_module_enable(vdi->ipu, vdi->module); in ipu_vdi_enable()
189 ipu_module_disable(vdi->ipu, vdi->module); in ipu_vdi_disable()
198 struct ipu_vdi *ipu_vdi_get(struct ipu_soc *ipu) in ipu_vdi_get() argument
200 return ipu->vdi_priv; in ipu_vdi_get()
209 int ipu_vdi_init(struct ipu_soc *ipu, struct device *dev, in ipu_vdi_init() argument
218 ipu->vdi_priv = vdi; in ipu_vdi_init()
227 vdi->ipu = ipu; in ipu_vdi_init()
232 void ipu_vdi_exit(struct ipu_soc *ipu) in ipu_vdi_exit() argument
H A Dipu-cpmem.c11 #include "ipu-prv.h"
27 struct ipu_soc *ipu; member
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
154 * point of view of the IPU corresponds to little-endian words with the first
156 * The DRM pixel formats and IPU internal representation are ordered the other
260 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_high_priority() local
263 if (ipu->ipu_type == IPUV3EX) in ipu_cpmem_set_high_priority()
266 val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
268 ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
624 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_separate_alpha() local
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H A Dipu-csi.c20 #include "ipu-prv.h"
26 struct clk *clk_ipu; /* IPU bus clock */
29 struct ipu_soc *ipu; member
201 dev_err(csi->ipu->dev, in ipu_csi_set_testgen_mclk()
434 dev_dbg(csi->ipu->dev, "capture field swap\n"); in ipu_csi_set_bt_interlaced_codes()
501 dev_err(csi->ipu->dev, in ipu_csi_init_interface()
529 dev_dbg(csi->ipu->dev, "CSI_SENS_CONF = 0x%08X\n", in ipu_csi_init_interface()
531 dev_dbg(csi->ipu->dev, "CSI_ACT_FRM_SIZE = 0x%08X\n", in ipu_csi_init_interface()
565 dev_err(csi->ipu->dev, in ipu_csi_is_interlaced()
737 ipu_module_enable(csi->ipu, csi->module); in ipu_csi_enable()
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H A Dipu-di.c14 #include <video/imx-ipu-v3.h>
15 #include "ipu-prv.h"
22 struct clk *clk_ipu; /* IPU bus clock */
25 struct ipu_soc *ipu; member
170 dev_err(di->ipu->dev, "DI%d counters out of range.\n", in ipu_di_sync_config()
435 * the DI specific clock and the internal IPU clock. See in ipu_di_config_clock()
436 * DI_GENERAL bit 20. We select the IPU clock if it can in ipu_di_config_clock()
450 dev_dbg(di->ipu->dev, " IPU clock can give %lu with divider %u, error %c%d.%d%%\n", in ipu_di_config_clock()
494 dev_dbg(di->ipu->dev, "Want %luHz IPU %luHz DI %luHz using %s, %luHz\n", in ipu_di_config_clock()
498 clk == di->clk_di ? "DI" : "IPU", in ipu_di_config_clock()
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H A Dipu-dc.c15 #include <video/imx-ipu-v3.h>
16 #include "ipu-prv.h"
101 struct ipu_soc *ipu; member
180 * to DI moves to signal generator #6 (see ipu-di.c). In progressive in ipu_dc_init_sync()
231 void ipu_dc_enable(struct ipu_soc *ipu) in ipu_dc_enable() argument
233 struct ipu_dc_priv *priv = ipu->dc_priv; in ipu_dc_enable()
238 ipu_module_enable(priv->ipu, IPU_CONF_DC_EN); in ipu_dc_enable()
266 void ipu_dc_disable(struct ipu_soc *ipu) in ipu_dc_disable() argument
268 struct ipu_dc_priv *priv = ipu->dc_priv; in ipu_dc_disable()
274 ipu_module_disable(priv->ipu, IPU_CONF_DC_EN); in ipu_dc_disable()
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H A Dipu-prg.c17 #include <video/imx-ipu-v3.h>
19 #include "ipu-prv.h"
115 bool ipu_prg_present(struct ipu_soc *ipu) in ipu_prg_present() argument
117 if (ipu->prg_priv) in ipu_prg_present()
124 bool ipu_prg_format_supported(struct ipu_soc *ipu, uint32_t format, in ipu_prg_format_supported() argument
143 int ipu_prg_enable(struct ipu_soc *ipu) in ipu_prg_enable() argument
145 struct ipu_prg *prg = ipu->prg_priv; in ipu_prg_enable()
154 void ipu_prg_disable(struct ipu_soc *ipu) in ipu_prg_disable() argument
156 struct ipu_prg *prg = ipu->prg_priv; in ipu_prg_disable()
173 * This isn't clearly documented in the RM, but IPU to PRG channel in ipu_prg_ipu_to_prg_chan()
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H A Dipu-image-convert.c12 #include <video/imx-ipu-image-convert.h>
14 #include "ipu-prv.h"
208 /* the IPU end-of-frame irqs */
229 struct ipu_soc *ipu; member
346 dev_dbg(priv->ipu->dev, in dump_format()
376 dma_free_coherent(priv->ipu->dev, in free_dma_buf()
387 buf->virt = dma_alloc_coherent(priv->ipu->dev, buf->len, &buf->phys, in alloc_dma_buf()
390 dev_err(priv->ipu->dev, "failed to alloc dma buffer\n"); in alloc_dma_buf()
461 dev_dbg(ctx->chan->priv->ipu->dev, in calc_image_resize_coefficients()
514 struct device *dev = ctx->chan->priv->ipu->dev; in find_best_seam()
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/openbmc/linux/drivers/gpu/drm/ingenic/
H A Dingenic-ipu.c3 // Ingenic JZ47xx IPU driver
9 #include "ingenic-ipu.h"
43 void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
155 static void jz4760_set_coefs(struct ingenic_ipu *ipu, unsigned int reg, in jz4760_set_coefs() argument
199 regmap_write(ipu->map, reg, val); in jz4760_set_coefs()
204 regmap_write(ipu->map, reg, val); in jz4760_set_coefs()
207 static void jz4725b_set_coefs(struct ingenic_ipu *ipu, unsigned int reg, in jz4725b_set_coefs() argument
223 regmap_write(ipu->map, reg, val); in jz4725b_set_coefs()
227 regmap_write(ipu->map, reg, JZ4725B_IPU_RSZ_LUT_IN_EN); in jz4725b_set_coefs()
231 static void ingenic_ipu_set_downscale_coefs(struct ingenic_ipu *ipu, in ingenic_ipu_set_downscale_coefs() argument
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/openbmc/linux/include/video/
H A Dimx-ipu-v3.h65 * Enumeration of IPU rotation modes
120 * NOTE: channels 6,7 are unused in the IPU and are not IDMAC channels,
187 int ipu_map_irq(struct ipu_soc *ipu, int irq);
188 int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
204 * IPU Common functions
206 int ipu_get_num(struct ipu_soc *ipu);
207 void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2);
208 void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi);
209 void ipu_dump(struct ipu_soc *ipu);
212 * IPU Image DMA Controller (idmac) functions
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H A Dimx-ipu-image-convert.h10 #include <video/imx-ipu-v3.h>
57 * ipu_image_convert_adjust() - adjust input/output images to IPU restrictions.
70 * and rotation mode meet IPU restrictions.
76 * Returns 0 if the formats and rotation mode meet IPU restrictions,
85 * @ipu: the IPU handle to use for the conversions
95 * IPU retrictions.
100 ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
155 * @ipu: the IPU handle to use for the conversion
166 * mode must already meet IPU retrictions.
173 ipu_image_convert(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dingenic,ipu.yaml4 $id: http://devicetree.org/schemas/display/ingenic,ipu.yaml#
7 title: Ingenic SoCs Image Processing Unit (IPU)
16 - ingenic,jz4725b-ipu
17 - ingenic,jz4760-ipu
19 - const: ingenic,jz4770-ipu
20 - const: ingenic,jz4760-ipu
32 const: ipu
49 ipu@13080000 {
50 compatible = "ingenic,jz4770-ipu", "ingenic,jz4760-ipu";
57 clock-names = "ipu";
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
23 C66x or C67x family of DSP cores as the main execution unit. The IPU processor
45 - ti,omap4-ipu
46 - ti,omap5-ipu
47 - ti,dra7-ipu
108 'reg-names'. These are mandatory for all DSP and IPU
193 - ti,omap4-ipu
194 - ti,omap5-ipu
195 - ti,dra7-ipu
258 //Example 2: OMAP5 IPU
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/openbmc/linux/drivers/staging/media/imx/
H A Dimx-media-internal-sd.c5 * Adds the IPU internal subdevices and the media links between them.
36 struct ipu_soc *ipu,
196 struct ipu_soc *ipu; in imx_media_register_ipu_internal_subdevs() local
199 ipu = dev_get_drvdata(ipu_dev); in imx_media_register_ipu_internal_subdevs()
200 if (!ipu) { in imx_media_register_ipu_internal_subdevs()
201 v4l2_err(&imxmd->v4l2_dev, "invalid IPU device!\n"); in imx_media_register_ipu_internal_subdevs()
205 ipu_id = ipu_get_num(ipu); in imx_media_register_ipu_internal_subdevs()
207 v4l2_err(&imxmd->v4l2_dev, "invalid IPU id %d!\n", ipu_id); in imx_media_register_ipu_internal_subdevs()
213 /* record this IPU */ in imx_media_register_ipu_internal_subdevs()
214 if (!imxmd->ipu[ipu_id]) in imx_media_register_ipu_internal_subdevs()
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H A Dimx-media.h16 #include <video/imx-ipu-v3.h>
22 * Enumeration of the IPU internal sub-devices
87 bool ipufmt; /* is one of the IPU internal formats */
94 PIXFMT_SEL_IPU = BIT(3), /* select IPU-internal formats */
157 struct ipu_soc *ipu[2]; member
165 /* the IPU internal subdev's registered synchronously */
258 struct ipu_soc *ipu,
265 struct ipu_soc *ipu,
/openbmc/u-boot/drivers/video/
H A Dipu.h8 * Linux IPU driver for MX51:
77 * IPU Driver channels definitions.
94 * Enumeration of IPU logical channels. An IPU logical channel is defined as a
95 * combination of an input (memory to IPU), output (IPU to memory), and/or
121 IPU_OUTPUT_BUFFER = 0, /*< Buffer for output from IPU */
122 IPU_ALPHA_IN_BUFFER = 1, /*< Buffer for input to IPU */
123 IPU_GRAPH_IN_BUFFER = 2, /*< Buffer for input to IPU */
124 IPU_VIDEO_IN_BUFFER = 3, /*< Buffer for input to IPU */
178 * Enumeration of IPU interrupts.
208 /* Common IPU API */
/openbmc/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl-imx-drm.txt5 IPU or other display interface nodes that comprise the graphics subsystem.
10 of IPU devices
24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
35 Additional required properties for fsl,imx6qp-ipu:
36 - fsl,prg: phandle to prg node associated with this IPU instance
45 ipu: ipu@18000000 {
48 compatible = "fsl,imx53-ipu";
127 Port 0 is the input port connected to the IPU display interface,
/openbmc/linux/drivers/gpu/drm/imx/ipuv3/
H A Dipuv3-crtc.c17 #include <video/imx-ipu-v3.h>
53 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); in ipu_crtc_atomic_enable() local
55 ipu_prg_enable(ipu); in ipu_crtc_atomic_enable()
56 ipu_dc_enable(ipu); in ipu_crtc_atomic_enable()
87 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); in ipu_crtc_atomic_disable() local
94 * the IPU or even system. in ipu_crtc_atomic_disable()
97 ipu_dc_disable(ipu); in ipu_crtc_atomic_disable()
98 ipu_prg_disable(ipu); in ipu_crtc_atomic_disable()
285 * If we have DAC or LDB, then we need the IPU DI clock to be in ipu_crtc_mode_set_nofb()
286 * the same as the LDB DI clock. For TVDAC, derive the IPU DI in ipu_crtc_mode_set_nofb()
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H A Dipuv3-plane.c18 #include <video/imx-ipu-v3.h>
120 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch, in ipu_plane_irq()
197 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma); in ipu_plane_get_resources()
210 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch); in ipu_plane_get_resources()
219 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma); in ipu_plane_get_resources()
227 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow); in ipu_plane_get_resources()
256 ipu_dp_enable(ipu_plane->ipu); in ipu_plane_enable()
284 ipu_dp_disable(ipu_plane->ipu); in ipu_plane_disable()
285 if (ipu_prg_present(ipu_plane->ipu)) in ipu_plane_disable()
343 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu; in ipu_plane_format_mod_supported() local
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