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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
[all …]
H A Dhisilicon,ascend910-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon common I2C controller
10 - Yicong Yang <yangyicong@hisilicon.com>
13 The HiSilicon common I2C controller can be used for many different
17 - $ref: /schemas/i2c/i2c-controller.yaml#
21 const: hisilicon,ascend910-i2c
32 clock-frequency:
[all …]
H A Datmel,at91sam-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: I2C for Atmel/Microchip platforms
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
16 - items:
17 - enum:
18 - atmel,at91rm9200-i2c
19 - atmel,at91sam9261-i2c
[all …]
/openbmc/linux/arch/arc/boot/dts/
H A Dabilis_tb101_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
36 i2c0: i2c@ff120000 {
37 i2c-sda-hold-time-ns = <432>;
39 i2c1: i2c@ff121000 {
40 i2c-sda-hold-time-ns = <432>;
42 i2c2: i2c@ff122000 {
[all …]
H A Dabilis_tb100_dvk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 /dts-v1/;
29 pinctrl-names = "default";
30 pinctrl-0 = <&pctl_uart0>;
33 phy-mode = "rgmii";
36 i2c0: i2c@ff120000 {
37 i2c-sda-hold-time-ns = <432>;
39 i2c1: i2c@ff121000 {
40 i2c-sda-hold-time-ns = <432>;
42 i2c2: i2c@ff122000 {
[all …]
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
19 stdout-path = "serial0:115200n8";
23 timebase-frequency = <6250000>;
32 compatible = "gpio-leds";
34 led-ack {
38 linux,default-trigger = "heartbeat";
[all …]
H A Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
/openbmc/linux/drivers/mfd/
H A Dintel-lpss-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include "intel-lpss.h"
23 PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_SPT_SSP),
37 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
51 PROPERTY_ENTRY_U32("reg-io-width", 4),
52 PROPERTY_ENTRY_U32("reg-shift", 2),
53 PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
68 PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BXT_SSP),
82 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
83 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
[all …]
H A Dintel-lpss-pci.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include "intel-lpss.h"
40 info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info), in intel_lpss_pci_probe()
43 return -ENOMEM; in intel_lpss_pci_probe()
45 info->mem = &pdev->resource[0]; in intel_lpss_pci_probe()
46 info->irq = pdev->irq; in intel_lpss_pci_probe()
49 info->ignore_resource_conflicts = true; in intel_lpss_pci_probe()
51 pdev->d3cold_delay = 0; in intel_lpss_pci_probe()
57 ret = intel_lpss_probe(&pdev->dev, info); in intel_lpss_pci_probe()
61 pm_runtime_put(&pdev->dev); in intel_lpss_pci_probe()
[all …]
/openbmc/linux/arch/mips/boot/dts/mscc/
H A Djaguar2_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 stdout-path = "serial0:115200n8";
24 i2c-sda-hold-time-ns = <300>;
H A Dluton_pcb091.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "mscc,luton-pcb091", "mscc,luton";
19 stdout-path = "serial0:115200n8";
29 i2c-sda-hold-time-ns = <300>;
H A Docelot_pcb123.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
9 compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
12 stdout-path = "serial0:115200n8";
33 compatible = "macronix,mx25l25635f", "jedec,spi-nor";
34 spi-max-frequency = <20000000>;
39 &i2c {
40 clock-frequency = <100000>;
41 i2c-sda-hold-time-ns = <300>;
51 phy-handle = <&phy0>;
[all …]
H A Dserval_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 stdout-path = "serial0:115200n8";
23 i2c0_imux: i2c0-imux {
24 compatible = "i2c-mux-pinctrl";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 i2c-parent = <&i2c0>;
28 pinctrl-names =
31 pinctrl-0 = <&i2cmux_0>;
32 pinctrl-1 = <&i2cmux_1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d2_xplained.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
28 stdout-path = "serial0:115200n8";
[all …]
H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
29 i2c-mux {
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-rk3x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for I2C adapter in Rockchip RK3xxx SoC
11 #include <linux/i2c.h>
83 * struct i2c_spec_values - I2C specification values for various modes
84 * @min_hold_start_ns: min hold time (repeated) START condition
87 * @min_setup_start_ns: min set-up time for a repeated START conditio
88 * @max_data_hold_ns: max data hold time
89 * @min_data_setup_ns: min data set-up time
90 * @min_setup_stop_ns: min set-up time for STOP condition
91 * @min_hold_buffer_ns: min bus free time between a STOP and
[all …]
H A Di2c-axxia.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This driver implements I2C master functionality using the LSI API2C
7 * maximum 255 bytes at a time. If a larger transfer is attempted, error code
8 * (-EINVAL) is returned.
14 #include <linux/i2c.h>
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
121 * struct axxia_i2c_dev - I2C device context
130 * @adapter: core i2c abstraction
131 * @i2c_clk: clock reference for i2c input clock
[all …]
H A Di2c-altera.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on the i2c-axxia.c driver.
10 #include <linux/i2c.h>
46 #define ALTR_I2C_SDA_HOLD 0x28 /* SDA hold count register */
58 * struct altr_i2c_dev - I2C device context
65 * @adapter: core i2c abstraction
66 * @i2c_clk: clock reference for i2c input clock
67 * @bus_clk_rate: current i2c bus clock rate
96 int_en = readl(idev->base + ALTR_I2C_ISER); in altr_i2c_int_enable()
98 idev->isr_mask = int_en | mask; in altr_i2c_int_enable()
[all …]
H A Di2c-at91-master.c1 // SPDX-License-Identifier: GPL-2.0
3 * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
18 #include <linux/dma-mapping.h>
22 #include <linux/i2c.h>
30 #include "i2c-at91.h"
34 struct at91_twi_pdata *pdata = dev->pdata; in at91_init_twi_bus_master()
38 if (dev->fifo_size) in at91_init_twi_bus_master()
42 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); in at91_init_twi_bus_master()
45 if (pdata->has_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
49 if (pdata->has_adv_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
[all …]
H A Di2c-designware-master.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver (master only).
5 * Based on the TI DAVINCI I2C adapter driver.
16 #include <linux/i2c.h>
25 #include "i2c-designware-core.h"
34 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
35 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
37 /* Configure the I2C master */ in i2c_dw_configure_fifo_master()
38 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
45 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
[all …]
H A Di2c-stm32f7.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
40 /* STM32F7 I2C registers */
52 /* STM32F7 I2C control 1 */
83 /* STM32F7 I2C control 2 */
[all …]
/openbmc/u-boot/drivers/i2c/
H A Dstm32f7_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <i2c.h>
15 /* STM32 I2C registers */
17 u32 cr1; /* I2C control register 1 */
18 u32 cr2; /* I2C control register 2 */
19 u32 oar1; /* I2C own address 1 register */
20 u32 oar2; /* I2C own address 2 register */
21 u32 timingr; /* I2C timing register */
22 u32 timeoutr; /* I2C timeout register */
23 u32 isr; /* I2C interrupt and status register */
[all …]
/openbmc/linux/include/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * i2c.h - definitions for the Linux i2c bus interface
4 * Copyright (C) 1995-2000 Simon G. Vogl
5 * Copyright (C) 2013-2019 Wolfram Sang <wsa@kernel.org>
24 #include <uapi/linux/i2c.h>
30 /* --- General options ------------------------------------------------ */
44 /* I2C Frequency Modes */
62 * transmit one message at a time, a more complex version can be used to
70 * i2c_master_recv - issue a single I2C message in master receive mode
84 * i2c_master_recv_dmasafe - issue a single I2C message in master receive mode
[all …]
/openbmc/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
[all …]

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