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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dgeneric-ehci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: usb-hcd.yaml
14 - if:
19 const: ibm,usb-ehci-440epx
28 - items:
29 - enum:
[all …]
H A Dusb251xb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
[all …]
/openbmc/linux/Documentation/i2c/
H A Di2c-address-translators.rst1 .. SPDX-License-Identifier: GPL-2.0
11 -----------
13 An I2C Address Translator (ATR) is a device with an I2C slave parent
21 An ATR looks similar to an i2c-mux except:
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
27 The kernel i2c-atr provides a helper to implement an ATR within a driver.
41 .-----. |
42 .-----. | |---+---- B
43 | CPU |--A--| ATR |
[all …]
/openbmc/qemu/docs/devel/
H A Dloads-stores.rst9 QEMU internally has multiple families of functions for performing
12 documentation of each API -- for that you should look at the
32 - (empty) : for 32 or 64 bit sizes
33 - ``u`` : unsigned
34 - ``s`` : signed
37 - ``b`` : 8 bits
38 - ``w`` : 16 bits
39 - ``24`` : 24 bits
40 - ``l`` : 32 bits
41 - ``q`` : 64 bits
[all …]
/openbmc/linux/arch/arm/boot/dts/socionext/
H A Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-ld4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
[all …]
H A Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-sld8";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
[all …]
H A Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
H A Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
14 compatible = "socionext,uniphier-ld11";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
[all …]
H A Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
/openbmc/linux/drivers/usb/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
28 module will be called xhci-hcd.
90 tristate "xHCI support for Renesas R-Car SoCs"
96 found in Renesas R-Car ARM SoCs.
132 modules will be called ohci-platform.ko, ehci-brcm.ko and
133 xhci-plat-hcd.ko
158 module will be called ehci-hcd.
161 bool "Root Hub Transaction Translators"
164 Some EHCI chips have vendor-specific extensions to integrate
[all …]
H A Docteon-hcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
104 * This register can be used to configure the core after power-on or a change in
105 * mode of operation. This register mainly contains AHB system-related
126 * @nptxfemplvl: Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)
128 * Indicates when the Non-Periodic TxFIFO Empty Interrupt bit in
131 * * 1'b0: GINTSTS.NPTxFEmp interrupt indicates that the Non-
133 * * 1'b1: GINTSTS.NPTxFEmp interrupt indicates that the Non-
139 * This field has not effect and should be left as 0x0.
172 * This value is in terms of 32-bit words.
[all …]
H A Dehci-platform.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the ohci-ssb driver
12 * Derived from the EHCI-PCI driver
13 * Copyright (c) 2000-2004 by David Brownell
15 * Derived from the ohci-pci driver
17 * Copyright 2000-2002 David Brownell
23 #include <linux/dma-mapping.h>
43 #define hcd_to_ehci_priv(h) ((struct ehci_platform_priv *)hcd_to_ehci(h)->priv)
58 struct platform_device *pdev = to_platform_device(hcd->self.controller); in ehci_platform_reset()
[all …]
H A Dehci-sched.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
12 * EHCI scheduled transaction support: interrupt, iso, split iso
16 * with the "asynchronous" transaction support (control/bulk transfers).
21 * pre-calculated schedule data to make appending to the queue be quick.
27 * periodic_next_shadow - return "next" pointer on shadow list
37 return &periodic->qh->qh_next; in periodic_next_shadow()
[all …]
H A Dehci-hub.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2001-2004 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
16 /*-------------------------------------------------------------------------*/
26 return !udev->maxchild && udev->persist_enabled && in persist_enabled_on_companion()
27 udev->bus->root_hub->speed < USB_SPEED_HIGH; in persist_enabled_on_companion()
41 if (!ehci->owned_ports) in ehci_handover_companion_ports()
55 port = HCS_N_PORTS(ehci->hcs_params); in ehci_handover_companion_ports()
56 while (port--) { in ehci_handover_companion_ports()
[all …]
/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/openbmc/linux/Documentation/usb/
H A Dehci.rst5 27-Dec-2002
8 USB 2.0-capable host controller hardware. The USB 2.0 standard is
11 - "High Speed" 480 Mbit/sec (60 MByte/sec)
12 - "Full Speed" 12 Mbit/sec (1.5 MByte/sec)
13 - "Low Speed" 1.5 Mbit/sec
22 interact with the EHCI controller through a "Transaction Translator"
26 At this writing, this driver has been seen to work with implementations
31 While usb-storage devices have been available since mid-2001 (working
34 appear to be on hold until more systems come with USB 2.0 built-in.
39 other changes to the Linux-USB core APIs, including the hub driver,
[all …]
/openbmc/linux/arch/mips/boot/dts/qca/
H A Dar9132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ath79-clk.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
22 cpuintc: interrupt-controller {
23 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
25 interrupt-controller;
26 #interrupt-cells = <1>;
[all …]
/openbmc/linux/arch/mips/boot/dts/mti/
H A Dsead3.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "mti,sead-3";
14 model = "MIPS SEAD-3";
17 stdout-path = "serial1:115200";
36 cpu_intc: interrupt-controller {
37 compatible = "mti,cpu-interrupt-controller";
[all …]
/openbmc/linux/Documentation/filesystems/
H A Dext2.rst1 .. SPDX-License-Identifier: GPL-2.0
18 set using tune2fs(8). Kernel-determined defaults are indicated by (*).
34 errors=remount-ro Remount the filesystem read-only on an error.
40 nouid32 Use 16-bit UIDs and GIDs.
75 ext2 shares many properties with traditional Unix filesystems. It has
76 the concepts of blocks, inodes and directories. It has space in the
84 ------
93 ------------
110 --------------
140 ------
[all …]
/openbmc/u-boot/include/
H A Dusb.h1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * Adapted for U-Boot driver model
8 * Note: Part of this code has been derived from linux
45 * time for a BULK device to react - some are slow.
92 * struct usb_device - information about a USB device
135 * Child devices - if this is a hub device
149 /* slot_id - for xHCI enabled devices */
211 * board-specific hardware initialization, called by
212 * usb drivers and u-boot commands
252 int usb_detect_change(void); /* detect if a USB device has been (un)plugged */
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
31 compatible = "arm,cortex-m3";
40 compatible = "fixed-clock";
[all …]
/openbmc/linux/drivers/usb/fotg210/
H A Dfotg210-hcd.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
10 * Most of code borrowed from the Linux-3.7 EHCI driver
29 #include <linux/dma-mapping.h>
49 #define FOTG210_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
52 #define FOTG210_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
60 #define FOTG210_TUNE_FLS 1 /* (medium) 512-frame schedule */
[all …]
/openbmc/linux/drivers/usb/isp1760/
H A Disp1760-hcd.c1 // SPDX-License-Identifier: GPL-2.0
6 * - ISO
7 * - OTG
33 #include "isp1760-core.h"
34 #include "isp1760-hcd.h"
35 #include "isp1760-regs.h"
46 return *(struct isp1760_hcd **)hcd->hcd_priv; in hcd_to_priv()
150 /* the rest is HCD-private */
157 /* QTD_PAYLOAD_ALLOC: chip mem has been allocated for payload */
158 /* QTD_XFER_STARTED: valid ptd has been written to isp176x - only
[all …]

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