Home
last modified time | relevance | path

Searched +full:hardware +full:- +full:driven (Results 1 – 25 of 323) sorted by relevance

12345678910>>...13

/openbmc/linux/drivers/gpio/
H A Dgpio-stp-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
22 * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
37 /* software or hardware update select bit */
58 /* 2 groups of 3 bits can be driven by the phys */
85 u8 groups; /* we can drive 1-3 groups of 8bit each */
86 u8 dsl; /* the 2 LSBs can be driven by the dsl core */
87 u8 phy1; /* 3 bits can be driven by phy1 */
88 u8 phy2; /* 3 bits can be driven by phy2 */
89 u8 phy3; /* 3 bits can be driven by phy3 */
90 u8 phy4; /* 3 bits can be driven by phy4 */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 controller, named "Ports" in the hardware reference manual.
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
25 - const: renesas,r7s72100-ports # RZ/A1H
[all …]
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
31 to Linux developers working with embedded and custom hardware. Each GPIO
33 (BGA) packages. Board schematics show which external hardware connects to
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
[all …]
H A Ddriver.rst24 Inside a GPIO driver, individual GPIO lines are identified by their hardware
26 between 0 and n-1, n being the number of GPIOs managed by the chip.
28 The hardware GPIO number should be something intuitive to the hardware, for
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
31 use hardware offsets 0..31 for these, corresponding to bits 0..31 in the
34 This number is purely internal: the hardware number of a particular GPIO
40 assigned), and for each GPIO line the global number will be (base + hardware
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
[all …]
/openbmc/linux/Documentation/admin-guide/
H A Dparport.rst4 The ``parport`` code provides parallel-port support under Linux. This
9 detection of your hardware. This is particularly useful if you want
16 port-sharing) and architecture-dependent (which deals with actually
28 architecture-dependent code with (for example)::
32 to tell the ``parport`` code that you want three PC-style ports, one at
34 auto-detected IRQ. Currently, PC-style (``parport_pc``), Sun ``bpp``,
35 Amiga, Atari, and MFC3 hardware is supported.
43 --------
60 ------------------------
68 parport0: Printer, BJC-210 (Canon)
[all …]
/openbmc/linux/Documentation/leds/
H A Dleds-class.rst8 of the LED (taking a value 0-max_brightness). Most LEDs don't have hardware
9 brightness support so will just be turned on for non-zero brightness settings.
14 existing subsystems with minimal additional code. Examples are the disk-activity,
15 nand-disk and sharpsl-charge triggers. With led triggers disabled, the code
48 - devicename:
51 than to the hardware; the information related to the product and the bus
57 - color:
59 include/dt-bindings/leds/common.h.
61 - function:
63 include/dt-bindings/leds/common.h.
[all …]
/openbmc/linux/drivers/leds/rgb/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 tristate "LEDs group multi-color support"
11 different colors are physically grouped in a single multi-color LED
12 and driven by a controller that doesn't have multi-color support.
15 will be called leds-group-multicolor.
18 tristate "PWM driven multi-color LED Support"
21 This option enables support for PWM driven monochrome LEDs that are
25 will be called leds-pwm-multicolor.
39 If compiled as a module, the module will be named leds-qcom-lpg.
47 In MT6370, there are four channel current-sink LED drivers that
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
[all …]
/openbmc/linux/Documentation/driver-api/thermal/
H A Dnouveau_thermal.rst12 -----------
17 Currently, due to the absence of in-kernel API to access HWMON drivers, Nouveau
24 ----------------------
26 Temperature is exposed under as a read-only HWMON attribute temp1_input.
56 --------------
75 Your fan can be driven in different modes:
78 * 1: The fan can be driven in manual (use pwm1 to change the speed);
79 * 2; The fan is driven automatically depending on the temperature.
85 When operating in manual mode outside the vbios-defined
87 depending on your hardware.
[all …]
/openbmc/linux/drivers/char/ipmi/
H A Dipmi_si_sm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * State machine interface for low-level IPMI system management
8 * BT interface) and the actual low-level state machine.
35 SI_SM_HOSED, /* The hardware violated the state machine. */
38 * The hardware is asserting attn and the state machine is
61 * return -2 if the state machine is not idle, -1 if the size
70 * -1 if the buffer is too small, zero if no transaction is
78 * receiving an interrupt (for a interrupt-driven interface).
79 * If interrupt driven, you should probably poll this
/openbmc/openbmc/meta-openpower/recipes-phosphor/logging/
H A Dopenpower-libhei_git.bb1 SUMMARY = "Hardware Error Isolator for POWER Systems"
4 "The library provides a set of tools to isolate hardware attentions driven \
7 HOMEPAGE = "https://github.com/openbmc/openpower-libhei"
9 LICENSE = "Apache-2.0"
12 include openpower-libhei-rev.inc
19 DEPENDS = "libxml2-native libxml-simple-perl-native libjson-perl-native"
22 EXTRA_OEMESON = "-Dtests=disabled"
/openbmc/linux/drivers/leds/blink/
H A DKconfig10 BCM63138 SoC. The same hardware block is known to be also used
13 If compiled as module it will be called leds-bcm63138.
22 gateway-on-a-chip SoC to be shipped on mid and high end home
25 These LEDs are driven by a Serial Shift Output (SSO) controller.
26 The driver supports hardware blinking and the LEDs can be configured
27 to be triggered by software/CPU or by hardware.
31 will be called leds-lgm-sso.
/openbmc/linux/Documentation/spi/
H A Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
22 into a SPI bus with a single device, which will be driven by the generic
26 Hardware Interfacing
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
33 The hardware interfacing on the LM70 LLP eval board is as follows:
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
[all …]
H A Dpxa2xx.rst7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx and compatible SSP.
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
18 the DMA or interrupt driven transfers.
21 -----------------------------------
23 arch/.../mach-*/board-*.c as a "platform device". The master configuration
44 ------------------
[all …]
/openbmc/linux/drivers/edac/
H A DKconfig16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
40 levels are 0-4 (from low to high) and by default it is set to 2.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
49 occurring on your machine in human-readable form.
60 Not all machines support hardware-driven error report. Some of those
61 provide a BIOS-driven error report mechanism via ACPI, using the
65 When this option is enabled, it will disable the hardware-driven
69 It should be noticed that keeping both GHES and a hardware-driven
[all …]
/openbmc/qemu/docs/specs/
H A Dfsi.rst5 The QEMU FSI emulation implements hardware interfaces between ASPEED SOC, FSI
8 FSI is a point-to-point two wire interface which is capable of supporting
33 driving CFAM engine accesses into the POWER chip. At the hardware level
34 FSI is a bit-based protocol supporting synchronous and DMA-driven accesses
37 4. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER
40 MMIO-mapping of the CFAM address straight onto a sub-region of the OPB
43 5. An APB-to-OPB bridge enabling access to the OPB from the ARM core in the
44 AST2600. Hardware limitations prevent the OPB from being directly mapped
54 CFAM to be simultaneously driven from multiple FSI links. The modeling is not
58 As for FSI, its symbols and wire-protocol are not modelled at all. This is not
[all …]
/openbmc/linux/arch/powerpc/platforms/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
65 bool "Device-tree based CPU feature discovery & setup"
97 The MPIC global timer is a hardware timer inside the
99 specified interval times out, the hardware timer generates
124 registers are used for inter-processor communication.
206 bool "On-chip CPU temperature sensor support"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Dnvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 This binding is intended to represent the location of hardware
23 "#address-cells":
26 "#size-cells":
29 read-only:
34 wp-gpios:
36 GPIO to which the write-protect pin of the chip is connected.
[all …]
/openbmc/docs/designs/
H A Dvoltage-regulator-configuration.md8 Created: 2019-07-13
13 voltage, over-current limit, and pgood thresholds. The configuration is often
14 dependent on the system type and rail type. Regulators have a hardware default
15 configuration that is defined by hardware engineers early in system design.
17 new application is needed to configure regulators. It should be data-driven to
18 support a variety of regulator types and to avoid hard-coded logic.
24 Hardware engineers must specify many low-level configuration values for a
25 regulator. Some simple examples include output voltage, over-current limit, and
29 Depending on the regulator type, the hardware engineer may enter the
33 non-volatile memory on the regulator. This provides the hardware/power-on
[all …]
/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight-trbe.rst1 .. SPDX-License-Identifier: GPL-2.0
10 Hardware Description
11 --------------------
13 Trace Buffer Extension (TRBE) is a percpu hardware which captures in system
19 driven via the CoreSight driver framework to support the ETE (which is
23 ---------------------------
36 *Key file items are:-*
/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dqemu_e500.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * This is intended to be a flexible device-tree-driven platform, not fixed
6 * to a particular piece of hardware or a particular spec of virtual hardware,
7 * beyond the assumption of an e500-family CPU. Some things are still hardcoded
53 .compatible = "fsl,qemu-e500", in define_machine()
/openbmc/linux/Documentation/arch/arm64/
H A Darm-acpi.rst12 The Arm kernel implements the reduced hardware model of ACPI version
20 specifications, then ACPI may not be a good fit for the hardware.
23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
41 while DT explicitly does not support this. For hardware vendors, being
43 system releases on new hardware.
45 - ACPI’s OSPM defines a power management model that constrains what the
[all …]
/openbmc/linux/include/linux/pinctrl/
H A Dpinconf-generic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
24 * enum pin_config_param - possible pin configuration parameters
31 * transition from say pull-up to pull-down implies that you disable
32 * pull-up in the process, this setting disables all biasing.
34 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
40 * impedance to GROUND). If the argument is != 0 pull-down is enabled,
44 * on embedded knowledge of the controller hardware, like current mux
46 * be decided completely inside the hardware block and not be readable
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Ddsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
26 reg-property set to the virtual channel number, usually there is just
33 clock-master:
37 another DSI host to drive the same peripheral. Hardware supporting
39 to be driven by the same clock. Only the DSI host instance
42 "#address-cells":
[all …]
/openbmc/linux/include/linux/platform_data/
H A Dedma.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2006-2013 Texas Instruments.
11 * Channel Triggers transfers, usually from a hardware event but
23 * is driven only from a channel, which performs the transfers specified
29 * Transfer Controller (TC) requests when the channel triggers (by hardware
33 * DaVinci hardware also has a "QDMA" mechanism which is not currently
45 EVENTQ_DEFAULT = -1
65 * Default queue is expected to be a low-priority queue.
74 /* List of channels allocated for memcpy, terminated with -1 */

12345678910>>...13