bindings/nvmem/nvmem.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13   This binding is intended to represent the location of hardware
23   "#address-cells":
26   "#size-cells":
29   read-only:
34   wp-gpios:
36       GPIO to which the write-protect pin of the chip is connected.
37       The write-protect GPIO is asserted, when it's driven high
39       when it's driven low (logical '0') to allow writing.
42   nvmem-layout:
43     $ref: /schemas/nvmem/layouts/nvmem-layout.yaml
50   "@[0-9a-f]+(,[0-7])?$":
53       - $ref: layouts/fixed-cell.yaml
54       - properties:
61   - |
62       #include <dt-bindings/gpio/gpio.h>
65           compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
66           #address-cells = <1>;
67           #size-cells = <1>;
70           wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
74           nvmem-layout {
75               compatible = "fixed-layout";
76               #address-cells = <1>;
77               #size-cells = <1>;
89               pvs_version: pvs-version@6 {
94               speed_bin: speed-bin@c{