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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-sdb.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
12 clock-frequency = <100000>;
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_i2c1>;
23 regulator-min-microvolt = <300000>;
24 regulator-max-microvolt = <1875000>;
25 regulator-boot-on;
26 regulator-always-on;
27 regulator-ramp-delay = <6250>;
[all …]
H A Dimx6sx-sdb-reva.dts1 // SPDX-License-Identifier: GPL-2.0
5 #include "imx6sx-sdb.dtsi"
9 compatible = "fsl,imx6sx-sdb-reva", "fsl,imx6sx";
13 clock-frequency = <100000>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_i2c1>;
24 regulator-min-microvolt = <300000>;
25 regulator-max-microvolt = <1875000>;
26 regulator-boot-on;
27 regulator-always-on;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6sx-sdb.dts9 #include "imx6sx-sdb.dtsi"
16 clock-frequency = <100000>;
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_i2c1>;
27 regulator-min-microvolt = <300000>;
28 regulator-max-microvolt = <1875000>;
29 regulator-boot-on;
30 regulator-always-on;
31 regulator-ramp-delay = <6250>;
35 regulator-min-microvolt = <800000>;
[all …]
H A Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
12 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 pinctrl-names = "default";
18 pinctrl-0 = <&cec_pins_a>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&i2c2_pins_a>;
25 i2c-scl-rising-time-ns = <185>;
[all …]
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
H A Dimx6sx-sabreauto.dts9 /dts-v1/;
15 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "regulator-fixed";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_vcc_sd3>;
31 regulator-name = "VCC_SD3";
32 regulator-min-microvolt = <3000000>;
[all …]
H A Drk3288-popmetal.dtsi2 * This file is dual-licensed: you can use it either under the terms
49 ext_gmac: external-gmac-clock {
50 compatible = "fixed-clock";
51 clock-frequency = <125000000>;
52 clock-output-names = "ext_gmac";
53 #clock-cells = <0>;
56 gpio-keys {
57 compatible = "gpio-keys";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pwrbtn>;
[all …]
H A Drk3288-phycore-som.dtsi2 * Device tree file for Phytec phyCORE-RK3288 SoM
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/net/ti-dp83867.h>
50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
67 ext_gmac: external-gmac-clock {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <125000000>;
71 clock-output-names = "ext_gmac";
75 compatible = "rockchip,rk3288-io-voltage-domain";
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
36 leds: user-leds {
[all …]
H A Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
26 regulator-max-microvolt = <12000000>;
[all …]
H A Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
H A Drk3288-firefly.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/input/input.h>
15 adc-keys {
16 compatible = "adc-keys";
17 io-channels = <&saradc 1>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-recovery {
24 press-threshold-microvolt = <0>;
28 dovdd_1v8: dovdd-1v8-regulator {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
42 to report their voltage. The IO Voltage Domain for any non-specified
48 - rockchip,px30-io-voltage-domain
49 - rockchip,px30-pmu-io-voltage-domain
50 - rockchip,rk3188-io-voltage-domain
51 - rockchip,rk3228-io-voltage-domain
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/media/video-interfaces.h>
15 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
23 stdout-path = "serial0:115200n8";
27 clk_ext_camera: clk-ext-camera {
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7742-iwg21d-q7.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board
9 * SSI-SGTL5000
31 /dts-v1/;
32 #include "r8a7742-iwg21m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
36 model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H";
47 stdout-path = "serial2:115200n8";
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
[all …]
/openbmc/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
71 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
79 int (*write)(struct rockchip_iodomain_supply *supply, int uV);
82 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument
84 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
89 switch (supply->idx) { in rk3568_iodomain_write()
93 b = supply->idx; in rk3568_iodomain_write()
95 b = supply->idx + 4; in rk3568_iodomain_write()
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pbx.dtsi23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-pbx";
49 vmmc: regulator-vmmc {
50 compatible = "regulator-fixed";
51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
[all …]
H A Darm-realview-eb.dtsi23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "arm,realview-eb";
49 compatible = "regulator-fixed";
50 regulator-name = "vmmc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-boot-on;
[all …]
H A Darm-realview-pb11mp.dts23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb11mp";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 enable-method = "arm,realview-smp";
60 next-level-cache = <&L2>;
[all …]
/openbmc/qemu/hw/arm/
H A Dvexpress.c4 * Copyright (c) 2010 - 2011 B Labs Ltd.
20 * Contributions after 2012-01-13 are licensed under the terms of the
38 #include "qemu/error-report.h"
48 #include "target/arm/cpu-qom.h"
61 * the "legacy" one (used for A9) and the "Cortex-A Series"
187 #define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9")
188 #define TYPE_VEXPRESS_A15_MACHINE MACHINE_TYPE_NAME("vexpress-a15")
216 unsigned int smp_cpus = ms->smp.cpus; in init_cpus()
231 if (object_property_find(cpuobj, "reset-cbar")) { in init_cpus()
232 object_property_set_int(cpuobj, "reset-cbar", periphbase, in init_cpus()
[all …]
H A Dsbsa-ref.c24 #include "qemu/error-report.h"
39 #include "hw/ide/ide-bus.h"
40 #include "hw/ide/ahci-sysbus.h"
44 #include "hw/pci-host/gpex.h"
45 #include "hw/qdev-properties.h"
53 #include "target/arm/cpu-qom.h"
65 * and the SBSA watchdog-timer). Older (<2.11) versions of the TF-A firmware
110 #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref")
137 /* 32-bit address PCIE MMIO space */
170 qemu_fdt_add_subnode(sms->fdt, intc_nodename); in sbsa_fdt_add_gic_node()
[all …]
H A Dvirt.c2 * ARM mach-virt emulation
23 * + we want to present a very stripped-down minimalist platform,
41 #include "hw/vfio/vfio-calxeda-xgmac.h"
42 #include "hw/vfio/vfio-amd-xgbe.h"
56 #include "qemu/error-report.h"
58 #include "hw/pci-host/gpex.h"
59 #include "hw/virtio/virtio-pci.h"
60 #include "hw/core/sysbus-fdt.h"
61 #include "hw/platform-bus.h"
62 #include "hw/qdev-properties.h"
[all …]