Lines Matching +full:flash1 +full:- +full:supply
24 #include "qemu/error-report.h"
39 #include "hw/ide/ide-bus.h"
40 #include "hw/ide/ahci-sysbus.h"
44 #include "hw/pci-host/gpex.h"
45 #include "hw/qdev-properties.h"
53 #include "target/arm/cpu-qom.h"
65 * and the SBSA watchdog-timer). Older (<2.11) versions of the TF-A firmware
110 #define TYPE_SBSA_MACHINE MACHINE_TYPE_NAME("sbsa-ref")
137 /* 32-bit address PCIE MMIO space */
170 qemu_fdt_add_subnode(sms->fdt, intc_nodename); in sbsa_fdt_add_gic_node()
171 qemu_fdt_setprop_sized_cells(sms->fdt, intc_nodename, "reg", in sbsa_fdt_add_gic_node()
177 qemu_fdt_add_subnode(sms->fdt, its_nodename); in sbsa_fdt_add_gic_node()
178 qemu_fdt_setprop_sized_cells(sms->fdt, its_nodename, "reg", in sbsa_fdt_add_gic_node()
191 void *fdt = create_device_tree(&sms->fdt_size); in create_fdt()
193 int nb_numa_nodes = ms->numa_state->num_nodes; in create_fdt()
201 sms->fdt = fdt; in create_fdt()
203 qemu_fdt_setprop_string(fdt, "/", "compatible", "linux,sbsa-ref"); in create_fdt()
204 qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x2); in create_fdt()
205 qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); in create_fdt()
209 * - A QEMU versioned machine type; a given version of QEMU will emulate in create_fdt()
211 * - A reflection of level of SBSA (now SystemReady SR) support provided. in create_fdt()
213 * machine-version-major: updated when changes breaking fw compatibility in create_fdt()
215 * machine-version-minor: updated when features are added that don't break in create_fdt()
218 qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0); in create_fdt()
219 qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 4); in create_fdt()
221 if (ms->numa_state->have_numa_distance) { in create_fdt()
232 cpu_to_be32(ms->numa_state->nodes[i].distance[j]); in create_fdt()
236 qemu_fdt_add_subnode(fdt, "/distance-map"); in create_fdt()
237 qemu_fdt_setprop(fdt, "/distance-map", "distance-matrix", in create_fdt()
244 * On ARM v8 64-bit systems this property is required in create_fdt()
247 * * If cpus node's #address-cells property is set to 2 in create_fdt()
255 qemu_fdt_add_subnode(sms->fdt, "/cpus"); in create_fdt()
256 qemu_fdt_setprop_cell(sms->fdt, "/cpus", "#address-cells", 2); in create_fdt()
257 qemu_fdt_setprop_cell(sms->fdt, "/cpus", "#size-cells", 0x0); in create_fdt()
259 for (cpu = sms->smp_cpus - 1; cpu >= 0; cpu--) { in create_fdt()
265 qemu_fdt_add_subnode(sms->fdt, nodename); in create_fdt()
266 qemu_fdt_setprop_u64(sms->fdt, nodename, "reg", mpidr); in create_fdt()
268 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { in create_fdt()
269 qemu_fdt_setprop_cell(sms->fdt, nodename, "numa-node-id", in create_fdt()
270 ms->possible_cpus->cpus[cs->cpu_index].props.node_id); in create_fdt()
277 qemu_fdt_add_subnode(sms->fdt, "/cpus/topology"); in create_fdt()
279 qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "sockets", ms->smp.sockets); in create_fdt()
280 qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "clusters", ms->smp.clusters); in create_fdt()
281 qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "cores", ms->smp.cores); in create_fdt()
282 qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "threads", ms->smp.threads); in create_fdt()
299 qdev_prop_set_uint64(dev, "sector-length", SBSA_FLASH_SECTOR_SIZE); in sbsa_flash_create1()
301 qdev_prop_set_uint8(dev, "device-width", 2); in sbsa_flash_create1()
302 qdev_prop_set_bit(dev, "big-endian", false); in sbsa_flash_create1()
316 sms->flash[0] = sbsa_flash_create1(sms, "sbsa.flash0", "pflash0"); in sbsa_flash_create()
317 sms->flash[1] = sbsa_flash_create1(sms, "sbsa.flash1", "pflash1"); in sbsa_flash_create()
328 qdev_prop_set_uint32(dev, "num-blocks", size / SBSA_FLASH_SECTOR_SIZE); in sbsa_flash_map1()
349 sbsa_flash_map1(sms->flash[0], flashbase, flashsize, in sbsa_flash_map()
351 sbsa_flash_map1(sms->flash[1], flashbase + flashsize, flashsize, in sbsa_flash_map()
363 /* Map legacy -drive if=pflash to machine properties */ in sbsa_firmware_init()
364 for (i = 0; i < ARRAY_SIZE(sms->flash); i++) { in sbsa_firmware_init()
365 pflash_cfi01_legacy_drive(sms->flash[i], in sbsa_firmware_init()
371 pflash_blk0 = pflash_cfi01_get_blk(sms->flash[0]); in sbsa_firmware_init()
373 bios_name = MACHINE(sms)->firmware; in sbsa_firmware_init()
381 "specified with -bios or with -drive if=pflash... " in sbsa_firmware_init()
386 /* Fall back to -bios */ in sbsa_firmware_init()
393 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(sms->flash[0]), 0); in sbsa_firmware_init()
412 memory_region_init_ram(secram, NULL, "sbsa-ref.secure-ram", size, in create_secure_ram()
424 object_property_set_link(OBJECT(dev), "parent-gicv3", OBJECT(sms->gic), in create_its()
432 unsigned int smp_cpus = MACHINE(sms)->smp.cpus; in create_gic()
441 sms->gic = qdev_new(gictype); in create_gic()
442 qdev_prop_set_uint32(sms->gic, "revision", 3); in create_gic()
443 qdev_prop_set_uint32(sms->gic, "num-cpu", smp_cpus); in create_gic()
445 * Note that the num-irq property counts both internal and external in create_gic()
448 qdev_prop_set_uint32(sms->gic, "num-irq", NUM_IRQS + 32); in create_gic()
449 qdev_prop_set_bit(sms->gic, "has-security-extensions", true); in create_gic()
457 qdev_prop_set_array(sms->gic, "redist-region-count", redist_region_count); in create_gic()
459 object_property_set_link(OBJECT(sms->gic), "sysmem", in create_gic()
461 qdev_prop_set_bit(sms->gic, "has-lpi", true); in create_gic()
463 gicbusdev = SYS_BUS_DEVICE(sms->gic); in create_gic()
491 qdev_get_gpio_in(sms->gic, in create_gic()
495 qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt", 0, in create_gic()
496 qdev_get_gpio_in(sms->gic, in create_gic()
500 qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0, in create_gic()
501 qdev_get_gpio_in(sms->gic, in create_gic()
528 sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); in create_uart()
536 sysbus_create_simple("pl031", base, qdev_get_gpio_in(sms->gic, irq)); in create_rtc()
547 qdev_prop_set_uint64(dev, "clock-frequency", SBSA_GTIMER_HZ); in create_wdt()
551 sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); in create_wdt()
572 qdev_get_gpio_in(sms->gic, irq)); in create_gpio()
574 gpio_key_dev = sysbus_create_simple("gpio-key", -1, in create_gpio()
589 dev = qdev_new("sysbus-ahci"); in create_ahci()
590 qdev_prop_set_uint32(dev, "num-ports", NUM_SATA_PORTS); in create_ahci()
593 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq)); in create_ahci()
597 ahci_ide_create_devs(&sysahci->ahci, hd); in create_ahci()
609 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq)); in create_xhci()
622 object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), in create_smmu()
628 qdev_get_gpio_in(sms->gic, irq + i)); in create_smmu()
655 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", in create_pcie()
662 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", in create_pcie()
668 memory_region_init_alias(mmio_alias_high, OBJECT(dev), "pcie-mmio-high", in create_pcie()
678 qdev_get_gpio_in(sms->gic, irq + i)); in create_pcie()
684 pci_init_nic_devices(pci->bus, mc->default_nic); in create_pcie()
686 pci_create_simple(pci->bus, -1, "bochs-display"); in create_pcie()
688 create_smmu(sms, pci->bus); in create_pcie()
696 *fdt_size = board->fdt_size; in sbsa_ref_dtb()
697 return board->fdt; in sbsa_ref_dtb()
703 DeviceState *dev = qdev_new("sbsa-ec"); in create_secure_ec()
712 unsigned int smp_cpus = machine->smp.cpus; in sbsa_ref_init()
713 unsigned int max_cpus = machine->smp.max_cpus; in sbsa_ref_init()
723 error_report("sbsa-ref: KVM is not supported for this machine"); in sbsa_ref_init()
730 * containing the system memory at low priority; any secure-only in sbsa_ref_init()
733 memory_region_init(secure_sysmem, OBJECT(machine), "secure-memory", in sbsa_ref_init()
735 memory_region_add_subregion_overlap(secure_sysmem, 0, sysmem, -1); in sbsa_ref_init()
740 * This machine has EL3 enabled, external firmware should supply PSCI in sbsa_ref_init()
743 sms->psci_conduit = QEMU_PSCI_CONDUIT_DISABLED; in sbsa_ref_init()
749 "supported by machine 'sbsa-ref' (%d)", in sbsa_ref_init()
754 sms->smp_cpus = smp_cpus; in sbsa_ref_init()
756 if (machine->ram_size > sbsa_ref_memmap[SBSA_MEM].size) { in sbsa_ref_init()
757 error_report("sbsa-ref: cannot model more than %dGB RAM", RAMLIMIT_GB); in sbsa_ref_init()
761 possible_cpus = mc->possible_cpu_arch_ids(machine); in sbsa_ref_init()
762 for (n = 0; n < possible_cpus->len; n++) { in sbsa_ref_init()
770 cpuobj = object_new(possible_cpus->cpus[n].type); in sbsa_ref_init()
771 object_property_set_int(cpuobj, "mp-affinity", in sbsa_ref_init()
772 possible_cpus->cpus[n].arch_id, NULL); in sbsa_ref_init()
775 cs->cpu_index = n; in sbsa_ref_init()
777 numa_cpu_pre_plug(&possible_cpus->cpus[cs->cpu_index], DEVICE(cpuobj), in sbsa_ref_init()
780 if (object_property_find(cpuobj, "reset-cbar")) { in sbsa_ref_init()
781 object_property_set_int(cpuobj, "reset-cbar", in sbsa_ref_init()
791 object_property_set_link(cpuobj, "secure-memory", in sbsa_ref_init()
799 machine->ram); in sbsa_ref_init()
826 sms->bootinfo.ram_size = machine->ram_size; in sbsa_ref_init()
827 sms->bootinfo.board_id = -1; in sbsa_ref_init()
828 sms->bootinfo.loader_start = sbsa_ref_memmap[SBSA_MEM].base; in sbsa_ref_init()
829 sms->bootinfo.get_dtb = sbsa_ref_dtb; in sbsa_ref_init()
830 sms->bootinfo.firmware_loaded = firmware_loaded; in sbsa_ref_init()
831 arm_load_kernel(ARM_CPU(first_cpu), machine, &sms->bootinfo); in sbsa_ref_init()
836 unsigned int max_cpus = ms->smp.max_cpus; in sbsa_ref_possible_cpu_arch_ids()
840 if (ms->possible_cpus) { in sbsa_ref_possible_cpu_arch_ids()
841 assert(ms->possible_cpus->len == max_cpus); in sbsa_ref_possible_cpu_arch_ids()
842 return ms->possible_cpus; in sbsa_ref_possible_cpu_arch_ids()
845 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + in sbsa_ref_possible_cpu_arch_ids()
847 ms->possible_cpus->len = max_cpus; in sbsa_ref_possible_cpu_arch_ids()
848 for (n = 0; n < ms->possible_cpus->len; n++) { in sbsa_ref_possible_cpu_arch_ids()
849 ms->possible_cpus->cpus[n].type = ms->cpu_type; in sbsa_ref_possible_cpu_arch_ids()
850 ms->possible_cpus->cpus[n].arch_id = in sbsa_ref_possible_cpu_arch_ids()
852 ms->possible_cpus->cpus[n].props.has_thread_id = true; in sbsa_ref_possible_cpu_arch_ids()
853 ms->possible_cpus->cpus[n].props.thread_id = n; in sbsa_ref_possible_cpu_arch_ids()
855 return ms->possible_cpus; in sbsa_ref_possible_cpu_arch_ids()
862 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); in sbsa_ref_cpu_index_to_props()
864 assert(cpu_index < possible_cpus->len); in sbsa_ref_cpu_index_to_props()
865 return possible_cpus->cpus[cpu_index].props; in sbsa_ref_cpu_index_to_props()
871 return idx % ms->numa_state->num_nodes; in sbsa_ref_get_default_cpu_node_id()
885 ARM_CPU_TYPE_NAME("cortex-a57"), in sbsa_ref_class_init()
886 ARM_CPU_TYPE_NAME("cortex-a72"), in sbsa_ref_class_init()
887 ARM_CPU_TYPE_NAME("neoverse-n1"), in sbsa_ref_class_init()
888 ARM_CPU_TYPE_NAME("neoverse-v1"), in sbsa_ref_class_init()
889 ARM_CPU_TYPE_NAME("neoverse-n2"), in sbsa_ref_class_init()
894 mc->init = sbsa_ref_init; in sbsa_ref_class_init()
895 mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine"; in sbsa_ref_class_init()
896 mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2"); in sbsa_ref_class_init()
897 mc->valid_cpu_types = valid_cpu_types; in sbsa_ref_class_init()
898 mc->max_cpus = 512; in sbsa_ref_class_init()
899 mc->pci_allow_0_address = true; in sbsa_ref_class_init()
900 mc->minimum_page_bits = 12; in sbsa_ref_class_init()
901 mc->block_default_type = IF_IDE; in sbsa_ref_class_init()
902 mc->no_cdrom = 1; in sbsa_ref_class_init()
903 mc->default_nic = "e1000e"; in sbsa_ref_class_init()
904 mc->default_ram_size = 1 * GiB; in sbsa_ref_class_init()
905 mc->default_ram_id = "sbsa-ref.ram"; in sbsa_ref_class_init()
906 mc->default_cpus = 4; in sbsa_ref_class_init()
907 mc->smp_props.clusters_supported = true; in sbsa_ref_class_init()
908 mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids; in sbsa_ref_class_init()
909 mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props; in sbsa_ref_class_init()
910 mc->get_default_cpu_node_id = sbsa_ref_get_default_cpu_node_id; in sbsa_ref_class_init()
912 mc->cpu_cluster_has_numa_boundary = true; in sbsa_ref_class_init()