/openbmc/linux/sound/soc/sh/rcar/ |
H A D | dvc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Renesas R-Car DVC support 10 * amixer set "DVC Out" 100% 13 * amixer set "DVC In" 100% 16 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 22 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 23 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 24 * amixer set "DVC Out Ramp" on 26 * amixer set "DVC Out" 80% // Volume Down [all …]
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H A D | cmd.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Renesas R-Car CMD support 16 #define rsnd_cmd_nr(priv) ((priv)->cmd_nr) 20 ((pos) = (struct rsnd_cmd *)(priv)->cmd + i); \ 27 struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); in rsnd_cmd_init() local 38 if (!mix && !dvc) in rsnd_cmd_init() 42 return -ENXIO; in rsnd_cmd_init() 55 struct rsnd_dai_stream *tio = &rdai->playback; in rsnd_cmd_init() 61 tio = &rdai->capture; in rsnd_cmd_init() 82 return -EIO; in rsnd_cmd_init() [all …]
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H A D | dma.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Renesas R-Car Audio DMAC support 53 #define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma) 55 #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en) 56 #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp) 104 if (dmaen->chan) in rsnd_dmaen_stop() 105 dmaengine_terminate_async(dmaen->chan); in rsnd_dmaen_stop() 122 if (dmaen->chan) in rsnd_dmaen_cleanup() 123 dma_release_channel(dmaen->chan); in rsnd_dmaen_cleanup() 125 dmaen->chan = NULL; in rsnd_dmaen_cleanup() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 snd-soc-rcar-objs := core.o gen.o dma.o adg.o ssi.o ssiu.o src.o ctu.o mix.o dvc.o cmd.o debugfs.o 3 obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | renesas,rsnd.txt | 1 Renesas R-Car sound 7 Renesas R-Car and RZ/G sound is constructed from below modules 11 - SRC : Sampling Rate Converter 12 - CMD 13 - CTU : Channel Transfer Unit 14 - MIX : Mixer 15 - DVC : Digital Volume and Mute Function 25 Multi channel is supported by Multi-SSI, or TDM-SSI. 27 Multi-SSI : 6ch case, you can use stereo x 3 SSI 28 TDM-SSI : 6ch case, you can use TDM [all …]
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H A D | renesas,rsnd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car Sound Driver 10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 13 port-def: 14 $ref: audio-graph-port.yaml#/definitions/port-base 17 "^endpoint(@[0-9a-f]+)?": 18 $ref: audio-graph-port.yaml#/definitions/endpoint-base 21 $ref: /schemas/types.yaml#/definitions/phandle-array [all …]
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/openbmc/linux/arch/arm/boot/dts/renesas/ |
H A D | r8a7745-iwg22d-sodimm.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board 9 * SSI-SGTL5000 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on [all …]
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H A D | iwg20d-q7-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board 9 * SSI-SGTL5000 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7742-iwg21d-q7.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the iWave-RZ/G1H Qseven board 9 * SSI-SGTL5000 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7793-gose.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2015 Renesas Electronics Corporation 9 * SSI-AK4643 18 * amixer set "DVC Out" 100% 19 * amixer set "DVC In" 100% 23 * amixer set "DVC Out Mute" on 24 * amixer set "DVC In Mute" on 28 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 29 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 30 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7791-koelsch.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 11 * SSI-AK4643 20 * amixer set "DVC Out" 100% 21 * amixer set "DVC In" 100% 25 * amixer set "DVC Out Mute" on 26 * amixer set "DVC In Mute" on 30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 32 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7790-lager.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2015-2016 Renesas Electronics Corporation 11 * SSI-AK4643 20 * amixer set "DVC Out" 100% 21 * amixer set "DVC In" 100% 25 * amixer set "DVC Out Mute" on 26 * amixer set "DVC In Mute" on 30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" [all …]
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/openbmc/linux/Documentation/devicetree/bindings/i2c/ |
H A D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Thierry Reding <thierry.reding@gmail.com> 9 - Jon Hunter <jonathanh@nvidia.com> 16 - description: Tegra20 has 4 generic I2C controller. This can support 17 master and slave mode of I2C communication. The i2c-tegra driver 19 controller is only compatible with "nvidia,tegra20-i2c". 20 const: nvidia,tegra20-i2c [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | salvator-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for common parts of Salvator-X board variants 5 * Copyright (C) 2015-2016 Renesas Electronics Corp. 9 * SSI-AK4613 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" [all …]
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H A D | r8a7793-gose.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2015 Renesas Electronics Corporation 9 * SSI-AK4643 18 * amixer set "DVC Out" 100% 19 * amixer set "DVC In" 100% 23 * amixer set "DVC Out Mute" on 24 * amixer set "DVC In Mute" on 28 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 29 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 30 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7791-koelsch.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 11 * SSI-AK4643 20 * amixer set "DVC Out" 100% 21 * amixer set "DVC In" 100% 25 * amixer set "DVC Out Mute" on 26 * amixer set "DVC In Mute" on 30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 32 * amixer set "DVC Out Ramp" on [all …]
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H A D | r8a7790-lager.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2015-2016 Renesas Electronics Corporation 11 * SSI-AK4643 20 * amixer set "DVC Out" 100% 21 * amixer set "DVC In" 100% 25 * amixer set "DVC Out Mute" on 26 * amixer set "DVC In Mute" on 30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" [all …]
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/openbmc/u-boot/drivers/i2c/ |
H A D | tegra_i2c.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright (c) 2010-2011 NVIDIA Corporation 20 #include <asm/arch-tegra/tegra_i2c.h> 47 if (i2c_bus->type == TYPE_DVC) { in set_packet_mode() 48 struct dvc_ctlr *dvc = (struct dvc_ctlr *)i2c_bus->regs; in set_packet_mode() local 50 writel(config, &dvc->cnfg); in set_packet_mode() 52 writel(config, &i2c_bus->regs->cnfg); in set_packet_mode() 57 setbits_le32(&i2c_bus->regs->sl_cnfg, I2C_SL_CNFG_NEWSL_MASK); in set_packet_mode() 64 reset_assert(&i2c_bus->reset_ctl); in i2c_reset_controller() 66 reset_deassert(&i2c_bus->reset_ctl); in i2c_reset_controller() [all …]
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | salvator-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for common parts of Salvator-X board variants 5 * Copyright (C) 2015-2016 Renesas Electronics Corp. 9 * SSI-AK4613 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" [all …]
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/openbmc/linux/Documentation/powerpc/ |
H A D | ptrace.rst | 9 2 hardware watchpoints (read, write and read-write) (DAC) 10 2 value conditions for the hardware watchpoints (DVC) 15 that GDB doesn't need to special-case each of them. We added the 24 an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid 38 unit32_t sizeof_condition; /* size of the DVC register */ 84 DAC and DVC registers will be set in the same request. 92 request to ask for its removal. Return -ENOSPC if the requested breakpoint 97 - set a breakpoint in the first breakpoint register:: 107 - set a watchpoint which triggers on reads in the second watchpoint register:: 117 - set a watchpoint which triggers only with a specific value:: [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra20/ |
H A D | pmu.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <asm/arch-tegra/ap.h> 13 #include <asm/arch-tegra/tegra_i2c.h> 14 #include <asm/arch-tegra/sys_proto.h> 46 return -1; in pmu_set_nominal() 51 debug("%s: Cannot find DVC I2C bus\n", __func__); in pmu_set_nominal() 56 debug("%s: Cannot find DVC I2C chip\n", __func__); in pmu_set_nominal()
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/openbmc/linux/drivers/char/hw_random/ |
H A D | intel-rng.c | 59 #define FWH_DEC_EN1_REG_NEW 0xd9 /* high byte of 16-bit register */ 152 " positive value - skip if FWH space locked read-only\n" 153 " negative value - skip always"); 169 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_data_present() 184 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_data_read() 193 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_init() 195 int err = -EIO; in intel_rng_init() 212 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_cleanup() 243 u8 mfc, dvc; in intel_rng_hw_init() local 247 if (!(intel_rng_hw->fwh_dec_en1_val & FWH_F8_EN_MASK)) in intel_rng_hw_init() [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. 11 #include <asm/arch-tegra/clk_rst.h> 12 #include <asm/arch-tegra/pmc.h> 13 #include <asm/arch-tegra/tegra_i2c.h> 16 /* Tegra30-specific CPU init code */ 21 writel(addr, ®->cmd_addr0); in tegra_i2c_ll_write_addr() 22 writel(config, ®->cnfg); in tegra_i2c_ll_write_addr() 29 writel(data, ®->cmd_data1); in tegra_i2c_ll_write_data() 30 writel(config, ®->cnfg); in tegra_i2c_ll_write_data() [all …]
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra/ |
H A D | tegra_i2c.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright 2010-2011 NVIDIA Corporation 20 I2C_IS_10_BIT_ADDRESS = 0x2, /* for 10-bit I2C slave address */ 149 * Returns the bus number of the DVC controller 151 * @return number of bus, or -1 if there is no DVC active
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/openbmc/linux/arch/powerpc/include/uapi/asm/ |
H A D | ptrace.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 9 * since we can keep non-volatile in the thread_struct 56 unsigned long dsisr; /* on 4xx/Book-E used for ESR */ 129 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ 132 #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ 138 * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 140 #define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ 146 * The transfer totals 34 quadword. Quadwords 0-31 contain the 153 * structures. This also simplifies the implementation of a bi-arch 154 * (combined (32- and 64-bit) gdb. [all …]
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