Lines Matching +full:dvc +full:-
1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (c) 2010-2011 NVIDIA Corporation
20 #include <asm/arch-tegra/tegra_i2c.h>
47 if (i2c_bus->type == TYPE_DVC) { in set_packet_mode()
48 struct dvc_ctlr *dvc = (struct dvc_ctlr *)i2c_bus->regs; in set_packet_mode() local
50 writel(config, &dvc->cnfg); in set_packet_mode()
52 writel(config, &i2c_bus->regs->cnfg); in set_packet_mode()
57 setbits_le32(&i2c_bus->regs->sl_cnfg, I2C_SL_CNFG_NEWSL_MASK); in set_packet_mode()
64 reset_assert(&i2c_bus->reset_ctl); in i2c_reset_controller()
66 reset_deassert(&i2c_bus->reset_ctl); in i2c_reset_controller()
69 /* re-program config register to packet mode */ in i2c_reset_controller()
77 ret = reset_assert(&i2c_bus->reset_ctl); in i2c_init_clock()
80 ret = clk_enable(&i2c_bus->clk); in i2c_init_clock()
83 ret = clk_set_rate(&i2c_bus->clk, rate); in i2c_init_clock()
86 ret = reset_deassert(&i2c_bus->reset_ctl); in i2c_init_clock()
95 if (!i2c_bus->speed) in i2c_init_controller()
97 debug("%s: speed=%d\n", __func__, i2c_bus->speed); in i2c_init_controller()
99 * Use PLLP - DP-04508-001_v06 datasheet indicates a divisor of 8 in i2c_init_controller()
103 i2c_init_clock(i2c_bus, i2c_bus->speed * 2 * 8); in i2c_init_controller()
105 if (i2c_bus->type == TYPE_114) { in i2c_init_controller()
117 int clk_div_stdfst_mode = readl(&i2c_bus->regs->clk_div) >> 16; in i2c_init_controller()
119 (clk_div_stdfst_mode + 1) * i2c_bus->speed * 2; in i2c_init_controller()
130 if (i2c_bus->type == TYPE_DVC) { /* only for DVC I2C */ in i2c_init_controller()
131 struct dvc_ctlr *dvc = (struct dvc_ctlr *)i2c_bus->regs; in i2c_init_controller() local
133 setbits_le32(&dvc->ctrl3, DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK); in i2c_init_controller()
137 funcmux_select(i2c_bus->clk.id, i2c_bus->pinmux_config); in i2c_init_controller()
152 data |= i2c_bus->id << PKT_HDR1_CTLR_ID_SHIFT; in send_packet_headers()
153 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
157 data = (trans->num_bytes - 1) << PKT_HDR2_PAYLOAD_SIZE_SHIFT; in send_packet_headers()
158 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
162 data = trans->address << PKT_HDR3_SLAVE_ADDR_SHIFT; in send_packet_headers()
165 if (!(trans->flags & I2C_IS_WRITE)) in send_packet_headers()
171 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
181 count = (readl(&control->fifo_status) & TX_FIFO_EMPTY_CNT_MASK) in wait_for_tx_fifo_empty()
186 timeout_us -= 10; in wait_for_tx_fifo_empty()
198 count = (readl(&control->fifo_status) & TX_FIFO_FULL_CNT_MASK) in wait_for_rx_fifo_notempty()
203 timeout_us -= 10; in wait_for_rx_fifo_notempty()
215 int_status = readl(&control->int_status); in wait_for_transfer_complete()
217 return -int_status; in wait_for_transfer_complete()
219 return -int_status; in wait_for_transfer_complete()
224 timeout_us -= 10; in wait_for_transfer_complete()
227 return -1; in wait_for_transfer_complete()
233 struct i2c_control *control = i2c_bus->control; in send_recv_packets()
240 int is_write = trans->flags & I2C_IS_WRITE; in send_recv_packets()
243 int_status = readl(&control->int_status); in send_recv_packets()
244 writel(int_status, &control->int_status); in send_recv_packets()
247 trans->flags & I2C_USE_REPEATED_START); in send_recv_packets()
249 words = DIV_ROUND_UP(trans->num_bytes, 4); in send_recv_packets()
250 last_bytes = trans->num_bytes & 3; in send_recv_packets()
251 dptr = trans->buf; in send_recv_packets()
266 writel(local, &control->tx_fifo); in send_recv_packets()
269 error = -1; in send_recv_packets()
274 error = -1; in send_recv_packets()
281 local = readl(&control->rx_fifo); in send_recv_packets()
290 words--; in send_recv_packets()
295 error = -1; in send_recv_packets()
350 i2c_bus->speed = speed; in tegra_i2c_set_bus_speed()
362 i2c_bus->id = dev->seq; in tegra_i2c_probe()
363 i2c_bus->type = dev_get_driver_data(dev); in tegra_i2c_probe()
364 i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev); in tegra_i2c_probe()
365 if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) { in tegra_i2c_probe()
367 return -EINVAL; in tegra_i2c_probe()
370 ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl); in tegra_i2c_probe()
375 ret = clk_get_by_name(dev, "div-clk", &i2c_bus->clk); in tegra_i2c_probe()
386 i2c_bus->pinmux_config = FUNCMUX_DEFAULT; in tegra_i2c_probe()
394 * if (i2c_bus->clk.id == PERIPH_ID_I2C2) in tegra_i2c_probe()
395 * i2c_bus->pinmux_config = FUNCMUX_I2C2_PTA; in tegra_i2c_probe()
401 i2c_bus->control = in tegra_i2c_probe()
402 &((struct dvc_ctlr *)i2c_bus->regs)->control; in tegra_i2c_probe()
404 i2c_bus->control = &i2c_bus->regs->control; in tegra_i2c_probe()
408 is_dvc ? "dvc" : "i2c", dev->seq, i2c_bus->regs, i2c_bus->speed); in tegra_i2c_probe()
426 /* Shift 7-bit address over for lower-level i2c functions */ in i2c_write_data()
442 /* Shift 7-bit address over for lower-level i2c functions */ in i2c_read_data()
466 /* Shift 7-bit address over for lower-level i2c functions */ in tegra_i2c_probe_chip()
480 for (; nmsgs > 0; nmsgs--, msg++) { in tegra_i2c_xfer()
483 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); in tegra_i2c_xfer()
484 if (msg->flags & I2C_M_RD) { in tegra_i2c_xfer()
485 ret = i2c_read_data(i2c_bus, msg->addr, msg->buf, in tegra_i2c_xfer()
486 msg->len); in tegra_i2c_xfer()
488 ret = i2c_write_data(i2c_bus, msg->addr, msg->buf, in tegra_i2c_xfer()
489 msg->len, next_is_read); in tegra_i2c_xfer()
493 return -EREMOTEIO; in tegra_i2c_xfer()
513 return -ENODEV; in tegra_i2c_get_dvc_bus()
523 { .compatible = "nvidia,tegra114-i2c", .data = TYPE_114 },
524 { .compatible = "nvidia,tegra20-i2c", .data = TYPE_STD },
525 { .compatible = "nvidia,tegra20-i2c-dvc", .data = TYPE_DVC },