Lines Matching +full:dvc +full:-

1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
9  * since we can keep non-volatile in the thread_struct
56 	unsigned long dsisr;		/* on 4xx/Book-E used for ESR */
129 #define PT_FPSCR (PT_FPR0 + 32)	/* each FP reg occupies 1 slot in 64-bit space */
132 #define PT_VR0 82	/* each Vector reg occupies 2 slots in 64-bit */
138  * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
140 #define PT_VSR0 150	/* each VSR reg occupies 2 slots in 64-bit */
146  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
153  * structures.  This also simplifies the implementation of a bi-arch
154  * (combined (32- and 64-bit) gdb.
159 /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
211 	__u32 sizeof_condition;		/* size of the DVC register */
236 	__u64 condition_value;	/* contents of the DVC register */