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/openbmc/linux/Documentation/devicetree/bindings/power/
H A Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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H A Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
19 This device tree binding can be used to bind PM domain consumer devices with
20 their PM domains provided by PM domain providers. A PM domain provider can be
23 phandle arguments (so called PM domain specifiers) of length specified by the
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/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
31 [2] Power State Coordination Interface (PSCI) specification
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/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-firmware-tfa.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 * Devices that use SC7180 with TrustedFirmware-A
10 /delete-property/ power-domains;
11 /delete-property/ power-domain-names;
13 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
19 /delete-property/ power-domains;
20 /delete-property/ power-domain-names;
22 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
28 /delete-property/ power-domains;
29 /delete-property/ power-domain-names;
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H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&intc>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 xo_board: xo-board {
19 compatible = "fixed-clock";
20 clock-frequency = <76800000>;
21 #clock-cells = <0>;
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H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom,rpmhpd.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&intc>;
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H A Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
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H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/phy/phy-qcom-qusb2.h>
17 #include <dt-bindings/power/qcom-rpmpd.h>
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H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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H A Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 interrupt-parent = <&intc>;
17 #address-cells = <2>;
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H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
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/openbmc/linux/drivers/cpuidle/
H A Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
39 u32 state; member
48 static inline void sbi_set_domain_state(u32 state) in sbi_set_domain_state() argument
52 data->available = true; in sbi_set_domain_state()
53 data->state = state; in sbi_set_domain_state()
60 return data->state; in sbi_get_domain_state()
67 data->available = false; in sbi_clear_domain_state()
74 return data->available; in sbi_is_domain_state_available()
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H A Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
29 #include "cpuidle-psci.h"
41 void psci_set_domain_state(u32 state) in psci_set_domain_state() argument
43 __this_cpu_write(domain_state, state); in psci_set_domain_state()
56 u32 *states = data->psci_states; in __psci_enter_domain_idle_state()
57 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
58 u32 state; in __psci_enter_domain_idle_state() local
63 return -1; in __psci_enter_domain_idle_state()
71 state = psci_get_domain_state(); in __psci_enter_domain_idle_state()
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H A Ddt_idle_genpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define pr_fmt(fmt) "dt-idle-genpd: " fmt
29 u32 state, *state_buf; in pd_parse_state_nodes() local
32 ret = parse_state(to_of_node(states[i].fwnode), &state); in pd_parse_state_nodes()
38 ret = -ENOMEM; in pd_parse_state_nodes()
41 *state_buf = state; in pd_parse_state_nodes()
48 i--; in pd_parse_state_nodes()
49 for (; i >= 0; i--) in pd_parse_state_nodes()
61 /* Parse the domain idle states. */ in pd_parse_states()
66 /* Fill out the dt specifics for each found state. */ in pd_parse_states()
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/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight-cpu-debug.rst9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
20 to sample CPU program counter, secure state and exception level, etc; usually
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
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/openbmc/linux/drivers/base/power/
H A Ddomain_governor.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain_governor.c - Governors for device PM domains.
20 if (dev->power.subsys_data && dev->power.subsys_data->domain_data) { in dev_update_qos_constraint()
21 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in dev_update_qos_constraint()
24 * Only take suspend-time QoS constraints of devices into in dev_update_qos_constraint()
30 constraint_ns = td ? td->effective_constraint_ns : in dev_update_qos_constraint()
34 * The child is not in a domain and there's no info on its in dev_update_qos_constraint()
50 * default_suspend_ok - Default PM domain governor routine to suspend devices.
55 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in default_suspend_ok()
61 spin_lock_irqsave(&dev->power.lock, flags); in default_suspend_ok()
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/openbmc/linux/arch/arm/mach-omap2/
H A Dpm33xx-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
18 #include <linux/platform_data/gpio-omap.h>
33 #include "omap-secure.h"
52 return -ENOMEM; in am43xx_map_scu()
60 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am33xx_check_off_mode_enable()
69 * Check for am437x-gp-evm which has the right Hardware design to in am43xx_check_off_mode_enable()
72 if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode) in am43xx_check_off_mode_enable()
75 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am43xx_check_off_mode_enable()
80 static int amx3_common_init(int (*idle)(u32 wfi_flags)) in amx3_common_init()
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H A Dclockdomain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2008-2011 Nokia Corporation
29 * CLKDM_MISSING_IDLE_REPORTING: The idle status of the IP blocks and
31 * the PRCM when determining whether the clockdomain is idle.
33 * hardware-supervised idle mode, the PRCM may transition the
34 * enclosing powerdomain to a low power state, even when devices
38 * force-sleep mode, then the HW_AUTO mode will be used to put the
40 * the force-wakeup mode, then it will be used whenever a clock or
57 * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
58 * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
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/openbmc/linux/drivers/of/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0
7 * of_get_cpu_hwid - Get the hardware ID from a CPU device node
29 * arch_match_cpu_phys_id - Match the given logical CPU and physical id
79 * arch_find_n_match_cpu_physical_id - See if the given device node is
81 * else false. If 'thread' is non-NULL, the local thread number within the
87 /* Check for non-standard "ibm,ppc-interrupt-server#s" property in arch_find_n_match_cpu_physical_id()
93 "ibm,ppc-interrupt-server#s", in arch_find_n_match_cpu_physical_id()
101 * of_get_cpu_node - Get device node associated with the given logical CPU
146 return of_node_get(cpu_dev->of_node); in of_cpu_device_node_get()
155 * Return: The logical CPU number of the given CPU device_node or -ENODEV if the
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/openbmc/linux/Documentation/devicetree/bindings/arm/msm/
H A Dqcom,idle-state.txt1 QCOM Idle States for cpuidle driver
3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
16 trigger to execute the SPM state machine. The SPM state machine waits for the
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
19 the SPM state machine out of its wait, the next step is to ensure that the
21 execution. This state is defined as a generic ARM WFI state by the ARM cpuidle
22 driver and is not defined in the DT. The SPM state machine should be
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/openbmc/linux/Documentation/trace/
H A Devents-power.rst8 - Power state switch which reports events related to suspend (S-states),
9 cpuidle (C-states) and cpufreq (P-states)
10 - System clock related changes
11 - Power domains related changes and transitions
18 1. Power state switch events
22 -----------------
24 A 'cpu' event class gathers the CPU-related events: cpuidle and
28 cpu_idle "state=%lu cpu_id=%lu"
29 cpu_frequency "state=%lu cpu_id=%lu"
36 machine_suspend "state=%lu"
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/openbmc/linux/include/linux/
H A Dcpu_pm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * When a CPU goes to a low power state that turns off power to the CPU's
17 * power domain, the contents of some blocks (floating point coprocessors,
18 * interrupt controllers, caches, timers) in the same power domain can
19 * be lost. The cpm_pm notifiers provide a method for platform idle, suspend,
29 * CPU. They are used to save per-cpu context for affected blocks.
31 * CPU cluster notifications apply to all CPUs in a single power domain. They
33 * after all the CPUs in the power domain have been notified of the low power
34 * state.
41 /* A single cpu is entering a low power state */
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-regulator1 What: /sys/class/regulator/.../state
7 state. This reports the regulator enable control, for
20 supplying power to the system (unless some non-Linux
23 'unknown' means software cannot determine the state, or
24 the reported state is invalid.
38 - off
39 - on
40 - error
41 - fast
42 - normal
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