/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_hwseq.c | 43 hws->ctx 45 hws->regs->reg 49 hws->shifts->field_name, hws->masks->field_name 63 …config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_… in mmhub_update_page_table_config() 67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx() argument 71 config.system_aperture.fb_top = pa_config->system_aperture.fb_top; in dcn21_init_sys_ctx() 72 config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset; in dcn21_init_sys_ctx() 73 config.system_aperture.fb_base = pa_config->system_aperture.fb_base; in dcn21_init_sys_ctx() 74 config.system_aperture.agp_top = pa_config->system_aperture.agp_top; in dcn21_init_sys_ctx() 75 config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot; in dcn21_init_sys_ctx() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 61 hws->ctx 63 hws->regs->reg 65 dc->ctx->logger 70 hws->shifts->field_name, hws->masks->field_name 75 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut() 79 if (plane_state->blend_tf) { in dcn30_set_blend_lut() 80 if (plane_state->blend_tf->type == TF_TYPE_HWPWL) in dcn30_set_blend_lut() 81 blend_lut = &plane_state->blend_tf->pwl; in dcn30_set_blend_lut() 82 else if (plane_state->blend_tf->type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn30_set_blend_lut() 84 plane_state->blend_tf, &dpp_base->regamma_params, false); in dcn30_set_blend_lut() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hwseq.c | 62 hws->ctx 64 hws->regs->reg 68 hws->shifts->field_name, hws->masks->field_name 70 static int find_free_gsl_group(const struct dc *dc) in find_free_gsl_group() argument 72 if (dc->res_pool->gsl_groups.gsl_0 == 0) in find_free_gsl_group() 74 if (dc->res_pool->gsl_groups.gsl_1 == 0) in find_free_gsl_group() 76 if (dc->res_pool->gsl_groups.gsl_2 == 0) in find_free_gsl_group() 88 * - immediate flip: find first available GSL group if not already assigned 91 * - vsync flip: disable GSL if used 94 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1 [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_hwseq.c | 1 // SPDX-License-Identifier: MIT 61 hws->ctx 63 hws->regs->reg 65 dc->ctx->logger 70 hws->shifts->field_name, hws->masks->field_name 75 bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); in calc_mpc_flow_ctrl_cnt() 81 flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - in calc_mpc_flow_ctrl_cnt() 82 stream->timing.h_border_left - in calc_mpc_flow_ctrl_cnt() 83 stream->timing.h_border_right; in calc_mpc_flow_ctrl_cnt() 97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm_psr.c | 28 #include "dc.h" 35 struct dc *dc = link->ctx->dc; in link_supports_psrsu() local 37 if (!dc->caps.dmcub_support) in link_supports_psrsu() 40 if (dc->ctx->dce_version < DCN_VERSION_3_1) in link_supports_psrsu() 46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu() 47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu() 50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu() 51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu() 54 /* Temporarily disable PSR-SU to avoid glitches */ in link_supports_psrsu() 59 * amdgpu_dm_set_psr_caps() - set link psr capabilities [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_hwseq.c | 57 hws->ctx 59 hws->regs->reg 61 dc->ctx->logger 66 hws->shifts->field_name, hws->masks->field_name 68 static void enable_memory_low_power(struct dc *dc) in enable_memory_low_power() argument 70 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power() 73 if (dc->debug.enable_mem_low_power.bits.dmcu) { in enable_memory_low_power() 75 if (dc->debug.disable_dmcu || dc->config.disable_dmcu) { in enable_memory_low_power() 81 if (dc->debug.enable_mem_low_power.bits.optc) { in enable_memory_low_power() 86 if (dc->debug.enable_mem_low_power.bits.vga) { in enable_memory_low_power() [all …]
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/openbmc/linux/drivers/tty/ |
H A D | nozomi.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * nozomi.c -- HSDPA driver Broadband Wireless Data Card - Globe Trotter 18 * -------------------------------------------------------------------------- 25 * -------------------------------------------------------------------------- 78 if (tbuf[data_len - 2] == '\r') \ 79 tbuf[data_len - 2] = 'r'; \ 148 F32_2 = 2048, /* 512 bytes downlink + uplink * 2 -> 2048 */ 149 F32_8 = 8192, /* 3072 bytes downl. + 1024 bytes uplink * 2 -> 8192 */ 173 CTRL_ERROR = -1, 183 PORT_ERROR = -1, [all …]
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/openbmc/linux/drivers/gpu/drm/bridge/imx/ |
H A D | imx8qxp-pixel-link.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <linux/media-bus-format.h> 18 #include <dt-bindings/firmware/imx/rsrc.h> 20 #define DRIVER_NAME "imx8qxp-display-pixel-link" 43 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, in imx8qxp_pixel_link_enable_mst_en() 44 pl->mst_en_ctrl, true); in imx8qxp_pixel_link_enable_mst_en() 46 DRM_DEV_ERROR(pl->dev, in imx8qxp_pixel_link_enable_mst_en() 47 "failed to enable DC%u stream%u pixel link mst_en: %d\n", in imx8qxp_pixel_link_enable_mst_en() 48 pl->dc_id, pl->stream_id, ret); in imx8qxp_pixel_link_enable_mst_en() 55 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, in imx8qxp_pixel_link_enable_mst_vld() [all …]
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/openbmc/linux/drivers/power/supply/ |
H A D | max8903_charger.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * max8903_charger.c - Maxim 8903 USB/Adapter Charger Driver 28 struct gpio_desc *dok; /* DC (Adapter) Power OK output */ 32 struct gpio_desc *dcm; /* Current-Limit Mode input (1: DC, 2: USB) */ 53 val->intval = POWER_SUPPLY_STATUS_UNKNOWN; in max8903_get_property() 54 if (data->chg) { in max8903_get_property() 55 if (gpiod_get_value(data->chg)) in max8903_get_property() 57 val->intval = POWER_SUPPLY_STATUS_CHARGING; in max8903_get_property() 58 else if (data->usb_in || data->ta_in) in max8903_get_property() 59 val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; in max8903_get_property() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 63 hws->ctx 65 hws->regs->reg 69 hws->shifts->field_name, hws->masks->field_name 84 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec() 93 void dcn10_lock_all_pipes(struct dc *dc, in dcn10_lock_all_pipes() argument 102 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn10_lock_all_pipes() 103 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes() 104 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes() 105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes() 111 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dc.h | 2 * Copyright 2012-2023 Advanced Micro Devices, Inc. 99 // for example, 1080p -> 8K is 4.0, or 4000 raw value 107 // for example, 8K -> 1080p is 0.25, or 250 raw value 119 * DOC: color-management-caps 124 * abstracted HW. DCE 5-12 had almost no important changes, but starting with 131 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma 147 * struct dpp_color_caps - color pipeline capabilities for display pipe and 152 * just plain 256-entry lookup 161 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes 162 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT [all …]
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/openbmc/openbmc/meta-openembedded/meta-networking/recipes-connectivity/samba/ |
H A D | samba_4.19.8.bb | 4 LICENSE = "GPL-3.0-or-later & LGPL-3.0-or-later & GPL-2.0-or-later" 6 …file://${COREBASE}/meta/files/common-licenses/LGPL-3.0-or-later;md5=c51d3eef3be114124d11349ca0d7e1… 7 …file://${COREBASE}/meta/files/common-licenses/GPL-2.0-or-later;md5=fed54355545ffd980b814dab4a3b312… 17 SRC_URI = "${SAMBA_MIRROR}/stable/samba-${PV}.tar.gz \ 20 file://0001-Don-t-check-xsltproc-manpages.patch \ 21 file://0002-do-not-import-target-module-while-cross-compile.patch \ 22 file://0003-Add-config-option-without-valgrind.patch \ 23 file://0004-Add-options-to-configure-the-use-of-libbsd.patch \ 24 file://0005-Fix-pyext_PATTERN-for-cross-compilation.patch \ 25 file://0006-smbtorture-skip-test-case-tfork_cmd_send.patch \ [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_optc.c | 31 #include "dc.h" 36 optc1->tg_regs->reg 39 optc1->base.ctx 43 optc1->tg_shift->field_name, optc1->tg_mask->field_name 50 int h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right; in optc32_set_odm_combine() 97 OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc32_set_odm_combine() 98 optc1->opp_count = opp_cnt; in optc32_set_odm_combine() 109 * optc32_enable_crtc() - Enable CRTC - call ASIC Control Object to enable Timing generator. 121 OPTC_SEG0_SRC_SEL, optc->inst); in optc32_enable_crtc() 155 /* disable otg request until end of the first line in optc32_disable_crtc() [all …]
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H A D | dcn32_hwseq.c | 57 hws->ctx 59 hws->regs->reg 61 dc->ctx->logger 66 hws->shifts->field_name, hws->masks->field_name 77 if (hws->ctx->dc->debug.disable_dsc_power_gate) in dcn32_dsc_pg_control() 80 if (!hws->ctx->dc->debug.enable_double_buffered_dsc_pg_support) in dcn32_dsc_pg_control() 134 bool force_on = true; /* disable power gating */ in dcn32_enable_power_gating_plane() 165 if (hws->ctx->dc->debug.disable_hubp_power_gate) in dcn32_hubp_pg_control() 194 static bool dcn32_check_no_memory_request_for_cab(struct dc *dc) in dcn32_check_no_memory_request_for_cab() argument 198 /* First, check no-memory-request case */ in dcn32_check_no_memory_request_for_cab() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | qcom,pm8941-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/supply/qcom,pm8941-charger.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Switch-Mode Battery Charger and Boost 10 - Sebastian Reichel <sre@kernel.org> 15 - qcom,pm8226-charger 16 - qcom,pm8941-charger 23 - description: charge done 24 - description: charge fast mode [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_phy.c | 27 * This file implements basic dp phy functionality such as enable/disable phy 41 link->ctx->logger 49 if (link->sync_lt_in_progress) in dpcd_write_rx_power_ctrl() 64 link->cur_link_settings = *link_settings; in dp_enable_link_phy() 65 link->dc->hwss.enable_dp_link_output(link, link_res, signal, in dp_enable_link_phy() 74 struct dc *dc = link->ctx->dc; in dp_disable_link_phy() local 76 if (!link->wa_flags.dp_keep_receiver_powered && in dp_disable_link_phy() 77 !link->skip_implict_edp_power_control) in dp_disable_link_phy() 80 dc->hwss.disable_link_output(link, link_res, signal); in dp_disable_link_phy() 82 memset(&link->cur_link_settings, 0, in dp_disable_link_phy() [all …]
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H A D | link_edp_panel_control.c | 38 #include "dc/dc_dmub_srv.h" 90 link->panel_mode = panel_mode; in dp_set_panel_mode() 93 link->link_index, in dp_set_panel_mode() 94 link->dpcd_caps.panel_mode_edp, in dp_set_panel_mode() 104 if (link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT) { in dp_get_panel_mode() 106 switch (link->dpcd_caps.branch_dev_id) { in dp_get_panel_mode() 115 link->dpcd_caps.branch_dev_name, in dp_get_panel_mode() 118 link->dpcd_caps. in dp_get_panel_mode() 129 if (strncmp(link->dpcd_caps.branch_dev_name, in dp_get_panel_mode() 132 link->dpcd_caps. in dp_get_panel_mode() [all …]
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/openbmc/linux/arch/sparc/include/asm/ |
H A D | fhc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 42 #define FHC_CONTROL_LFAT 0x00040000 /* AC/DC signalled a local error */ 44 #define FHC_CONTROL_DCD 0x00008000 /* DC-->DC Converter Disable */ 45 #define FHC_CONTROL_POFF 0x00004000 /* AC/DC Controller PLL Disable */ 46 #define FHC_CONTROL_FOFF 0x00002000 /* FHC Controller PLL Disable */
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-driver-qat | 4 Contact: qat-linux@intel.com 22 Contact: qat-linux@intel.com 31 * dc: the device is configured for running compression services 32 * dcc: identical to dc but enables the dc chaining feature, 33 hash then compression. If this is not required chose dc 38 * asym;dc: the device is configured for running asymmetric 40 * dc;asym: identical to asym;dc 41 * sym;dc: the device is configured for running symmetric crypto 43 * dc;sym: identical to sym;dc 57 # echo dc > /sys/bus/pci/devices/<BDF>/qat/cfg_services [all …]
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/openbmc/linux/drivers/pwm/ |
H A D | pwm-bcm-kona.c | 1 // SPDX-License-Identifier: GPL-2.0-only 20 * 1) There is no disable bit and the hardware docs advise programming a zero 21 * duty to achieve output equivalent to that of a normal disable operation. 75 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings() 79 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings() 90 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings() 95 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings() 106 unsigned long prescale = PRESCALE_MIN, pc, dc; in kona_pwmc_config() local 107 unsigned int value, chan = pwm->hwpwm; in kona_pwmc_config() 114 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE in kona_pwmc_config() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/iio/dac/ |
H A D | adi,ad5755.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AD5755 Multi-Channel DAC 10 - Sean Nyekjaer <sean.nyekjaer@prevas.dk> 15 - adi,ad5755 16 - adi,ad5755-1 17 - adi,ad5757 18 - adi,ad5735 19 - adi,ad5737 [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
H A D | dce110_hw_sequencer.c | 27 #include "dc.h" 73 * For eDP, after power-up/power/down, 83 hws->ctx 88 hws->regs->reg 92 hws->shifts->field_name, hws->masks->field_name 100 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), 103 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), 106 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), 109 .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL), 202 struct dc *dc, in dce110_enable_display_power_gating() argument [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc.c | 27 #include "dc.h" 81 dc->ctx 84 dc->ctx->logger 86 static const char DC_BUILD_ID[] = "production-build"; 91 * DC is the OS-agnostic component of the amdgpu DC driver. 93 * DC maintains and validates a set of structs representing the state of the 96 * Main DC HW structs: 98 * struct dc - The central struct. One per driver. Created on driver load, 101 * struct dc_context - One per driver. 102 * Used as a backpointer by most other structs in dc. [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/ |
H A D | link_dpms.c | 28 * with the link and link's enable/disable sequences as result of the stream's 31 * TODO - The reason link owns stream's dpms programming sequence is 68 #include "dc/dcn30/dcn30_vpg.h" 74 void link_blank_all_dp_displays(struct dc *dc) in link_blank_all_dp_displays() argument 80 for (i = 0; i < dc->link_count; i++) { in link_blank_all_dp_displays() 81 if ((dc->links[i]->connector_signal != SIGNAL_TYPE_DISPLAY_PORT) || in link_blank_all_dp_displays() 82 (dc->links[i]->priv == NULL) || (dc->links[i]->local_sink == NULL)) in link_blank_all_dp_displays() 86 dp_retrieve_lttpr_cap(dc->links[i]); in link_blank_all_dp_displays() 88 status = core_link_read_dpcd(dc->links[i], DP_SET_POWER, in link_blank_all_dp_displays() 92 link_blank_dp_stream(dc->links[i], true); in link_blank_all_dp_displays() [all …]
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/openbmc/openbmc/meta-phosphor/recipes-support/nss-pam-ldapd/ |
H A D | nss-pam-ldapd_0.9.8.bb | 5 system information from LDAP. It is used by the libnss-ldapd and \ 6 libpam-ldapd packages but is not very useful by itself. \ 8 HOMEPAGE = "https://github.com/arthurdejong/nss-pam-ldapd" 11 LICENSE = "LGPL-2.1-or-later" 17 git://github.com/arthurdejong/nss-pam-ldapd;branch=master;protocol=https \ 26 inherit update-rc.d systemd 29 --disable-pynslcd \ 30 --libdir=${base_libdir} \ 31 --with-pam-seclib-dir=${base_libdir}/security \ 35 install -D -m 0755 ${UNPACKDIR}/nslcd.init ${D}${sysconfdir}/init.d/nslcd [all …]
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