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/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
27 regulator_3_3v: 3-3-v-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
[all …]
H A Dsocfpga_cyclone5_sockit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
36 linux,default-trigger = "heartbeat";
42 linux,default-trigger = "heartbeat";
48 linux,default-trigger = "heartbeat";
54 linux,default-trigger = "heartbeat";
58 gpio-keys {
[all …]
H A Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
3 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
56 regulator-usb-nrst {
57 compatible = "regulator-fixed";
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
36 led-hps0 {
[all …]
H A Dsocfpga_cyclone5_sockit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
36 linux,default-trigger = "heartbeat";
42 linux,default-trigger = "heartbeat";
48 linux,default-trigger = "heartbeat";
54 linux,default-trigger = "heartbeat";
58 gpio-keys {
[all …]
H A Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
3 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
[all …]
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
5 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-pdk2.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
4 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
14 stdout-path = "serial0:115200n8";
17 clk_ext_audio_codec: clock-codec {
18 #clock-cells = <0>;
[all …]
H A Dimx6qdl-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Author: Christian Hemp <c.hemp@phytec.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/regulator/dlg,da9063-regulator.h>
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpioleds_som>;
30 som-led-green {
33 linux,default-trigger = "heartbeat";
39 pinctrl-names = "default";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dti,tfp410.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
11 - Jyri Sarha <jsarha@ti.com>
21 powerdown-gpios:
26 Data de-skew value in 350ps increments, from 0 to 7, as configured
27 through the DK[3:1] pins. The de-skew multiplier is computed as
28 (DK[3:1] - 4), so it ranges from -4 to 3.
38 $ref: /schemas/graph.yaml#/$defs/port-base
[all …]
/openbmc/u-boot/board/spear/x600/
H A Dx600.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2012 Stefan Roese <sr@denx.de>
16 #include <asm/mach-types.h>
30 * power-up. Otherwise the RTC is halted. in board_init()
45 2 * CONFIG_ENV_SECT_SIZE - 1, in board_late_init()
55 * board_nand_init - Board specific NAND initialization
67 if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS)) in board_nand_init()
81 printf("PHY KSZ9031 detected - "); in board_phy_config()
85 /* control data pad skew - devaddr = 0x02, register = 0x04 */ in board_phy_config()
90 /* rx data pad skew - devaddr = 0x02, register = 0x05 */ in board_phy_config()
[all …]
/openbmc/linux/drivers/staging/sm750fb/
H A Dddk750_sii164.c1 // SPDX-License-Identifier: GPL-2.0
79 * edge_select - Edge Select:
84 * bus_select - Input Bus Select:
85 * 0 = Input data bus is 12-bits wide
86 * 1 = Input data bus is 24-bits wide
87 * dual_edge_clk_select - Dual Edge Clock Select
90 * hsync_enable - Horizontal Sync Enable:
93 * vsync_enable - Vertical Sync Enable:
96 * deskew_enable - De-skewing Enable:
97 * 0 = De-skew disabled
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/openbmc/linux/sound/core/seq/
H A Dseq_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
23 if (tmr->tempo < 1000000) in snd_seq_timer_set_tick_resolution()
24 tmr->tick.resolution = (tmr->tempo * 1000) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
28 s = tmr->tempo % tmr->ppq; in snd_seq_timer_set_tick_resolution()
29 s = (s * 1000) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
30 tmr->tick.resolution = (tmr->tempo / tmr->ppq) * 1000; in snd_seq_timer_set_tick_resolution()
31 tmr->tick.resolution += s; in snd_seq_timer_set_tick_resolution()
33 if (tmr->tick.resolution <= 0) in snd_seq_timer_set_tick_resolution()
34 tmr->tick.resolution = 1; in snd_seq_timer_set_tick_resolution()
[all …]
H A Dseq_timer.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
37 unsigned int skew; member
56 if (tick->resolution > 0) { in snd_seq_timer_update_tick()
57 tick->fraction += resolution; in snd_seq_timer_update_tick()
58 tick->cur_tick += (unsigned int)(tick->fraction / tick->resolution); in snd_seq_timer_update_tick()
59 tick->fraction %= tick->resolution; in snd_seq_timer_update_tick()
75 if (a->tv_sec > b->tv_sec) in snd_seq_compare_real_time()
77 if ((a->tv_sec == b->tv_sec) && (a->tv_nsec >= b->tv_nsec)) in snd_seq_compare_real_time()
85 while (tm->tv_nsec >= 1000000000) { in snd_seq_sanity_real_time()
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage-memphis.cfg1 # SPDX-License-Identifier: GPL-2.0+
4 # Heiko Schocher, DENX Software Engineering, hs@denx.de.
8 # Refer doc/README.kwbimage for more details about how-to configure
16 # bit 3-0: MPPSel0 2, NF_IO[2]
17 # bit 7-4: MPPSel1 2, NF_IO[3]
18 # bit 12-8: MPPSel2 2, NF_IO[4]
19 # bit 15-12: MPPSel3 2, NF_IO[5]
20 # bit 19-16: MPPSel4 1, NF_IO[6]
21 # bit 23-20: MPPSel5 1, NF_IO[7]
22 # bit 27-24: MPPSel6 1, SYSRST_O
[all …]
H A Dkwbimage_128M16_1.cfg1 # SPDX-License-Identifier: GPL-2.0+
4 # Heiko Schocher, DENX Software Engineering, hs@denx.de.
12 # Refer doc/README.kwbimage for more details about how-to configure
20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
21 # bit 7-4: 2, MPPSel1 SPI_SI (1=NF_IO[3])
22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4])
23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5])
24 # bit 19-16: 1, MPPSel4 NF_IO[6]
25 # bit 23-20: 1, MPPSel5 NF_IO[7]
26 # bit 27-24: 1, MPPSel6 SYSRST_O
[all …]
/openbmc/u-boot/board/liebherr/mccmon6/
H A Dmccmon6.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016-2017
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/mx6-pins.h>
14 #include <asm/mach-imx/iomux-v3.h>
15 #include <asm/mach-imx/mxc_i2c.h>
16 #include <asm/mach-imx/spi.h>
17 #include <asm/mach-imx/boot_mode.h>
61 gd->ram_size = imx_ddr_size(); in dram_init()
[all …]
/openbmc/u-boot/board/d-link/dns325/
H A Dkwbimage.cfg1 # SPDX-License-Identifier: GPL-2.0+
9 # Written-by: Prafulla Wadaskar <prafulla@marvell.com>
10 # Refer doc/README.kwbimage for more details about how-to configure
22 # Configure RGMII-0 interface pad voltage to 1.8V
27 # bit13-0: 0xc30, 3120 DDR2 clks refresh rate
28 # bit23-14: 0 required
31 # bit29-26: 0 required
32 # bit31-30: 0b01 required
35 # bit3-0: 0 required
39 # bit11-7: 0 required
[all …]
/openbmc/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg1 # SPDX-License-Identifier: GPL-2.0+
5 # Refer doc/README.kwbimage for more details about how-to configure
15 # Configure RGMII-0/1 interface pad voltage to 1.8V
28 # bit13-0: 0x618, 1560 DDR2 clks refresh rate
29 # bit23-14: 0 required
32 # bit29-26: 0 required
33 # bit31-30: 0b01 required
37 # bit3-0: 0 required
41 # bit11-7: 0 required
45 # bit17-15: 0 required
[all …]
H A Dkwbimage-lsxhl.cfg1 # SPDX-License-Identifier: GPL-2.0+
5 # Refer doc/README.kwbimage for more details about how-to configure
15 # Configure RGMII-0/1 interface pad voltage to 1.8V
28 # bit13-0: 0x618, 1560 DDR2 clks refresh rate
29 # bit23-14: 0 required
32 # bit29-26: 0 required
33 # bit31-30: 0b01 required
37 # bit3-0: 0 required
41 # bit11-7: 0 required
45 # bit17-15: 0 required
[all …]
/openbmc/linux/include/drm/i2c/
H A Dsil164.h36 * See "http://www.siliconimage.com/docs/SiI-DS-0021-E-164.pdf".
59 int input_skew; /** < Allowed range [-4, 3], use 0 for no de-skew. */
60 int duallink_skew; /** < Allowed range [-4, 3]. */

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