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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,hdmi-ddc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI DDC
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
19 - mediatek,mt7623-hdmi-ddc
20 - mediatek,mt8167-hdmi-ddc
[all …]
/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_ddc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/i2c.h>
65 static inline void sif_set_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_set_bit() argument
68 writel(readl(ddc->regs + offset) | val, ddc->regs + offset); in sif_set_bit()
71 static inline void sif_clr_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_clr_bit() argument
74 writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset); in sif_clr_bit()
77 static inline bool sif_bit_is_set(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_bit_is_set() argument
80 return (readl(ddc->regs + offset) & val) == val; in sif_bit_is_set()
83 static inline void sif_write_mask(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_write_mask() argument
89 tmp = readl(ddc->regs + offset); in sif_write_mask()
[all …]
/openbmc/qemu/hw/display/
H A Dsii9022.c5 * exist (chip ID) and confirm that we get switched over into DDC mode
7 * set-up of connectors etc will be acknowledged and ignored.
12 * See the COPYING file in the top-level directory.
13 * SPDX-License-Identifier: GPL-2.0-or-later
18 #include "hw/i2c/i2c.h"
20 #include "hw/display/i2c-ddc.h"
47 bool ddc; member
60 VMSTATE_BOOL(ddc, sii9022_state),
65 static int sii9022_event(I2CSlave *i2c, enum i2c_event event) in sii9022_event() argument
67 sii9022_state *s = SII9022(i2c); in sii9022_event()
[all …]
H A Di2c-ddc.c1 /* A simple I2C slave for returning monitor EDID data via DDC.
22 #include "hw/i2c/i2c.h"
23 #include "hw/qdev-properties.h"
25 #include "hw/display/i2c-ddc.h"
33 qemu_log("i2c-ddc: " fmt , ## __VA_ARGS__); \
41 s->firstbyte = false; in i2c_ddc_reset()
42 s->reg = 0; in i2c_ddc_reset()
45 static int i2c_ddc_event(I2CSlave *i2c, enum i2c_event event) in i2c_ddc_event() argument
47 I2CDDCState *s = I2CDDC(i2c); in i2c_ddc_event()
50 s->firstbyte = true; in i2c_ddc_event()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
[all …]
/openbmc/linux/drivers/video/fbdev/matrox/
H A Di2c-matroxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
16 #include <linux/i2c.h>
18 #include <linux/i2c-algo-bit.h>
20 /* MGA-TVO I2C for G200, G400 */
23 /* primary head DDC for Mystique(?), G100, G200, G400 */
26 /* primary head DDC for Millennium, Millennium II */
29 /* secondary head DDC for G400 */
63 /* software I2C functions */
74 matroxfb_i2c_set(b->minfo, b->mask.data, state); in matroxfb_gpio_setsda()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_i2c_hw.c35 dce_i2c_hw->ctx
37 dce_i2c_hw->regs->reg
41 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
59 DC_I2C_TRANSACTION_COUNT, dce_i2c_hw->transaction_count - 1); in execute_transaction()
61 /* start I2C transfer */ in execute_transaction()
67 dce_i2c_hw->transaction_count = 0; in execute_transaction()
68 dce_i2c_hw->buffer_used_bytes = 0; in execute_transaction()
80 else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK) in get_channel_status()
82 else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT) in get_channel_status()
84 else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED) in get_channel_status()
[all …]
H A Ddce_i2c_sw.c36 dce_i2c_sw->ctx = ctx; in dce_i2c_sw_construct()
40 struct ddc *ddc, in read_bit_from_ddc() argument
46 dal_gpio_get_value(ddc->pin_data, &value); in read_bit_from_ddc()
48 dal_gpio_get_value(ddc->pin_clock, &value); in read_bit_from_ddc()
54 struct ddc *ddc, in write_bit_to_ddc() argument
61 dal_gpio_set_value(ddc->pin_data, value); in write_bit_to_ddc()
63 dal_gpio_set_value(ddc->pin_clock, value); in write_bit_to_ddc()
70 dal_ddc_close(dce_i2c_sw->ddc); in release_engine_dce_sw()
71 dce_i2c_sw->ddc = NULL; in release_engine_dce_sw()
76 struct ddc *ddc, in wait_for_scl_high_sw() argument
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/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
24 - rockchip,rk3328-dw-hdmi
25 - rockchip,rk3399-dw-hdmi
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/openbmc/linux/drivers/gpu/drm/bridge/
H A Ddisplay-connector.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/i2c.h>
9 #include <linux/media-bus-format.h>
39 return flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR ? 0 : -EINVAL; in display_connector_attach()
47 if (conn->hpd_gpio) { in display_connector_detect()
48 if (gpiod_get_value_cansleep(conn->hpd_gpio)) in display_connector_detect()
54 if (conn->bridge.ddc && drm_probe_ddc(conn->bridge.ddc)) in display_connector_detect()
57 switch (conn->bridge.type) { in display_connector_detect()
64 * For DVI and HDMI connectors a DDC probe failure indicates in display_connector_detect()
74 * Composite and S-Video connectors have no other detection in display_connector_detect()
[all …]
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Drk3066_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
4 * Zheng Yang <zhengyang@rock-chips.com>
37 struct mutex i2c_lock; /* For i2c operation. */
52 struct rk3066_hdmi_i2c *i2c; member
53 struct i2c_adapter *ddc; member
75 return readl_relaxed(hdmi->regs + offset); in hdmi_readb()
80 writel_relaxed(val, hdmi->regs + offset); in hdmi_writeb()
96 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE; in rk3066_hdmi_i2c_init()
118 DRM_DEV_DEBUG(hdmi->dev, "mode :%d\n", mode); in rk3066_hdmi_set_power_mode()
119 DRM_DEV_DEBUG(hdmi->dev, "current_mode :%d\n", current_mode); in rk3066_hdmi_set_power_mode()
[all …]
H A Dinno_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Zheng Yang <zhengyang@rock-chips.com>
5 * Yakir Yang <ykk@rock-chips.com>
59 struct inno_hdmi_i2c *i2c; member
60 struct i2c_adapter *ddc; member
92 * R = 1.164*Y + 1.596*V - 204
93 * G = 1.164*Y - 0.391*U - 0.813*V + 154
94 * B = 1.164*Y + 2.018*U - 258
103 * R = Y + 1.402*V - 248
104 * G = Y - 0.344*U - 0.714*V + 135
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
213 nvidia,pins = "ddc", "dta", "dtd", "kbca",
[all …]
H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
15 rtc0 = "/i2c@7000d000/tps6586x@34";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/connector/
H A Dvga-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/vga-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: vga-connector
18 ddc-i2c-bus:
19 description: phandle link to the I2C controller used for DDC EDID probing
27 - compatible
28 - port
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H A Dhdmi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: hdmi-connector
19 - a # Standard full size
20 - b # Never deployed?
21 - c # Mini
22 - d # Micro
[all …]
H A Ddvi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dvi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: dvi-connector
18 hpd-gpios:
22 ddc-i2c-bus:
23 description: phandle link to the I2C controller used for DDC EDID probing
34 dual-link:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi13 vdd-supply = <&hdmi_vdd_reg>;
14 pll-supply = <&hdmi_pll_reg>;
16 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
17 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
201 nvidia,pins = "ddc", "dta", "dtd", "kbca",
242 ddc {
243 nvidia,pins = "ddc";
253 ddc {
[all …]
H A Dtegra20-ventana.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
11 stdout-path = &uartd;
15 rtc0 = "/i2c@7000d000/tps6586x@34";
38 display-timings {
41 clock-frequency = <70600000>;
44 hback-porch = <58>;
45 hfront-porch = <58>;
46 hsync-len = <58>;
47 vback-porch = <4>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_ddc.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
39 ddc->shifts->field_name, ddc->masks->field_name
42 ddc->base.base.ctx
44 (ddc->regs->reg)
51 dal_hw_gpio_destruct(&pin->base); in dal_hw_ddc_destruct()
70 struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr); in set_config() local
77 hw_gpio = &ddc->base; in set_config()
89 switch (config_data->config.ddc.type) { in set_config()
91 /* On plug-in, there is a transient level on the pad in set_config()
92 * which must be discharged through the internal pull-down. in set_config()
[all …]
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dp_dual_mode_helper.c26 #include <linux/i2c.h>
40 * Adaptor registers (if any) and the sink DDC bus may be accessed via I2C.
43 * Adaptor registers and sink DDC bus can be accessed either via I2C or
44 * I2C-over-AUX. Source devices may choose to implement either of these
51 * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s)
52 * @adapter: I2C adapter for the DDC bus
69 * As sub-addressing is not supported by all adaptors, in drm_dp_dual_mode_read()
94 return -ENOMEM; in drm_dp_dual_mode_read()
108 return -EPROTO; in drm_dp_dual_mode_read()
115 * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s)
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Doutput.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/i2c.h>
18 #include <media/cec-notifier.h>
30 if (output->panel) { in tegra_output_connector_get_modes()
31 err = drm_panel_get_modes(output->panel, connector); in tegra_output_connector_get_modes()
36 if (output->edid) in tegra_output_connector_get_modes()
37 edid = kmemdup(output->edid, sizeof(*edid), GFP_KERNEL); in tegra_output_connector_get_modes()
38 else if (output->ddc) in tegra_output_connector_get_modes()
39 edid = drm_get_edid(connector, output->ddc); in tegra_output_connector_get_modes()
41 cec_notifier_set_phys_addr_from_edid(output->cec, edid); in tegra_output_connector_get_modes()
[all …]
/openbmc/qemu/include/hw/display/
H A Di2c-ddc.h1 /* A simple I2C slave for returning monitor EDID data via DDC.
23 #include "hw/i2c/i2c.h"
26 /* A simple I2C slave which just returns the contents of its EDID blob. */
29 I2CSlave i2c; member
38 #define TYPE_I2CDDC "i2c-ddc"
/openbmc/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 - interrupts: The interrupt outputs from the controller.
7 - #address-cells: The number of cells used to represent physical base addresses
9 - #size-cells: The number of cells used to represent the size of an address
11 - ranges: The mapping of the host1x address space to the CPU address space.
12 - clocks: Must contain one entry, for the module clock.
13 See ../clocks/clock-bindings.txt for details.
14 - resets: Must contain an entry for each entry in reset-names.
16 - reset-names: Must include the following entries:
[all …]

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