14562236bSHarry Wentland /*
24562236bSHarry Wentland * Copyright 2012-15 Advanced Micro Devices, Inc.
34562236bSHarry Wentland *
44562236bSHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a
54562236bSHarry Wentland * copy of this software and associated documentation files (the "Software"),
64562236bSHarry Wentland * to deal in the Software without restriction, including without limitation
74562236bSHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense,
84562236bSHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the
94562236bSHarry Wentland * Software is furnished to do so, subject to the following conditions:
104562236bSHarry Wentland *
114562236bSHarry Wentland * The above copyright notice and this permission notice shall be included in
124562236bSHarry Wentland * all copies or substantial portions of the Software.
134562236bSHarry Wentland *
144562236bSHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
154562236bSHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
164562236bSHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
174562236bSHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
184562236bSHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
194562236bSHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
204562236bSHarry Wentland * OTHER DEALINGS IN THE SOFTWARE.
214562236bSHarry Wentland *
224562236bSHarry Wentland * Authors: AMD
234562236bSHarry Wentland *
244562236bSHarry Wentland */
254562236bSHarry Wentland
264562236bSHarry Wentland #include "dm_services.h"
274562236bSHarry Wentland
2891db9311SSu Sung Chung #include "include/gpio_interface.h"
294562236bSHarry Wentland #include "include/gpio_types.h"
304562236bSHarry Wentland #include "hw_gpio.h"
314562236bSHarry Wentland #include "hw_ddc.h"
324562236bSHarry Wentland
334562236bSHarry Wentland #include "reg_helper.h"
344562236bSHarry Wentland #include "gpio_regs.h"
354562236bSHarry Wentland
364562236bSHarry Wentland
374562236bSHarry Wentland #undef FN
384562236bSHarry Wentland #define FN(reg_name, field_name) \
394562236bSHarry Wentland ddc->shifts->field_name, ddc->masks->field_name
404562236bSHarry Wentland
414562236bSHarry Wentland #define CTX \
424562236bSHarry Wentland ddc->base.base.ctx
434562236bSHarry Wentland #define REG(reg)\
444562236bSHarry Wentland (ddc->regs->reg)
454562236bSHarry Wentland
4691db9311SSu Sung Chung struct gpio;
4791db9311SSu Sung Chung
dal_hw_ddc_destruct(struct hw_ddc * pin)48d9e32672SAnthony Koo static void dal_hw_ddc_destruct(
494562236bSHarry Wentland struct hw_ddc *pin)
504562236bSHarry Wentland {
514562236bSHarry Wentland dal_hw_gpio_destruct(&pin->base);
524562236bSHarry Wentland }
534562236bSHarry Wentland
dal_hw_ddc_destroy(struct hw_gpio_pin ** ptr)54d9e32672SAnthony Koo static void dal_hw_ddc_destroy(
554562236bSHarry Wentland struct hw_gpio_pin **ptr)
564562236bSHarry Wentland {
574562236bSHarry Wentland struct hw_ddc *pin = HW_DDC_FROM_BASE(*ptr);
584562236bSHarry Wentland
59d9e32672SAnthony Koo dal_hw_ddc_destruct(pin);
604562236bSHarry Wentland
612004f45eSHarry Wentland kfree(pin);
624562236bSHarry Wentland
634562236bSHarry Wentland *ptr = NULL;
644562236bSHarry Wentland }
654562236bSHarry Wentland
set_config(struct hw_gpio_pin * ptr,const struct gpio_config_data * config_data)664562236bSHarry Wentland static enum gpio_result set_config(
674562236bSHarry Wentland struct hw_gpio_pin *ptr,
684562236bSHarry Wentland const struct gpio_config_data *config_data)
694562236bSHarry Wentland {
704562236bSHarry Wentland struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr);
714562236bSHarry Wentland struct hw_gpio *hw_gpio = NULL;
724562236bSHarry Wentland uint32_t regval;
734562236bSHarry Wentland uint32_t ddc_data_pd_en = 0;
744562236bSHarry Wentland uint32_t ddc_clk_pd_en = 0;
754562236bSHarry Wentland uint32_t aux_pad_mode = 0;
764562236bSHarry Wentland
774562236bSHarry Wentland hw_gpio = &ddc->base;
784562236bSHarry Wentland
794562236bSHarry Wentland if (hw_gpio == NULL) {
804562236bSHarry Wentland ASSERT_CRITICAL(false);
814562236bSHarry Wentland return GPIO_RESULT_NULL_HANDLE;
824562236bSHarry Wentland }
834562236bSHarry Wentland
844562236bSHarry Wentland regval = REG_GET_3(gpio.MASK_reg,
854562236bSHarry Wentland DC_GPIO_DDC1DATA_PD_EN, &ddc_data_pd_en,
864562236bSHarry Wentland DC_GPIO_DDC1CLK_PD_EN, &ddc_clk_pd_en,
874562236bSHarry Wentland AUX_PAD1_MODE, &aux_pad_mode);
884562236bSHarry Wentland
894562236bSHarry Wentland switch (config_data->config.ddc.type) {
904562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_MODE_I2C:
914562236bSHarry Wentland /* On plug-in, there is a transient level on the pad
924562236bSHarry Wentland * which must be discharged through the internal pull-down.
934562236bSHarry Wentland * Enable internal pull-down, 2.5msec discharge time
944562236bSHarry Wentland * is required for detection of AUX mode */
954562236bSHarry Wentland if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) {
964562236bSHarry Wentland if (!ddc_data_pd_en || !ddc_clk_pd_en) {
97*c0b2753fSSteve Su if (hw_gpio->base.en == GPIO_DDC_LINE_DDC_VGA) {
98*c0b2753fSSteve Su // bit 4 of mask has different usage in some cases
99*c0b2753fSSteve Su REG_SET(gpio.MASK_reg, regval, DC_GPIO_DDC1DATA_PD_EN, 1);
100*c0b2753fSSteve Su } else {
1014562236bSHarry Wentland REG_SET_2(gpio.MASK_reg, regval,
1024562236bSHarry Wentland DC_GPIO_DDC1DATA_PD_EN, 1,
1034562236bSHarry Wentland DC_GPIO_DDC1CLK_PD_EN, 1);
104*c0b2753fSSteve Su }
1054562236bSHarry Wentland if (config_data->type ==
1064562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
1074562236bSHarry Wentland msleep(3);
1084562236bSHarry Wentland }
1094562236bSHarry Wentland } else {
1104562236bSHarry Wentland uint32_t sda_pd_dis = 0;
1114562236bSHarry Wentland uint32_t scl_pd_dis = 0;
1124562236bSHarry Wentland
11393e67af4SLee Jones REG_GET_2(gpio.MASK_reg,
1144562236bSHarry Wentland DC_GPIO_SDA_PD_DIS, &sda_pd_dis,
1154562236bSHarry Wentland DC_GPIO_SCL_PD_DIS, &scl_pd_dis);
1164562236bSHarry Wentland
1174562236bSHarry Wentland if (sda_pd_dis) {
1184562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval,
1194562236bSHarry Wentland DC_GPIO_SDA_PD_DIS, 0);
1204562236bSHarry Wentland
1214562236bSHarry Wentland if (config_data->type ==
1224562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
1234562236bSHarry Wentland msleep(3);
1244562236bSHarry Wentland }
1254562236bSHarry Wentland
1264562236bSHarry Wentland if (!scl_pd_dis) {
1274562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval,
1284562236bSHarry Wentland DC_GPIO_SCL_PD_DIS, 1);
1294562236bSHarry Wentland
1304562236bSHarry Wentland if (config_data->type ==
1314562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE)
1324562236bSHarry Wentland msleep(3);
1334562236bSHarry Wentland }
1344562236bSHarry Wentland }
1354562236bSHarry Wentland
1364562236bSHarry Wentland if (aux_pad_mode) {
1374562236bSHarry Wentland /* let pins to get de-asserted
1384562236bSHarry Wentland * before setting pad to I2C mode */
1394562236bSHarry Wentland if (config_data->config.ddc.data_en_bit_present ||
1404562236bSHarry Wentland config_data->config.ddc.clock_en_bit_present)
1414562236bSHarry Wentland /* [anaumov] in DAL2, there was
1424562236bSHarry Wentland * dc_service_delay_in_microseconds(2000); */
1434562236bSHarry Wentland msleep(2);
1444562236bSHarry Wentland
1454562236bSHarry Wentland /* set the I2C pad mode */
1464562236bSHarry Wentland /* read the register again,
1474562236bSHarry Wentland * some bits may have been changed */
1484562236bSHarry Wentland REG_UPDATE(gpio.MASK_reg,
1494562236bSHarry Wentland AUX_PAD1_MODE, 0);
1504562236bSHarry Wentland }
1514562236bSHarry Wentland
1522e35facfSHarry Wentland if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) {
1532e35facfSHarry Wentland REG_UPDATE(dc_gpio_aux_ctrl_5, DDC_PAD_I2CMODE, 1);
1542e35facfSHarry Wentland }
1552e35facfSHarry Wentland //set DC_IO_aux_rxsel = 2'b01
1562e35facfSHarry Wentland if (ddc->regs->phy_aux_cntl != 0) {
1572e35facfSHarry Wentland REG_UPDATE(phy_aux_cntl, AUX_PAD_RXSEL, 1);
1582e35facfSHarry Wentland }
1594562236bSHarry Wentland return GPIO_RESULT_OK;
1604562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_MODE_AUX:
1614562236bSHarry Wentland /* set the AUX pad mode */
1624562236bSHarry Wentland if (!aux_pad_mode) {
1634562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval,
1644562236bSHarry Wentland AUX_PAD1_MODE, 1);
1654562236bSHarry Wentland }
1662e35facfSHarry Wentland if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) {
1672e35facfSHarry Wentland REG_UPDATE(dc_gpio_aux_ctrl_5,
1682e35facfSHarry Wentland DDC_PAD_I2CMODE, 0);
1692e35facfSHarry Wentland }
1704562236bSHarry Wentland
1714562236bSHarry Wentland return GPIO_RESULT_OK;
1724562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT:
1734562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
1744562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
1754562236bSHarry Wentland REG_UPDATE_3(ddc_setup,
1764562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 1,
1774562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 1,
1784562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_MODE, 0);
1794562236bSHarry Wentland return GPIO_RESULT_OK;
1804562236bSHarry Wentland }
1814562236bSHarry Wentland break;
1824562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT:
1834562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
1844562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
1854562236bSHarry Wentland REG_UPDATE_3(ddc_setup,
1864562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 1,
1874562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 1,
1884562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_MODE, 1);
1894562236bSHarry Wentland return GPIO_RESULT_OK;
1904562236bSHarry Wentland }
1914562236bSHarry Wentland break;
1924562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING:
1934562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) &&
1944562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) {
1954562236bSHarry Wentland REG_UPDATE_2(ddc_setup,
1964562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 0,
1974562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 0);
1984562236bSHarry Wentland return GPIO_RESULT_OK;
1994562236bSHarry Wentland }
2004562236bSHarry Wentland break;
2014562236bSHarry Wentland }
2024562236bSHarry Wentland
2034562236bSHarry Wentland BREAK_TO_DEBUGGER();
2044562236bSHarry Wentland
2054562236bSHarry Wentland return GPIO_RESULT_NON_SPECIFIC_ERROR;
2064562236bSHarry Wentland }
2074562236bSHarry Wentland
2084562236bSHarry Wentland static const struct hw_gpio_pin_funcs funcs = {
209d9e32672SAnthony Koo .destroy = dal_hw_ddc_destroy,
2104562236bSHarry Wentland .open = dal_hw_gpio_open,
2114562236bSHarry Wentland .get_value = dal_hw_gpio_get_value,
2124562236bSHarry Wentland .set_value = dal_hw_gpio_set_value,
2134562236bSHarry Wentland .set_config = set_config,
2144562236bSHarry Wentland .change_mode = dal_hw_gpio_change_mode,
2154562236bSHarry Wentland .close = dal_hw_gpio_close,
2164562236bSHarry Wentland };
2174562236bSHarry Wentland
dal_hw_ddc_construct(struct hw_ddc * ddc,enum gpio_id id,uint32_t en,struct dc_context * ctx)218d9e32672SAnthony Koo static void dal_hw_ddc_construct(
2194562236bSHarry Wentland struct hw_ddc *ddc,
2204562236bSHarry Wentland enum gpio_id id,
2214562236bSHarry Wentland uint32_t en,
2224562236bSHarry Wentland struct dc_context *ctx)
2234562236bSHarry Wentland {
2240e1c42fdSDave Airlie dal_hw_gpio_construct(&ddc->base, id, en, ctx);
2254562236bSHarry Wentland ddc->base.base.funcs = &funcs;
2264562236bSHarry Wentland }
2274562236bSHarry Wentland
dal_hw_ddc_init(struct hw_ddc ** hw_ddc,struct dc_context * ctx,enum gpio_id id,uint32_t en)22891db9311SSu Sung Chung void dal_hw_ddc_init(
22991db9311SSu Sung Chung struct hw_ddc **hw_ddc,
2304562236bSHarry Wentland struct dc_context *ctx,
2314562236bSHarry Wentland enum gpio_id id,
2324562236bSHarry Wentland uint32_t en)
2334562236bSHarry Wentland {
2340e1c42fdSDave Airlie if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) {
2350e1c42fdSDave Airlie ASSERT_CRITICAL(false);
23691db9311SSu Sung Chung *hw_ddc = NULL;
2370e1c42fdSDave Airlie }
2380e1c42fdSDave Airlie
23991db9311SSu Sung Chung *hw_ddc = kzalloc(sizeof(struct hw_ddc), GFP_KERNEL);
24091db9311SSu Sung Chung if (!*hw_ddc) {
2414562236bSHarry Wentland ASSERT_CRITICAL(false);
24291db9311SSu Sung Chung return;
2434562236bSHarry Wentland }
2444562236bSHarry Wentland
245d9e32672SAnthony Koo dal_hw_ddc_construct(*hw_ddc, id, en, ctx);
24691db9311SSu Sung Chung }
24791db9311SSu Sung Chung
dal_hw_ddc_get_pin(struct gpio * gpio)24891db9311SSu Sung Chung struct hw_gpio_pin *dal_hw_ddc_get_pin(struct gpio *gpio)
24991db9311SSu Sung Chung {
25091db9311SSu Sung Chung struct hw_ddc *hw_ddc = dal_gpio_get_ddc(gpio);
25191db9311SSu Sung Chung
25291db9311SSu Sung Chung return &hw_ddc->base.base;
2534562236bSHarry Wentland }
254