1fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2fe8b45aaSThierry Reding%YAML 1.2
3fe8b45aaSThierry Reding---
4fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6fe8b45aaSThierry Reding
7fe8b45aaSThierry Redingtitle: NVIDIA Tegra HDMI Output Encoder
8fe8b45aaSThierry Reding
9fe8b45aaSThierry Redingmaintainers:
10fe8b45aaSThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11fe8b45aaSThierry Reding  - Jon Hunter <jonathanh@nvidia.com>
12fe8b45aaSThierry Reding
13fe8b45aaSThierry Redingproperties:
14fe8b45aaSThierry Reding  $nodename:
15fe8b45aaSThierry Reding    pattern: "^hdmi@[0-9a-f]+$"
16fe8b45aaSThierry Reding
17fe8b45aaSThierry Reding  compatible:
18fe8b45aaSThierry Reding    oneOf:
19fe8b45aaSThierry Reding      - enum:
20fe8b45aaSThierry Reding          - nvidia,tegra20-hdmi
21fe8b45aaSThierry Reding          - nvidia,tegra30-hdmi
22fe8b45aaSThierry Reding          - nvidia,tegra114-hdmi
23fe8b45aaSThierry Reding          - nvidia,tegra124-hdmi
24fe8b45aaSThierry Reding
25fe8b45aaSThierry Reding      - items:
26fe8b45aaSThierry Reding          - const: nvidia,tegra132-hdmi
27fe8b45aaSThierry Reding          - const: nvidia,tegra124-hdmi
28fe8b45aaSThierry Reding
29fe8b45aaSThierry Reding  reg:
30fe8b45aaSThierry Reding    maxItems: 1
31fe8b45aaSThierry Reding
32fe8b45aaSThierry Reding  interrupts:
33fe8b45aaSThierry Reding    maxItems: 1
34fe8b45aaSThierry Reding
35fe8b45aaSThierry Reding  clocks:
36fe8b45aaSThierry Reding    items:
37fe8b45aaSThierry Reding      - description: module clock
38fe8b45aaSThierry Reding      - description: parent clock
39fe8b45aaSThierry Reding
40fe8b45aaSThierry Reding  clock-names:
41fe8b45aaSThierry Reding    items:
42fe8b45aaSThierry Reding      - const: hdmi
43fe8b45aaSThierry Reding      - const: parent
44fe8b45aaSThierry Reding
45fe8b45aaSThierry Reding  resets:
46fe8b45aaSThierry Reding    items:
47fe8b45aaSThierry Reding      - description: module reset
48fe8b45aaSThierry Reding
49fe8b45aaSThierry Reding  reset-names:
50fe8b45aaSThierry Reding    items:
51fe8b45aaSThierry Reding      - const: hdmi
52fe8b45aaSThierry Reding
5321fd06dcSKrzysztof Kozlowski  operating-points-v2: true
54fe8b45aaSThierry Reding
55fe8b45aaSThierry Reding  power-domains:
56fe8b45aaSThierry Reding    items:
57fe8b45aaSThierry Reding      - description: phandle to the core power domain
58fe8b45aaSThierry Reding
59fe8b45aaSThierry Reding  hdmi-supply:
60fe8b45aaSThierry Reding    description: supply for the +5V HDMI connector pin
61fe8b45aaSThierry Reding
62fe8b45aaSThierry Reding  vdd-supply:
63fe8b45aaSThierry Reding    description: regulator for supply voltage
64fe8b45aaSThierry Reding
65fe8b45aaSThierry Reding  pll-supply:
66fe8b45aaSThierry Reding    description: regulator for PLL
67fe8b45aaSThierry Reding
68fe8b45aaSThierry Reding  nvidia,ddc-i2c-bus:
69fe8b45aaSThierry Reding    description: phandle of an I2C controller used for DDC EDID
70fe8b45aaSThierry Reding      probing
71*4334aec0SRob Herring    $ref: /schemas/types.yaml#/definitions/phandle
72fe8b45aaSThierry Reding
73fe8b45aaSThierry Reding  nvidia,hpd-gpio:
74fe8b45aaSThierry Reding    description: specifies a GPIO used for hotplug detection
75fe8b45aaSThierry Reding    maxItems: 1
76fe8b45aaSThierry Reding
77fe8b45aaSThierry Reding  nvidia,edid:
78fe8b45aaSThierry Reding    description: supplies a binary EDID blob
79*4334aec0SRob Herring    $ref: /schemas/types.yaml#/definitions/uint8-array
80fe8b45aaSThierry Reding
81fe8b45aaSThierry Reding  nvidia,panel:
82fe8b45aaSThierry Reding    description: phandle of a display panel
83*4334aec0SRob Herring    $ref: /schemas/types.yaml#/definitions/phandle
84fe8b45aaSThierry Reding
85fe8b45aaSThierry Reding  "#sound-dai-cells":
86fe8b45aaSThierry Reding    const: 0
87fe8b45aaSThierry Reding
88fe8b45aaSThierry RedingadditionalProperties: false
89fe8b45aaSThierry Reding
90fe8b45aaSThierry Redingrequired:
91fe8b45aaSThierry Reding  - compatible
92fe8b45aaSThierry Reding  - reg
93fe8b45aaSThierry Reding  - interrupts
94fe8b45aaSThierry Reding  - clocks
95fe8b45aaSThierry Reding  - clock-names
96fe8b45aaSThierry Reding  - resets
97fe8b45aaSThierry Reding  - reset-names
98fe8b45aaSThierry Reding  - pll-supply
99fe8b45aaSThierry Reding  - vdd-supply
100fe8b45aaSThierry Reding  - nvidia,ddc-i2c-bus
101fe8b45aaSThierry Reding  - nvidia,hpd-gpio
102fe8b45aaSThierry Reding
103fe8b45aaSThierry Redingexamples:
104fe8b45aaSThierry Reding  - |
105fe8b45aaSThierry Reding    #include <dt-bindings/clock/tegra124-car.h>
106fe8b45aaSThierry Reding    #include <dt-bindings/interrupt-controller/arm-gic.h>
107fe8b45aaSThierry Reding    #include <dt-bindings/gpio/tegra-gpio.h>
108fe8b45aaSThierry Reding
109fe8b45aaSThierry Reding    hdmi@54280000 {
110fe8b45aaSThierry Reding        compatible = "nvidia,tegra124-hdmi";
111fe8b45aaSThierry Reding        reg = <0x54280000 0x00040000>;
112fe8b45aaSThierry Reding        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
113fe8b45aaSThierry Reding        clocks = <&tegra_car TEGRA124_CLK_HDMI>,
114fe8b45aaSThierry Reding                 <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>;
115fe8b45aaSThierry Reding        clock-names = "hdmi", "parent";
116fe8b45aaSThierry Reding        resets = <&tegra_car 51>;
117fe8b45aaSThierry Reding        reset-names = "hdmi";
118fe8b45aaSThierry Reding
119fe8b45aaSThierry Reding        hdmi-supply = <&vdd_5v0_hdmi>;
120fe8b45aaSThierry Reding        pll-supply = <&vdd_hdmi_pll>;
121fe8b45aaSThierry Reding        vdd-supply = <&vdd_3v3_hdmi>;
122fe8b45aaSThierry Reding
123fe8b45aaSThierry Reding        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
124fe8b45aaSThierry Reding        nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
125fe8b45aaSThierry Reding    };
126