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/openbmc/linux/drivers/media/rc/
H A Dir-imon-decoder.c1 // SPDX-License-Identifier: GPL-2.0+
2 // ir-imon-decoder.c - handle iMon protocol
9 #include "rc-core-priv.h"
19 * This protocol has 30 bits. The format is one IMON_UNIT header pulse,
20 * followed by 30 bits. Each bit is one IMON_UNIT check field, and then
22 * The check field is always space for some bits, for others it is pulse if
24 * defines which bits are of type check.
27 * the lower bits are all set, iow. the last pulse is for the lowest
40 struct imon_dec *imon = &dev->raw->imon; in ir_imon_decode_scancode()
43 if (imon->bits == 0x299115b7) in ir_imon_decode_scancode()
[all …]
H A Dir-rc5-decoder.c1 // SPDX-License-Identifier: GPL-2.0
2 // ir-rc5-decoder.c - decoder for RC5(x) and StreamZap protocols
12 #include "rc-core-priv.h"
34 * ir_rc5_decode() - Decode one RC-5 pulse or space
38 * This function returns -EINVAL if the pulse violates the state machine
42 struct rc5_dec *data = &dev->raw->rc5; in ir_rc5_decode() local
49 data->state = STATE_INACTIVE; in ir_rc5_decode()
57 dev_dbg(&dev->dev, "RC5(x/sz) decode started at state %i (%uus %s)\n", in ir_rc5_decode()
58 data->state, ev.duration, TO_STR(ev.pulse)); in ir_rc5_decode()
63 switch (data->state) { in ir_rc5_decode()
[all …]
H A Dir-sanyo-decoder.c1 // SPDX-License-Identifier: GPL-2.0
2 // ir-sanyo-decoder.c - handle SANYO IR Pulse/Space protocol
6 // This protocol uses the NEC protocol timings. However, data is formatted as:
7 // 13 bits Custom Code
8 // 13 bits NOT(Custom Code)
9 // 8 bits Key data
10 // 8 bits NOT(Key data)
17 #include "rc-core-priv.h"
40 * ir_sanyo_decode() - Decode one SANYO pulse or space
44 * This function returns -EINVAL if the pulse violates the state machine
[all …]
H A Dir-rcmm-decoder.c1 // SPDX-License-Identifier: GPL-2.0+
2 // ir-rcmm-decoder.c - A decoder for the RCMM IR protocol
6 #include "rc-core-priv.h"
24 static bool rcmm_mode(const struct rcmm_dec *data) in rcmm_mode() argument
26 return !((0x000c0000 & data->bits) == 0x000c0000); in rcmm_mode()
29 static int rcmm_miscmode(struct rc_dev *dev, struct rcmm_dec *data) in rcmm_miscmode() argument
31 switch (data->count) { in rcmm_miscmode()
33 if (dev->enabled_protocols & RC_PROTO_BIT_RCMM24) { in rcmm_miscmode()
34 rc_keydown(dev, RC_PROTO_RCMM24, data->bits, 0); in rcmm_miscmode()
35 data->state = STATE_INACTIVE; in rcmm_miscmode()
[all …]
H A Dir-sony-decoder.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* ir-sony-decoder.c - handle Sony IR Pulse/Space protocol
9 #include "rc-core-priv.h"
28 * ir_sony_decode() - Decode one Sony pulse or space
32 * This function returns -EINVAL if the pulse violates the state machine
36 struct sony_dec *data = &dev->raw->sony; in ir_sony_decode() local
43 data->state = STATE_INACTIVE; in ir_sony_decode()
50 dev_dbg(&dev->dev, "Sony decode started at state %d (%uus %s)\n", in ir_sony_decode()
51 data->state, ev.duration, TO_STR(ev.pulse)); in ir_sony_decode()
53 switch (data->state) { in ir_sony_decode()
[all …]
/openbmc/linux/drivers/staging/media/atomisp/include/linux/
H A Datomisp_platform.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 #include <asm/intel-family.h>
25 #include <media/v4l2-subdev.h>
50 ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY,/* 8 bits per subpixel (legacy) */
51 ATOMISP_INPUT_FORMAT_YUV420_8, /* 8 bits per subpixel */
52 ATOMISP_INPUT_FORMAT_YUV420_10,/* 10 bits per subpixel */
53 ATOMISP_INPUT_FORMAT_YUV420_16,/* 16 bits per subpixel */
54 ATOMISP_INPUT_FORMAT_YUV422_8, /* UYVY..UVYV, 8 bits per subpixel */
55 ATOMISP_INPUT_FORMAT_YUV422_10,/* UYVY..UVYV, 10 bits per subpixel */
56 ATOMISP_INPUT_FORMAT_YUV422_16,/* UYVY..UVYV, 16 bits per subpixel */
[all …]
/openbmc/linux/include/linux/
H A Drio_drv.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 u32 * data);
22 u32 data);
24 u16 * data);
26 u16 data);
28 u8 * data);
30 u8 data);
33 u8 hopcount, u32 offset, u32 * data);
35 u8 hopcount, u32 offset, u32 data);
37 u8 hopcount, u32 offset, u16 * data);
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/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-interconnect.json25 …data to the uncore. These writes are generally queued up in the switch trying to get to the head …
34 …data to the uncore. These writes are generally queued up in the switch trying to get to the head …
43 …he occupancy increments when a write request is issued, and decrements when the data is returned.",
52 …he occupancy increments when a write request is issued, and decrements when the data is returned.",
61 …The occupancy increments when a read request is issued, and decrements when the data is returned.",
70 …The occupancy increments when a read request is issued, and decrements when the data is returned.",
97 …ncrements when the ownership fetch/prefetch is issued, and decrements the data is returned to the …
106 …ncrements when the ownership fetch/prefetch is issued, and decrements the data is returned to the …
143 …ress is full. This queue is where the IRP receives data from R2PCIe (the ring). It is used for d…
147 "BriefDescription": "BL Ingress Occupancy - DRS",
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/openbmc/linux/include/linux/can/
H A Dlength.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020 Marc Kleine-Budde <kernel@pengutronix.de>
10 #include <linux/bits.h>
16 * Size of a Classical CAN Standard Frame header in bits
18 * Name of Field Bits
19 * ---------------------------------------------------------
27 * Data Length Code (DLC) 4
29 * including all fields preceding the data field, ignoring bitstuffing
34 * Size of a Classical CAN Extended Frame header in bits
36 * Name of Field Bits
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/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dcss_receiver_2400_common_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* Definition of data format ID at the interface CSS_receiver capture/acquisition units */
28 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit …
29 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit …
30 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit lega…
31 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit …
32 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit …
44 …DATA_FORMAT_ID_USR_DEF_1 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] …
45 …_2400_DATA_FORMAT_ID_USR_DEF_2 49 /* 11 0001 User Defined 8-bit Data Type 2 …
46 …_2400_DATA_FORMAT_ID_USR_DEF_3 50 /* 11 0010 User Defined 8-bit Data Type 3 …
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H A Dcss_receiver_2400_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
46 /* division of gen_short data, ch_id and fmt_type over streaming data interface */
50 …VER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1)
51 …VER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1)
52 …VER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1)
90 /* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */
122 #define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data"
123 #define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out"
127 /* Bits for CSI2_DEVICE_READY register */
136 /* Bits for CSI2_FUNC_PROG register */
[all …]
H A Dsh_css_mipi.c1 // SPDX-License-Identifier: GPL-2.0
37 * - A line is multiple of 4 bytes = 1 word.
38 * - Each frame has SOF and EOF (each 1 word).
39 * - Each line has format header and optionally SOL and EOL (each 1 word).
40 * - Odd and even lines of YUV420 format are different in bites per pixel size.
41 * - Custom size of embedded data.
42 * -- Interleaved frames are not taken into account.
43 * -- Lines are multiples of 8B, and not necessary of (custom 3B, or 7B
45 * Result is given in DDR mem words, 32B or 256 bits
72 * in the non-continuous use scenario. in ia_css_mipi_frame_calculate_size()
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/openbmc/linux/drivers/staging/media/atomisp/pci/css_2401_system/hrt/
H A Dmipi_backend_common_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* Definition of data format ID at the interface CSS_receiver capture/acquisition units */
28 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit …
29 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit …
30 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit lega…
31 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit …
32 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit …
44 …DATA_FORMAT_ID_USR_DEF_1 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] …
45 …_2400_DATA_FORMAT_ID_USR_DEF_2 49 /* 11 0001 User Defined 8-bit Data Type 2 …
46 …_2400_DATA_FORMAT_ID_USR_DEF_3 50 /* 11 0010 User Defined 8-bit Data Type 3 …
[all …]
/openbmc/u-boot/scripts/dtc/
H A Ddtc-parser.y17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
43 struct data data; member
46 struct data data; member
47 int bits; member
70 %token <data> DT_STRING
75 %type <data> propdata
76 %type <data> propdataprefix
82 %type <data> bytestring
155 add_label(&$2->labels, $1);
174 * so $-1 is what we want (plugindecl)
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/openbmc/linux/lib/
H A Dbase64.c1 // SPDX-License-Identifier: GPL-2.0
3 * base64.c - RFC4648-compliant base64 encoding
8 * (which are using the URL-safe base64 encoding),
22 * base64_encode() - base64-encode some binary data
23 * @src: the binary data to encode
25 * @dst: (output) the base64-encoded string. Not NUL-terminated.
27 * Encodes data using base64 encoding, i.e. the "Base 64 Encoding" specified
28 * by RFC 4648, including the '='-padding.
30 * Return: the length of the resulting base64-encoded string in bytes.
35 int bits = 0; in base64_encode() local
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dti-ads7950.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
36 * Device tree users encode that via the vref-supply regulator.
52 /* val = value, dec = left shift, bits = number of bits of the mask */
53 #define TI_ADS7950_EXTRACT(val, dec, bits) \ argument
54 (((val) >> (dec)) & ((1 << (bits)) - 1))
61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
81 * Bitmask of lower 7 bits used for configuration
82 * These bits only can be written when TI_ADS7950_CR_WRITE
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/openbmc/qemu/tests/qemu-iotests/
H A D112.out6 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits
8 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits
10 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits
12 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits
14 refcount bits: 1
16 refcount bits: 64
18 refcount bits: 16
23 refcount bits: 16
25 qemu-img: TEST_DIR/t.IMGFMT: Different refcount widths than 16 bits require compatibility level 1.1…
27 qemu-img: TEST_DIR/t.IMGFMT: Different refcount widths than 16 bits require compatibility level 1.1…
[all …]
/openbmc/linux/lib/842/
H A D842.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * number of data bytes to add to the output buffer, or an index pointing
14 * to a previously-written number of data bytes to copy to the output buffer.
16 * The template code is a 5-bit value. This code indicates what to do with
17 * the following data. Template codes from 0 to 0x19 should use the template
20 * an arg following the template code bits. Each action is either a "data"
25 * N0 (for which there is no corresponding arg in the compressed data buffer).
27 * "Data" actions, indicated in the table by D2, D4, and D8, mean that the
28 * corresponding arg is 2, 4, or 8 bytes, respectively, in the compressed data
35 * in a ring buffer that contains the last N bytes of output buffer data.
[all …]
/openbmc/linux/Documentation/arch/sparc/oradax/
H A Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
13 …The following APIs provide access via the Hypervisor to hardware assisted data processing function…
16 live-migration and other system management activities.
18 36.1. Data Analytics Accelerator
19 …The Data Analytics Accelerator (DAX) functionality is a collection of hardware coprocessors that p…
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
21 …the following data query operations: search, extraction, compression, decompression, and translati…
24 …The DAX is a virtual device to sun4v guests, with supported data operations indicated by the virtu…
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
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/openbmc/qemu/docs/interop/
H A Dqcow2.txt5 both for actual guest data and for image metadata.
17 Byte 0 - 3: magic
20 4 - 7: version
23 8 - 15: backing_file_offset
28 Note: backing files are incompatible with raw external data
29 files (auto-clear feature bit 1).
31 16 - 19: backing_file_size
36 20 - 23: cluster_bits
37 Number of bits that are used for addressing an offset
48 24 - 31: size
[all …]
H A Dqed_spec.txt5 +----------+----------+----------+-----+
7 +----------+----------+----------+-----+
9 …re extra information about the image file. A regular cluster may be a '''data cluster''', an '''L…
11 …ultiple, extra information after the last cluster may not be preserved if data is written. Legiti…
13 All fields are little-endian.
23 uint64_t features; /* format feature bits */
24 uint64_t compat_features; /* compat feature bits */
25 uint64_t autoclear_features; /* self-resetting feature bits */
40 …known ''features'' bits enabled must not be opened. File format changes that are not backwards-co…
41 …known ''compat_features'' bits enabled can be opened safely. The unknown features are simply igno…
[all …]
/openbmc/u-boot/include/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common SPI Interface: Controller-specific definitions
22 #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
46 * struct dm_spi_platdata - platform data for all SPI slaves
50 * dev_get_parent_platdata(slave->dev).
52 * This data is immuatable. Each time the device is probed, @max_hz and @mode
55 * @cs: Chip select number (0..n-1)
68 * struct spi_slave - Representation of a SPI slave
70 * For driver model this is the per-child data used by the SPI bus. It can
73 * driver should not override it. Two platform data fields (max_hz and mode)
[all …]
/openbmc/qemu/rust/hw/char/pl011/src/
H A Dlib.rs3 // SPDX-License-Identifier: GPL-2.0-or-later
57 /// ARM DDI 0183G, Table 3-1 p.3-3
63 /// Data Register
65 /// A write to this register initiates the actual data transmission
82 /// `IrDA` Low-Power Counter Register
90 /// line control register (data frame format)
121 fn try_from(value: u64) -> Result<Self, Self::Error> { in try_from()
146 //! integer bitmaps. [`Data`], [`Control`], [`LineControl`], etc.
148 //! All PL011 registers are essentially 32-bit wide, but are typed here as
150 //! in this module is for example 16 bits long, it should be conceived
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dpmic_bus.c1 // SPDX-License-Identifier: GPL-2.0+
61 int pmic_bus_read(u8 reg, u8 *data) in pmic_bus_read() argument
64 return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); in pmic_bus_read()
66 return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); in pmic_bus_read()
69 return p2wi_read(reg, data); in pmic_bus_read()
71 return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); in pmic_bus_read()
73 return rsb_read(AXP223_RUNTIME_ADDR, reg, data); in pmic_bus_read()
78 int pmic_bus_write(u8 reg, u8 data) in pmic_bus_write() argument
81 return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1); in pmic_bus_write()
83 return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1); in pmic_bus_write()
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Dc6xdigio.c1 // SPDX-License-Identifier: GPL-2.0+
7 * COMEDI - Linux Control and Measurement Device Interface
20 * [0] - base address
53 status = inb(dev->iobase + C6XDIGIO_STATUS_REG); in c6xdigio_chk_status()
59 return -EBUSY; in c6xdigio_chk_status()
65 outb_p(val, dev->iobase + C6XDIGIO_DATA_REG); in c6xdigio_write_data()
70 unsigned int *bits, in c6xdigio_get_encoder_bits() argument
76 val = inb(dev->iobase + C6XDIGIO_STATUS_REG); in c6xdigio_get_encoder_bits()
80 *bits = val; in c6xdigio_get_encoder_bits()
89 unsigned int bits; in c6xdigio_pwm_write() local
[all …]

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