drivers/net/altera_tse.h

30  * Note: The control byte physically occupies bits [31:24] in memory.
31  *	 The following bit-offsets are expressed relative to the LSB of
42  * Note: The status byte physically occupies bits [23:16] in memory.
43  *	 The following bit-offsets are expressed relative to the LSB of
50  * 64 bits for each address. To support ANSI C, the
51  * struct implementing a descriptor places 32-bits
57  * Buffer Descriptor data structure
61 	u32 source;	/* the address of data to be read. */
64 	u32 destination;	/* the address to write data */
80 /* SG-DMA Control/Status Slave registers map */
95 	u32 read_addr_lo;	/* data buffer source address low bits */
96 	u32 write_addr_lo;	/* data buffer destination address low bits */
100 	u32 read_addr_hi;	/* data buffer source address high bits */
101 	u32 write_addr_hi;	/* data buffer destination address high bits */