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/openbmc/qemu/tests/qtest/libqos/
H A Di2c-omap.c7 * See the COPYING file in the top-level directory.
44 static void omap_i2c_set_slave_addr(OMAPI2C *s, uint8_t addr) in omap_i2c_set_slave_addr() argument
46 uint16_t data = addr; in omap_i2c_set_slave_addr() local
48 qtest_writew(s->parent.qts, s->addr + OMAP_I2C_SA, data); in omap_i2c_set_slave_addr()
49 data = qtest_readw(s->parent.qts, s->addr + OMAP_I2C_SA); in omap_i2c_set_slave_addr()
50 g_assert_cmphex(data, ==, addr); in omap_i2c_set_slave_addr()
53 static void omap_i2c_send(I2CAdapter *i2c, uint8_t addr, in omap_i2c_send() argument
57 uint16_t data; in omap_i2c_send() local
59 omap_i2c_set_slave_addr(s, addr); in omap_i2c_send()
61 data = len; in omap_i2c_send()
[all …]
H A Di2c-imx.c4 * Copyright (c) 2013 Jean-Christophe Dubois
33 static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr, in imx_i2c_set_slave_addr() argument
36 qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR, in imx_i2c_set_slave_addr()
37 (addr << 1) | (direction == IMX_I2C_READ ? 1 : 0)); in imx_i2c_set_slave_addr()
40 static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, in imx_i2c_send() argument
44 uint8_t data; in imx_i2c_send() local
53 data = I2CR_IEN | in imx_i2c_send()
59 qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); in imx_i2c_send()
60 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
64 imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE); in imx_i2c_send()
[all …]
/openbmc/qemu/tests/qtest/fuzz/
H A Dqtest_wrappers.c10 * See the COPYING file in the top-level directory.
26 WRAP(uint8_t , qtest_inb(QTestState *s, uint16_t addr)) in WRAP() argument
27 WRAP(uint16_t , qtest_inw(QTestState *s, uint16_t addr)) in WRAP()
28 WRAP(uint32_t , qtest_inl(QTestState *s, uint16_t addr)) in WRAP()
29 WRAP(void , qtest_outb(QTestState *s, uint16_t addr, uint8_t value)) in WRAP()
30 WRAP(void , qtest_outw(QTestState *s, uint16_t addr, uint16_t value)) in WRAP()
31 WRAP(void , qtest_outl(QTestState *s, uint16_t addr, uint32_t value)) in WRAP()
32 WRAP(uint8_t , qtest_readb(QTestState *s, uint64_t addr)) in WRAP()
33 WRAP(uint16_t , qtest_readw(QTestState *s, uint64_t addr)) in WRAP()
34 WRAP(uint32_t , qtest_readl(QTestState *s, uint64_t addr)) in WRAP()
[all …]
/openbmc/qemu/hw/pci-host/
H A Dtrace-events4 aspeed_pcie_phy_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
5 aspeed_pcie_phy_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
6 aspeed_pcie_cfg_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
7 aspeed_pcie_cfg_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
8 …8_t bus, uint8_t devfn, uint64_t offset, uint64_t data) "%s bus:0x%x devfn:0x%x addr 0x%" PRIx64 "…
9 aspeed_pcie_cfg_msi_notify(uint64_t offset, uint64_t data) "@0x%" PRIx64 " IRQ 0x%" PRIx64
11 aspeed_pcie_rc_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
12 aspeed_pcie_rc_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64
15 bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-b…
21 gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64
[all …]
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal2_avb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
19 * Offset 0x17: AVB Data Register
22 * "6352": 3-bit "op" field, 4-bit "port" field.
23 * "6390": 2-bit "op" field, 5-bit "port" field.
29 /* mv88e6xxx_g2_avb_read -- Read one or multiple 16-bit words.
40 u16 *data, int len) in mv88e6xxx_g2_avb_read() argument
51 return -E2BIG; in mv88e6xxx_g2_avb_read()
64 &data[i]); in mv88e6xxx_g2_avb_read()
72 /* mv88e6xxx_g2_avb_write -- Write one 16-bit word. */
[all …]
/openbmc/u-boot/arch/m68k/include/asm/
H A Dio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
18 #define __raw_readb(addr) (*(volatile u8 *)(addr)) argument
19 #define __raw_readw(addr) (*(volatile u16 *)(addr)) argument
20 #define __raw_readl(addr) (*(volatile u32 *)(addr)) argument
22 #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b)) argument
23 #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w)) argument
24 #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l)) argument
26 #define readb(addr) in_8((volatile u8 *)(addr)) argument
[all …]
/openbmc/linux/drivers/net/ethernet/wiznet/
H A Dw5100-spi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 …* http://www.wiznet.co.kr/wp-content/uploads/wiznethome/Chip/W5100/Document/W5100_Datasheet_v1.2.6…
9 …* http://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Chip/W5200/Documents/W5200_DS_V140E.p…
26 static int w5100_spi_read(struct net_device *ndev, u32 addr) in w5100_spi_read() argument
28 struct spi_device *spi = to_spi_device(ndev->dev.parent); in w5100_spi_read()
29 u8 cmd[3] = { W5100_SPI_READ_OPCODE, addr >> 8, addr & 0xff }; in w5100_spi_read()
30 u8 data; in w5100_spi_read() local
33 ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1); in w5100_spi_read()
35 return ret ? ret : data; in w5100_spi_read()
38 static int w5100_spi_write(struct net_device *ndev, u32 addr, u8 data) in w5100_spi_write() argument
[all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dsp_public.h1 /* SPDX-License-Identifier: GPL-2.0 */
53 \param value[in] The data to be written
66 \param value[in] The data to be written
116 \param addr[in] the address in DMEM
117 \param data[in] The data to be written
118 \param size[in] The size(in bytes) of the data to be written
120 \return none, SP[ID].dmem[addr...addr+size-1] = data
124 hrt_address addr,
125 const void *data,
131 \param addr[in] the address in DMEM
[all …]
/openbmc/qemu/hw/i2c/
H A Dsmbus_master.c19 int smbus_quick_command(I2CBus *bus, uint8_t addr, int read) in smbus_quick_command() argument
21 if (i2c_start_transfer(bus, addr, read)) { in smbus_quick_command()
22 return -1; in smbus_quick_command()
28 int smbus_receive_byte(I2CBus *bus, uint8_t addr) in smbus_receive_byte() argument
30 uint8_t data; in smbus_receive_byte() local
32 if (i2c_start_recv(bus, addr)) { in smbus_receive_byte()
33 return -1; in smbus_receive_byte()
35 data = i2c_recv(bus); in smbus_receive_byte()
38 return data; in smbus_receive_byte()
41 int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data) in smbus_send_byte() argument
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A Dodm_RegConfig8723B.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
12 u32 Addr, in odm_ConfigRFReg_8723B() argument
13 u32 Data, in odm_ConfigRFReg_8723B() argument
18 if (Addr == 0xfe || Addr == 0xffe) in odm_ConfigRFReg_8723B()
21 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data); in odm_ConfigRFReg_8723B()
26 if (Addr == 0xb6) { in odm_ConfigRFReg_8723B()
31 pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord in odm_ConfigRFReg_8723B()
36 while ((getvalue>>8) != (Data>>8)) { in odm_ConfigRFReg_8723B()
38 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data); in odm_ConfigRFReg_8723B()
[all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dia_css_device_access.c1 // SPDX-License-Identifier: GPL-2.0
33 ia_css_device_load_uint8(const hrt_address addr) in ia_css_device_load_uint8() argument
35 return my_env.load_8(addr); in ia_css_device_load_uint8()
39 ia_css_device_load_uint16(const hrt_address addr) in ia_css_device_load_uint16() argument
41 return my_env.load_16(addr); in ia_css_device_load_uint16()
45 ia_css_device_load_uint32(const hrt_address addr) in ia_css_device_load_uint32() argument
47 return my_env.load_32(addr); in ia_css_device_load_uint32()
51 ia_css_device_load_uint64(const hrt_address addr) in ia_css_device_load_uint64() argument
55 (void)addr; in ia_css_device_load_uint64()
60 ia_css_device_store_uint8(const hrt_address addr, const uint8_t data) in ia_css_device_store_uint8() argument
[all …]
/openbmc/qemu/hw/virtio/
H A Dvirtio-config-io.c9 * SPDX-License-Identifier: GPL-2.0-or-later
16 uint32_t virtio_config_readb(VirtIODevice *vdev, uint32_t addr) in virtio_config_readb() argument
21 if (addr + sizeof(val) > vdev->config_len) { in virtio_config_readb()
22 return (uint32_t)-1; in virtio_config_readb()
25 k->get_config(vdev, vdev->config); in virtio_config_readb()
27 val = ldub_p(vdev->config + addr); in virtio_config_readb()
31 uint32_t virtio_config_readw(VirtIODevice *vdev, uint32_t addr) in virtio_config_readw() argument
36 if (addr + sizeof(val) > vdev->config_len) { in virtio_config_readw()
37 return (uint32_t)-1; in virtio_config_readw()
40 k->get_config(vdev, vdev->config); in virtio_config_readw()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dsch56xx-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> *
20 #include "sch56xx-common.h"
29 #define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */
30 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
53 u16 addr; member
76 return -EBUSY; in superio_enter()
96 static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v) in sch56xx_send_cmd() argument
103 * responds within 15-32 reads, so we first busy poll, and if in sch56xx_send_cmd()
110 /* (Optional) Write-Clear the EC to Host Mailbox Register */ in sch56xx_send_cmd()
[all …]
/openbmc/qemu/hw/misc/
H A Dtrace-events3 # allwinner-cpucfg.c
5 allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%…
6 allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x…
8 # allwinner-h3-dramc.c
10 allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11 …lwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 "…
12 …inner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 "…
13 …lwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 "…
14 …inner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 "…
15 …lwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 "…
[all …]
/openbmc/qemu/hw/i386/
H A Dtrace-events3 # x86-iommu.c
14 …nv_desc_iotlb_pages(uint16_t domain, uint64_t addr, uint8_t mask) "iotlb invalidate domain 0x%"PRI…
15 …pasid_pages(uint16_t domain, uint64_t addr, uint8_t mask, uint32_t pasid) "iotlb invalidate domain…
17 vtd_inv_desc_wait_sw(uint64_t addr, uint32_t data) "wait invalidate status write addr 0x%"PRIx64" d…
22 vtd_inv_qi_setup(uint64_t addr, int size) "addr 0x%"PRIx64" size %d"
29 vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) "IOTLB page hit si…
30 vtd_iotlb_page_update(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) "IOTLB page upd…
32 …date bus 0x%"PRIx8" devfn 0x%"PRIx8" high 0x%"PRIx64" low 0x%"PRIx64" gen %"PRIu32" -> gen %"PRIu32
37 …k_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) "walk (base=0x%"PRIx64", leve…
38 …uint64_t gpa, uint64_t mask, int perm) "domain 0x%"PRIx16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mas…
[all …]
/openbmc/linux/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_xgmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Applied Micro X-Gene SoC Ethernet Driver
18 void __iomem *addr = pdata->eth_csr_addr + offset; in xgene_enet_wr_csr() local
20 iowrite32(val, addr); in xgene_enet_wr_csr()
26 void __iomem *addr = pdata->eth_ring_if_addr + offset; in xgene_enet_wr_ring_if() local
28 iowrite32(val, addr); in xgene_enet_wr_ring_if()
34 void __iomem *addr = pdata->eth_diag_csr_addr + offset; in xgene_enet_wr_diag_csr() local
36 iowrite32(val, addr); in xgene_enet_wr_diag_csr()
39 static bool xgene_enet_wr_indirect(void __iomem *addr, void __iomem *wr, in xgene_enet_wr_indirect() argument
46 iowrite32(wr_addr, addr); in xgene_enet_wr_indirect()
[all …]
/openbmc/linux/arch/s390/kernel/
H A Dptrace.c1 // SPDX-License-Identifier: GPL-2.0
43 struct thread_struct *thread = &task->thread; in update_cr_regs()
57 if (task->thread.per_flags & PER_FLAG_NO_TE) in update_cr_regs()
61 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) { in update_cr_regs()
62 if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND) in update_cr_regs()
71 if (task->thread.gs_cb) in update_cr_regs()
82 new.control = thread->per_user.control; in update_cr_regs()
83 new.start = thread->per_user.start; in update_cr_regs()
84 new.end = thread->per_user.end; in update_cr_regs()
98 new.end = -1UL; in update_cr_regs()
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dpca9698.c1 // SPDX-License-Identifier: GPL-2.0+
28 static int pca9698_read40(u8 addr, u8 offset, u8 *buffer) in pca9698_read40() argument
32 return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); in pca9698_read40()
35 static int pca9698_write40(u8 addr, u8 offset, u8 *buffer) in pca9698_write40() argument
39 return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); in pca9698_write40()
56 return -EINVAL; in pca9698_request()
65 int pca9698_direction_input(u8 addr, unsigned gpio) in pca9698_direction_input() argument
67 u8 data[PCA9698_BUFFER_SIZE]; in pca9698_direction_input() local
70 res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); in pca9698_direction_input()
74 pca9698_set_bit(gpio, data, 1); in pca9698_direction_input()
[all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/device_access/
H A Ddevice_access.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 Copyright (c) 2010 - 2015, Intel Corporation.
41 * - hrt_address a type that can hold the (sub)system address range
46 * a pointer because a (say) 64-bit host can be simulated in a 32-bit
72 /*! Read an 8-bit value from a device register or memory in the device
74 \param addr[in] Local address
76 \return device[addr]
79 const hrt_address addr);
81 /*! Read a 16-bit value from a device register or memory in the device
83 \param addr[in] Local address
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dvmlinux.lds.S1 /* SPDX-License-Identifier: GPL-2.0 */
15 __soft_mask_table : AT(ADDR(__soft_mask_table) - LOAD_OFFSET) { \
23 __restart_table : AT(ADDR(__restart_table) - LOAD_OFFSET) { \
30 #include <asm-generic/vmlinux.lds.h>
59 * Text, read only data and other permanent read-only sections
72 .head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
82 KEEP(*(.head.data.fwnmi_page));
98 .text ALIGN(0) : AT(ADDR(.text) - LOAD_OFFSET) {
105 .text : AT(ADDR(.text) - LOAD_OFFSET) {
118 * -Os builds call FP save/restore functions. The powerpc64
[all …]
/openbmc/u-boot/drivers/usb/musb-new/
H A Dmusb_io.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
27 static inline void readsl(const void __iomem *addr, void *buf, int len) in readsl() argument
28 { insl((unsigned long)addr, buf, len); } in readsl()
29 static inline void readsw(const void __iomem *addr, void *buf, int len) in readsw() argument
30 { insw((unsigned long)addr, buf, len); } in readsw()
31 static inline void readsb(const void __iomem *addr, void *buf, int len) in readsb() argument
32 { insb((unsigned long)addr, buf, len); } in readsb()
34 static inline void writesl(const void __iomem *addr, const void *buf, int len) in writesl() argument
[all …]
/openbmc/phosphor-power/tools/i2c/
H A Di2c_interface.hpp19 uint8_t addr, int errorCode = 0) : in I2CException() argument
20 bus(bus), addr(addr), errorCode(errorCode) in I2CException()
23 ss << "I2CException: " << info << ": bus " << bus << ", addr 0x" in I2CException()
24 << std::hex << static_cast<int>(addr); in I2CException()
39 uint8_t addr; member in i2c::I2CException
83 * The interface can later be re-opened by calling open().
94 /** @brief Read byte data from i2c
96 * @param[out] data - The data read from the i2c device
100 virtual void read(uint8_t& data) = 0;
102 /** @brief Read byte data from i2c
[all …]
/openbmc/qemu/hw/timer/
H A Dtrace-events6 slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 0x%"PRIx64
7 slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read 0x%"PRIx64" = 0x%08x"
8 slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write 0x%"PRIx64" = 0x%08x"
16 slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 0x%"PRIx64
24 grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
25 grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
39 systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x…
40 systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data …
42 # cmsdk-apb-timer.c
43 …_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" …
[all …]
/openbmc/linux/arch/ia64/kernel/
H A Dvmlinux.lds.S1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <asm-generic/vmlinux.lds.h>
13 OUTPUT_FORMAT("elf64-ia64-little")
21 data PT_LOAD;
39 phys_start = _start - LOAD_OFFSET;
48 .text : AT(ADDR(.text) - LOAD_OFFSET) {
61 .text2 : AT(ADDR(.text2) - LOAD_OFFSET) {
66 .text..lock : AT(ADDR(.text..lock) - LOAD_OFFSET) {
73 * Read-only data
78 __mca_table : AT(ADDR(__mca_table) - LOAD_OFFSET) {
[all …]
/openbmc/linux/drivers/thermal/
H A Dhisi_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2014-2015 HiSilicon Limited.
6 * Copyright (c) 2014-2015 Linaro Limited.
40 #define HI6220_TEMP_BASE (-60000)
45 #define HI3660_TEMP_BASE (-63780)
60 struct hisi_thermal_data *data; member
72 int (*probe)(struct hisi_thermal_data *data);
88 * Temperature base: -60°C
91 * millidegree and begins at -60 000 m°C
99 * steps = (Temp - TempBase) / 785
[all …]

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