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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsamsung,exynos-dw-mshc.yaml36 Handle to "biu" and "ciu" clocks for the
42 - const: ciu
44 samsung,dw-mshc-ciu-div:
49 The divider value for the card interface unit (ciu) clock.
54 - description: CIU clock phase shift value for tx mode
57 - description: CIU clock phase shift value for rx mode
61 The value of CUI clock phase shift value in transmit mode and CIU clock
68 - description: CIU clock phase shift value for tx mode
71 - description: CIU clock phase shift value for rx mode
75 The value of CIU TX and RX clock phase shift value for HS400 mode
[all …]
H A Drockchip-dw-mshc.yaml57 Handle to "biu" and "ciu" clocks for the bus interface unit clock and
58 the card interface unit clock. If "ciu-drive" and "ciu-sample" are
66 - const: ciu
67 - const: ciu-drive
68 - const: ciu-sample
70 Apart from the clock-names "biu" and "ciu" two more clocks
71 "ciu-drive" and "ciu-sample" are supported. They are used
72 to control the clock phases, "ciu-sample" is required for tuning
84 The default phase to set "ciu-sample" at probing,
118 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
H A Dhi3798cv200-dw-mshc.txt17 "ciu" - The ciu clock described in synopsys-dw-mshc.txt.
19 "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling.
20 "ciu-drive" - Hi3798CV200 extended phase clock for ciu driving.
32 clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
H A Dstarfive,jh7110-mmc.yaml29 - description: ciu clock
34 - const: ciu
69 clock-names = "biu","ciu";
H A Dsynopsys-dw-mshc-common.yaml25 Should be the frequency (in Hz) of the ciu clock. If this
26 is specified and the ciu clock is specified then we'll try to set the ciu
H A Dsynopsys-dw-mshc.yaml30 Handle to "biu" and "ciu" clocks for the
36 - const: ciu
83 clock-names = "biu", "ciu";
H A Dk3-dw-mshc.txt36 clock-names = "ciu", "biu";
66 clock-names = "ciu", "biu";
/openbmc/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dciu.txt4 - compatible: "cavium,octeon-3860-ciu"
10 - reg: The base address of the CIU's register bank.
13 the CIU and may have a value of 0 or 1. The second cell is the bit
18 compatible = "cavium,octeon-3860-ciu";
H A Dciu2.txt10 - reg: The base address of the CIU's register bank.
13 the CIU and may have a value between 0 and 63. The second cell is
H A Dcib.txt16 - interrupts: The CIU line to which the CIB block is connected.
31 interrupt-parent = <&ciu>;
/openbmc/linux/drivers/mmc/host/
H A Ddw_mmc-hi3798cv200.c130 priv->sample_clk = devm_clk_get(host->dev, "ciu-sample"); in dw_mci_hi3798cv200_init()
132 dev_err(host->dev, "failed to get ciu-sample clock\n"); in dw_mci_hi3798cv200_init()
136 priv->drive_clk = devm_clk_get(host->dev, "ciu-drive"); in dw_mci_hi3798cv200_init()
138 dev_err(host->dev, "failed to get ciu-drive clock\n"); in dw_mci_hi3798cv200_init()
144 dev_err(host->dev, "failed to enable ciu-sample clock\n"); in dw_mci_hi3798cv200_init()
150 dev_err(host->dev, "failed to enable ciu-drive clock\n"); in dw_mci_hi3798cv200_init()
H A Ddw_mmc-rockchip.c280 priv->drv_clk = devm_clk_get(host->dev, "ciu-drive"); in dw_mci_rk3288_parse_dt()
282 dev_dbg(host->dev, "ciu-drive not available\n"); in dw_mci_rk3288_parse_dt()
284 priv->sample_clk = devm_clk_get(host->dev, "ciu-sample"); in dw_mci_rk3288_parse_dt()
286 dev_dbg(host->dev, "ciu-sample not available\n"); in dw_mci_rk3288_parse_dt()
/openbmc/linux/arch/mips/cavium-octeon/
H A Docteon-irq.c76 struct { /* only used for ciu/ciu2 */
83 int ciu_node; /* NUMA node number of the CIU */
804 * For non-v2 CIU, we will allow only single CPU affinity. in octeon_irq_ciu_set_affinity()
937 * Newer octeon chips have support for lockless CIU operation.
940 .name = "CIU",
952 .name = "CIU",
965 * Newer octeon chips have support for lockless CIU operation.
968 .name = "CIU",
980 .name = "CIU",
993 .name = "CIU",
[all …]
H A DKconfig84 tristate "Module to measure interrupt latency using Octeon CIU Timer"
87 the CIU Timers on Octeon.
/openbmc/u-boot/arch/arm/dts/
H A Drv1108.dtsi189 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
201 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
213 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi471 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
484 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
496 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
H A Drk3128.dtsi133 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
149 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
165 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
H A Drv1108.dtsi468 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
480 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
492 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
H A Drk3036.dtsi252 clock-names = "biu", "ciu";
266 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
284 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
H A Drk322x.dtsi758 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
771 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
786 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Daltr_socfpga.txt27 the SDMMC CIU clock. The first value is the clk_sample(smpsel), and the second
29 hold/delay times that is needed for the SD/MMC CIU clock. The values of both
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260-xyref5260.dts98 samsung,dw-mshc-ciu-div = <3>;
110 samsung,dw-mshc-ciu-div = <3>;
H A Dexynos5410-smdk5410.dts70 samsung,dw-mshc-ciu-div = <3>;
80 samsung,dw-mshc-ciu-div = <3>;
/openbmc/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_3xxx.dtsi10 interrupt-parent = <&ciu>;
18 ciu: interrupt-controller@1070000000000 { label
19 compatible = "cavium,octeon-3860-ciu";
/openbmc/linux/arch/arc/boot/dts/
H A Dhsdk.dts154 mmcclk_ciu: mmcclk-ciu {
157 * DW sdio controller has external ciu clock divider
259 clock-names = "biu", "ciu";

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