18655ff21SJohan Jonker# SPDX-License-Identifier: GPL-2.0 28655ff21SJohan Jonker%YAML 1.2 38655ff21SJohan Jonker--- 48655ff21SJohan Jonker$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml# 58655ff21SJohan Jonker$schema: http://devicetree.org/meta-schemas/core.yaml# 68655ff21SJohan Jonker 7*84e85359SKrzysztof Kozlowskititle: Synopsys Designware Mobile Storage Host Controller 88655ff21SJohan Jonker 98655ff21SJohan Jonkermaintainers: 108655ff21SJohan Jonker - Ulf Hansson <ulf.hansson@linaro.org> 118655ff21SJohan Jonker 128655ff21SJohan Jonker# Everything else is described in the common file 138655ff21SJohan Jonkerproperties: 148655ff21SJohan Jonker compatible: 15356f3f2cSKrzysztof Kozlowski enum: 16356f3f2cSKrzysztof Kozlowski - altr,socfpga-dw-mshc 17356f3f2cSKrzysztof Kozlowski - img,pistachio-dw-mshc 18356f3f2cSKrzysztof Kozlowski - snps,dw-mshc 198655ff21SJohan Jonker 208655ff21SJohan Jonker reg: 218655ff21SJohan Jonker maxItems: 1 228655ff21SJohan Jonker 238655ff21SJohan Jonker interrupts: 248655ff21SJohan Jonker maxItems: 1 258655ff21SJohan Jonker 268655ff21SJohan Jonker clocks: 278655ff21SJohan Jonker minItems: 2 288655ff21SJohan Jonker maxItems: 2 298655ff21SJohan Jonker description: 308655ff21SJohan Jonker Handle to "biu" and "ciu" clocks for the 318655ff21SJohan Jonker bus interface unit clock and the card interface unit clock. 328655ff21SJohan Jonker 338655ff21SJohan Jonker clock-names: 348655ff21SJohan Jonker items: 358655ff21SJohan Jonker - const: biu 368655ff21SJohan Jonker - const: ciu 378655ff21SJohan Jonker 38ccfa2466SDinh Nguyen altr,sysmgr-syscon: 39ccfa2466SDinh Nguyen $ref: /schemas/types.yaml#/definitions/phandle-array 40ccfa2466SDinh Nguyen items: 41ccfa2466SDinh Nguyen - items: 42ccfa2466SDinh Nguyen - description: phandle to the sysmgr node 43ccfa2466SDinh Nguyen - description: register offset that controls the SDMMC clock phase 44ccfa2466SDinh Nguyen - description: register shift for the smplsel(drive in) setting 45ccfa2466SDinh Nguyen description: 46ccfa2466SDinh Nguyen This property is optional. Contains the phandle to System Manager block 47ccfa2466SDinh Nguyen that contains the SDMMC clock-phase control register. The first value is 48ccfa2466SDinh Nguyen the pointer to the sysmgr, the 2nd value is the register offset for the 49ccfa2466SDinh Nguyen SDMMC clock phase register, and the 3rd value is the bit shift for the 50ccfa2466SDinh Nguyen smplsel(drive in) setting. 51ccfa2466SDinh Nguyen 52ccfa2466SDinh NguyenallOf: 53ccfa2466SDinh Nguyen - $ref: synopsys-dw-mshc-common.yaml# 54ccfa2466SDinh Nguyen 55ccfa2466SDinh Nguyen - if: 56ccfa2466SDinh Nguyen properties: 57ccfa2466SDinh Nguyen compatible: 58ccfa2466SDinh Nguyen contains: 59ccfa2466SDinh Nguyen const: altr,socfpga-dw-mshc 60ccfa2466SDinh Nguyen then: 61ccfa2466SDinh Nguyen properties: 62ccfa2466SDinh Nguyen altr,sysmgr-syscon: true 63ccfa2466SDinh Nguyen else: 64ccfa2466SDinh Nguyen properties: 65ccfa2466SDinh Nguyen altr,sysmgr-syscon: false 66ccfa2466SDinh Nguyen 678655ff21SJohan Jonkerrequired: 688655ff21SJohan Jonker - compatible 698655ff21SJohan Jonker - reg 708655ff21SJohan Jonker - interrupts 718655ff21SJohan Jonker - clocks 728655ff21SJohan Jonker - clock-names 738655ff21SJohan Jonker 746fdc6e23SRob HerringunevaluatedProperties: false 756fdc6e23SRob Herring 768655ff21SJohan Jonkerexamples: 778655ff21SJohan Jonker - | 788655ff21SJohan Jonker mmc@12200000 { 798655ff21SJohan Jonker compatible = "snps,dw-mshc"; 808655ff21SJohan Jonker reg = <0x12200000 0x1000>; 818655ff21SJohan Jonker interrupts = <0 75 0>; 828655ff21SJohan Jonker clocks = <&clock 351>, <&clock 132>; 838655ff21SJohan Jonker clock-names = "biu", "ciu"; 848655ff21SJohan Jonker dmas = <&pdma 12>; 858655ff21SJohan Jonker dma-names = "rx-tx"; 868655ff21SJohan Jonker resets = <&rst 20>; 878655ff21SJohan Jonker reset-names = "reset"; 888655ff21SJohan Jonker vmmc-supply = <&buck8>; 898655ff21SJohan Jonker #address-cells = <1>; 908655ff21SJohan Jonker #size-cells = <0>; 918655ff21SJohan Jonker broken-cd; 928655ff21SJohan Jonker bus-width = <8>; 938655ff21SJohan Jonker cap-mmc-highspeed; 948655ff21SJohan Jonker cap-sd-highspeed; 958655ff21SJohan Jonker card-detect-delay = <200>; 96398b2500SJohan Jonker max-frequency = <200000000>; 978655ff21SJohan Jonker clock-frequency = <400000000>; 988655ff21SJohan Jonker data-addr = <0x200>; 998655ff21SJohan Jonker fifo-depth = <0x80>; 1008655ff21SJohan Jonker fifo-watermark-aligned; 1018655ff21SJohan Jonker }; 102