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/openbmc/linux/net/mac80211/
H A DKconfig126 Selecting this option causes mac80211 to print out
137 Selecting this option causes mac80211 to print out
148 Selecting this option causes mac80211 to print out
169 Selecting this option causes mac80211 to print out
180 Selecting this option causes mac80211 to print out
191 Selecting this option causes mac80211 to print out very
204 Selecting this option causes mac80211 to print out very
217 Selecting this option causes mac80211 to print out very
230 Selecting this option causes mac80211 to print out very
243 Selecting this option causes mac80211 to print out very verbose mesh
[all …]
/openbmc/sdbusplus/src/
H A Dbus.cpp104 // Emitting object added causes a message to get the properties in bus()
106 // the bus isn't up far enough, this causes an assert deep in in bus()
119 // Emitting object added causes a message to get the properties in bus()
121 // the bus isn't up far enough, this causes an assert deep in in bus()
133 // Emitting object added causes a message to get the properties in bus()
135 // the bus isn't up far enough, this causes an assert deep in in bus()
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswell/
H A Dvirtual-memory.json43 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
51 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
58 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
66 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
85 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
145 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
179 "PublicDescription": "Misses in ITLB that causes a page walk of any page size.",
216 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
223 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
231 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Dvirtual-memory.json43 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
51 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
58 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
66 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
85 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
145 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
179 "PublicDescription": "Misses in ITLB that causes a page walk of any page size.",
216 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
223 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
231 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/docs/designs/
H A Dbmc-reboot-cause-update.md15 causes to better align with current usage needs.
19 In the current approach, the only defined reboot causes are **WDIOF_EXTERN1**
22 cover all possible reboot causes. In this update, we will add support for
56 causes, improving system reliability and monitoring. Belows are the details of
102 1. Common reboot causes across vendors can be consolidated to issue a unified
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-power.json134 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
142 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
150 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
158 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
166 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
174 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
182 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
190 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
198 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
206 …te. In other words, a wake event occurred before the timer expired that causes a transition into …
[all …]
H A Dvirtual-memory.json3 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
24 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of an…
40 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
59 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
75 …"PublicDescription": "Miss in all TLB levels causes a page walk that completes of any page size (4…
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dvirtual-memory.json33 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
50 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
59 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
133 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
205 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
214 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
223 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dvirtual-memory.json33 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
50 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
59 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
133 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
205 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
214 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
223 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A Dvirtual-memory.json33 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
41 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
50 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
59 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
133 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (4K)",
205 "BriefDescription": "Store miss in all TLB levels causes a page walk that completes. (1G)",
214 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
223 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a76/
H A Dcache.json11 …event counts any load or store operation or page table walk access which causes data to be read fr…
15 …. In particular, any access which could count the L1D_CACHE_REFILL event causes this event to coun…
35 … cache refill. This event counts any cacheable transaction from L1 which causes data to be read fr…
81 … "PublicDescription": "This event counts on any data access which causes L2D_TLB_REFILL to count.",
85 …"PublicDescription": "This event counts on any instruction access which causes L2D_TLB_REFILL to c…
/openbmc/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Dvirtual-memory.json3 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
11 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
19 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
/openbmc/linux/Documentation/ABI/testing/
H A Ddebugfs-scmi-raw11 Each write to the entry causes one command request to be built
29 Each write to the entry causes one command request to be built
61 causes the internal queues of any kind of received message,
80 Each write to the entry causes one command request to be built
107 Each write to the entry causes one command request to be built
H A Dsysfs-bus-iio-light-tsl27725 Causes an internal calibration of the als gain trim
12 Causes a recalculation and adjustment to the
/openbmc/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A Dvirtual-memory.json20 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
69 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
118 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
126 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
134 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Dvirtual-memory.json20 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
77 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
134 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
142 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
150 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelake/
H A Dvirtual-memory.json20 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
69 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
118 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
126 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
134 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A Dvirtual-memory.json20 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
69 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
118 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
126 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
134 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A Dvirtual-memory.json10 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes an page walk of an…
26 …ion": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a page walk that c…
45 … "PublicDescription": "Miss in all TLB levels causes a page walk of any page size (4K/2M/4M/1G).",
61 …"PublicDescription": "Miss in all TLB levels causes a page walk that completes of any page size (4…
/openbmc/qemu/hw/net/
H A De1000e_core.c255 e1000e_intrmgr_delay_rx_causes(E1000ECore *core, uint32_t *causes) in e1000e_intrmgr_delay_rx_causes() argument
274 /* Clean up all causes that may be delayed */ in e1000e_intrmgr_delay_rx_causes()
275 core->delayed_causes |= *causes & delayable_causes; in e1000e_intrmgr_delay_rx_causes()
276 *causes &= ~delayable_causes; in e1000e_intrmgr_delay_rx_causes()
280 * or if there are causes that cannot be delayed in e1000e_intrmgr_delay_rx_causes()
282 if ((rdtr == 0) || (*causes != 0)) { in e1000e_intrmgr_delay_rx_causes()
294 /* All causes delayed */ in e1000e_intrmgr_delay_rx_causes()
309 e1000e_intrmgr_delay_tx_causes(E1000ECore *core, uint32_t *causes) in e1000e_intrmgr_delay_tx_causes() argument
320 /* Clean up all causes that may be delayed */ in e1000e_intrmgr_delay_tx_causes()
321 core->delayed_causes |= *causes & delayable_causes; in e1000e_intrmgr_delay_tx_causes()
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A Dvirtual-memory.json20 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
77 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
134 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
142 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
150 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Dvirtual-memory.json28 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
93 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
173 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
181 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
189 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
197 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Dvirtual-memory.json28 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
93 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
173 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
181 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
189 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
197 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylake/
H A Dvirtual-memory.json28 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
93 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
173 …"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page size…
181 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
189 … "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
197 "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
/openbmc/qemu/tests/tcg/multiarch/gdbstub/
H A Dtest-qxfer-siginfo-read.py5 # The test runs a binary that causes a SIGSEGV and then looks for additional
9 # The binary causes a SIGSEGV at dereferencing a pointer with value 0xdeadbeef,

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