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/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dhyperv_features.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Tests for Hyper-V features enablement
18 * but to activate the feature it is sufficient to set it to a non-zero
32 uint64_t control; member
47 GUEST_ASSERT(msr->idx); in guest_msr()
49 if (msr->write) in guest_msr()
50 vector = wrmsr_safe(msr->idx, msr->write_val); in guest_msr()
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr()
53 vector = rdmsr_safe(msr->idx, &msr_val); in guest_msr()
55 if (msr->fault_expected) in guest_msr()
[all …]
/openbmc/qemu/hw/misc/
H A Dallwinner-cpucfg.c26 #include "qemu/error-report.h"
29 #include "target/arm/arm-powerctl.h"
31 #include "hw/misc/allwinner-cpucfg.h"
36 REG_CPUS_RST_CTRL = 0x0000, /* CPUs Reset Control */
37 REG_CPU0_RST_CTRL = 0x0040, /* CPU#0 Reset Control */
38 REG_CPU0_CTRL = 0x0044, /* CPU#0 Control */
40 REG_CPU1_RST_CTRL = 0x0080, /* CPU#1 Reset Control */
41 REG_CPU1_CTRL = 0x0084, /* CPU#1 Control */
43 REG_CPU2_RST_CTRL = 0x00C0, /* CPU#2 Reset Control */
44 REG_CPU2_CTRL = 0x00C4, /* CPU#2 Control */
[all …]
H A Da9scu.c2 * Cortex-A9MPCore Snoop Control Unit (SCU) emulation.
13 #include "hw/qdev-properties.h"
26 case 0x00: /* Control */ in a9_scu_read()
27 return s->control; in a9_scu_read()
29 return (((1 << s->num_cpu) - 1) << 4) | (s->num_cpu - 1); in a9_scu_read()
31 return s->status; in a9_scu_read()
38 case 0x50: /* SCU Access Control Register */ in a9_scu_read()
39 case 0x54: /* SCU Non-secure Access Control Register */ in a9_scu_read()
54 case 0x00: /* Control */ in a9_scu_write()
55 s->control = value & 1; in a9_scu_write()
[all …]
/openbmc/linux/sound/core/seq/
H A Dseq_midi_emul.c1 // SPDX-License-Identifier: GPL-2.0-or-later
39 int control, int value);
62 * Generic MIDI - no interpretation at all, it will just save current values
64 * GM - You can use all gm_ prefixed elements of chan. Controls, RPN, NRPN,
66 * GS - You can use all gs_ prefixed elements of chan. Codes for GS will be
68 * XG - You can use all xg_ prefixed elements of chan. Codes for XG will
84 if (chanset->channels == NULL) in snd_midi_process_event()
88 dest_channel = ev->data.note.channel; in snd_midi_process_event()
89 if (dest_channel >= chanset->max_channels) { in snd_midi_process_event()
91 dest_channel, chanset->max_channels); in snd_midi_process_event()
[all …]
/openbmc/linux/drivers/staging/vc04_services/bcm2835-camera/
H A Dcontrols.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <media/videobuf2-vmalloc.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-fh.h>
23 #include <media/v4l2-event.h>
24 #include <media/v4l2-common.h>
26 #include "../vchiq-mmal/mmal-common.h"
27 #include "../vchiq-mmal/mmal-vchiq.h"
[all …]
/openbmc/linux/drivers/acpi/acpica/
H A Ddscontrol.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: dscontrol - Support for execution control opcodes -
7 * Copyright (C) 2000 - 2023, Intel Corp.
25 * PARAMETERS: walk_list - The list that owns the walk stack
26 * op - The control Op
30 * DESCRIPTION: Handles all control ops encountered during control method
44 op, op->common.aml_opcode, walk_state)); in acpi_ds_exec_begin_control_op()
46 switch (op->common.aml_opcode) { in acpi_ds_exec_begin_control_op()
50 * There is no need to allocate a new control state. in acpi_ds_exec_begin_control_op()
52 if (walk_state->control_state) { in acpi_ds_exec_begin_control_op()
[all …]
/openbmc/linux/arch/arm/mach-rpc/include/mach/
H A Dacornfb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-rpc/include/mach/acornfb.h
10 #define acornfb_bandwidth(var) ((var)->pixclock * 8 / (var)->bits_per_pixel)
17 if (!var->pixclock) in acornfb_valid_pixrate()
60 d = pixclk - p; in acornfb_vidc20_find_pll()
63 d = -d; in acornfb_vidc20_find_pll()
67 best_v = v - 1; in acornfb_vidc20_find_pll()
68 best_r = r - 1; in acornfb_vidc20_find_pll()
72 break; in acornfb_vidc20_find_pll()
84 /* Select pixel-clock divisor to keep PLL in range */ in acornfb_vidc20_find_rates()
[all …]
/openbmc/linux/net/bluetooth/
H A Dl2cap_core.c2 BlueZ - Bluetooth protocol stack for Linux
3 Copyright (C) 2000-2001 Qualcomm Incorporated
4 Copyright (C) 2009-2010 Gustavo F. Padovan <gustavo@padovan.org>
60 static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control,
80 return bdaddr_type(hcon->type, hcon->src_type); in bdaddr_src_type()
85 return bdaddr_type(hcon->type, hcon->dst_type); in bdaddr_dst_type()
88 /* ---- L2CAP channels ---- */
95 list_for_each_entry(c, &conn->chan_l, list) { in __l2cap_get_chan_by_dcid()
96 if (c->dcid == cid) in __l2cap_get_chan_by_dcid()
107 list_for_each_entry(c, &conn->chan_l, list) { in __l2cap_get_chan_by_scid()
[all …]
/openbmc/qemu/hw/timer/
H A Dcmsdk-apb-dualtimer.c2 * ARM CMSDK APB dual-timer emulation
13 * This is a model of the "APB dual-input timer" which is part of the Cortex-M
14 * System Design Kit (CMSDK) and documented in the Cortex-M System
16 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
26 #include "hw/qdev-properties.h"
28 #include "hw/qdev-clock.h"
29 #include "hw/timer/cmsdk-apb-dualtimer.h"
35 FIELD(CONTROL, ONESHOT, 0, 1)
36 FIELD(CONTROL, SIZE, 1, 1)
37 FIELD(CONTROL, PRESCALE, 2, 2)
[all …]
H A Dallwinner-a10-pit.c20 #include "hw/qdev-properties.h"
22 #include "hw/timer/allwinner-a10-pit.h"
32 qemu_set_irq(s->irq[i], !!(s->irq_status & s->irq_enable & (1 << i))); in a10_pit_update_irq()
43 return s->irq_enable; in a10_pit_read()
45 return s->irq_status; in a10_pit_read()
49 index -= 1; in a10_pit_read()
52 return s->control[index]; in a10_pit_read()
54 return s->interval[index]; in a10_pit_read()
56 s->count[index] = ptimer_get_count(s->timer[index]); in a10_pit_read()
57 return s->count[index]; in a10_pit_read()
[all …]
H A Darmv7m_systick.c4 * Copyright (c) 2006-2007 CodeSourcery.
17 #include "hw/qdev-clock.h"
31 #define SYSCALIB_TENMS ((1U << 24) - 1)
39 if (s->control & SYSTICK_CLKSOURCE) { in systick_set_period_from_clock()
40 ptimer_set_period_from_clock(s->ptimer, s->cpuclk, 1); in systick_set_period_from_clock()
42 ptimer_set_period_from_clock(s->ptimer, s->refclk, 1); in systick_set_period_from_clock()
52 s->control |= SYSTICK_COUNTFLAG; in systick_timer_tick()
53 if (s->control & SYSTICK_TICKINT) { in systick_timer_tick()
55 qemu_irq_pulse(s->irq); in systick_timer_tick()
57 if (ptimer_get_limit(s->ptimer) == 0) { in systick_timer_tick()
[all …]
/openbmc/qemu/hw/dma/
H A Dsifive_pdma.c28 #include "hw/qdev-properties.h"
73 uint64_t bytes = s->chan[ch].next_bytes; in sifive_pdma_run()
74 uint64_t dst = s->chan[ch].next_dst; in sifive_pdma_run()
75 uint64_t src = s->chan[ch].next_src; in sifive_pdma_run()
76 uint32_t config = s->chan[ch].next_config; in sifive_pdma_run()
112 s->chan[ch].state = DMA_CHAN_STATE_STARTED; in sifive_pdma_run()
113 s->chan[ch].control &= ~CONTROL_DONE; in sifive_pdma_run()
114 s->chan[ch].control &= ~CONTROL_ERR; in sifive_pdma_run()
117 s->chan[ch].exec_config = config; in sifive_pdma_run()
118 s->chan[ch].exec_bytes = bytes; in sifive_pdma_run()
[all …]
/openbmc/qemu/hw/net/
H A Dallwinner-sun8i-emac.c27 #include "hw/qdev-properties.h"
32 #include "exec/cpu-common.h"
34 #include "hw/net/allwinner-sun8i-emac.h"
38 REG_BASIC_CTL_0 = 0x0000, /* Basic Control 0 */
39 REG_BASIC_CTL_1 = 0x0004, /* Basic Control 1 */
42 REG_TX_CTL_0 = 0x0010, /* Transmit Control 0 */
43 REG_TX_CTL_1 = 0x0014, /* Transmit Control 1 */
44 REG_TX_FLOW_CTL = 0x001C, /* Transmit Flow Control */
46 REG_RX_CTL_0 = 0x0024, /* Receive Control 0 */
47 REG_RX_CTL_1 = 0x0028, /* Receive Control 1 */
[all …]
/openbmc/linux/drivers/staging/iio/frequency/
H A Dad9834.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2010-2011 Analog Devices Inc.
36 /* Command Control Bits */
54 #define RES_MASK(bits) (BIT(bits) - 1)
57 * struct ad9834_state - driver instance specific data
60 * @control: cached control word
74 unsigned short control; member
115 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
118 return -EINVAL; in ad9834_write_frequency()
122 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dadv7183.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
38 * All standards are supported through autodetect, 8-bit, 4:2:2, ITU-R BT.656 output on P15 to P8.
69 return &container_of(ctrl->handler, struct adv7183, hdl)->sd; in to_sd()
95 return -1; in adv7183_writeregs()
112 v4l2_info(sd, "adv7183: Input control = 0x%02x\n", in adv7183_log_status()
116 v4l2_info(sd, "adv7183: Output control = 0x%02x\n", in adv7183_log_status()
118 v4l2_info(sd, "adv7183: Extended output control = 0x%02x\n", in adv7183_log_status()
132 v4l2_info(sd, "adv7183: ADI control = 0x%02x\n", in adv7183_log_status()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dwm8940.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8940.c -- WM8940 ALSA Soc Audio driver
12 * Notch filter control
109 { 0x4, 0x0010 }, /* Interface Control */
110 { 0x5, 0x0000 }, /* Companding Control */
111 { 0x6, 0x0140 }, /* Clock Control */
113 { 0x8, 0x0000 }, /* GPIO Control */
114 { 0x9, 0x0002 }, /* Auto Increment Control */
115 { 0xa, 0x0000 }, /* DAC Control */
118 { 0xe, 0x0100 }, /* ADC Control */
[all …]
H A Dml26124.c1 // SPDX-License-Identifier: GPL-2.0-only
53 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7150, 50, 0);
55 static const DECLARE_TLV_DB_SCALE(alclvl, -2250, 150, 0);
56 static const DECLARE_TLV_DB_SCALE(mingain, -1200, 600, 0);
57 static const DECLARE_TLV_DB_SCALE(maxgain, -675, 600, 0);
58 static const DECLARE_TLV_DB_SCALE(boost_vol, -1200, 75, 0);
60 static const char * const ml26124_companding[] = {"16bit PCM", "u-law",
61 "A-law"};
190 /* CLOCK control Register */
198 {0x0e, 0x00}, /* CLK Input/Output Control */
[all …]
/openbmc/qemu/hw/i2c/
H A Domap_i2c.c2 * TI OMAP on-chip I2C controller. Only "new I2C" mode supported.
25 #include "hw/qdev-properties.h"
28 #include "qemu/error-report.h"
51 uint16_t control; member
63 qemu_set_irq(s->irq, s->stat & s->mask); in omap_i2c_interrupts_update()
64 if ((s->dma >> 15) & 1) /* RDMA_EN */ in omap_i2c_interrupts_update()
65 qemu_set_irq(s->drq[0], (s->stat >> 3) & 1); /* RRDY */ in omap_i2c_interrupts_update()
66 if ((s->dma >> 7) & 1) /* XDMA_EN */ in omap_i2c_interrupts_update()
67 qemu_set_irq(s->drq[1], (s->stat >> 4) & 1); /* XRDY */ in omap_i2c_interrupts_update()
74 if (!i2c_bus_busy(s->bus)) in omap_i2c_fifo_run()
[all …]
/openbmc/qemu/target/i386/kvm/
H A Dhyperv.c2 * QEMU KVM Hyper-V support
10 * See the COPYING file in the top-level directory.
15 #include "qemu/main-loop.h"
18 #include "hyperv-proto.h"
37 CPUX86State *env = &cpu->env; in hyperv_x86_synic_update()
38 bool enable = env->msr_hv_synic_control & HV_SYNIC_ENABLE; in hyperv_x86_synic_update()
39 hwaddr msg_page_addr = (env->msr_hv_synic_msg_page & HV_SIMP_ENABLE) ? in hyperv_x86_synic_update()
40 (env->msr_hv_synic_msg_page & TARGET_PAGE_MASK) : 0; in hyperv_x86_synic_update()
41 hwaddr event_page_addr = (env->msr_hv_synic_evt_page & HV_SIEFP_ENABLE) ? in hyperv_x86_synic_update()
42 (env->msr_hv_synic_evt_page & TARGET_PAGE_MASK) : 0; in hyperv_x86_synic_update()
[all …]
/openbmc/libpldm/src/
H A Dcontrol.c8 #include <libpldm/control.h>
12 #include "control-internal.h"
38 return -EOVERFLOW; in pldm_control_reply_error()
42 rc = encode_cc_only_resp(req_hdr->instance, PLDM_FWUP, req_hdr->command, in pldm_control_reply_error()
45 return -EINVAL; in pldm_control_reply_error()
61 return -EOVERFLOW; in pldm_control_get_tid()
65 uint8_t cc = encode_get_tid_resp(hdr->instance, PLDM_SUCCESS, in pldm_control_get_tid()
74 static int pldm_control_get_version(struct pldm_control *control, in pldm_control_get_version() argument
102 if (control->types[i].pldm_type == type && in pldm_control_get_version()
103 control->types[i].versions) { in pldm_control_get_version()
[all …]
/openbmc/linux/drivers/phy/ti/
H A Dphy-omap-control.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * omap-control-phy.c - The PHY part of control module.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
20 * omap_control_pcie_pcs - set the PCS delay count
21 * @dev: the control module device
36 dev_err(dev, "%s: invalid control phy device\n", __func__); in omap_control_pcie_pcs()
40 if (control_phy->type != OMAP_CTRL_TYPE_PCIE) { in omap_control_pcie_pcs()
45 val = readl(control_phy->pcie_pcs); in omap_control_pcie_pcs()
49 writel(val, control_phy->pcie_pcs); in omap_control_pcie_pcs()
54 * omap_control_phy_power - power on/off the phy using control module reg
[all …]
/openbmc/linux/drivers/dma/dw-edma/
H A Ddw-edma-v0-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
11 #include <linux/io-64-nonatomic-lo-hi.h>
13 #include "dw-edma-core.h"
14 #include "dw-edma-v0-core.h"
15 #include "dw-edma-v0-regs.h"
16 #include "dw-edma-v0-debugfs.h"
30 return dw->chip->reg_base; in __dw_regs()
34 writel(value, &(__dw_regs(dw)->name))
37 readl(&(__dw_regs(dw)->name))
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c2 * ARM translation: M-profile NOCP special-case instructions
22 #include "translate-a32.h"
24 #include "decode-m-nocp.c.inc"
33 * lazy-stacking logic.
44 if (a->op) { in trans_VLLDM_VLSTM()
46 * T2 encoding ({D0-D31} reglist): v8.1M and up. We choose not in trans_VLLDM_VLSTM()
48 * slots that correspond to the D16-D31 registers (discarding in trans_VLLDM_VLSTM()
57 * T1 encoding ({D0-D15} reglist); undef if we have 32 Dregs. in trans_VLLDM_VLSTM()
71 * precedence over the m-nocp.decode NOCP fallback. in trans_VLLDM_VLSTM()
73 if (!s->v8m_secure) { in trans_VLLDM_VLSTM()
[all …]
/openbmc/linux/drivers/usb/serial/
H A Dspcp8x5.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2013 Johan Hovold (jhovold@gmail.com)
10 * Greg Kroah-Hartman (greg@kroah.com)
155 const struct usb_device_id *id = usb_get_serial_data(port->serial); in spcp8x5_port_probe()
160 return -ENOMEM; in spcp8x5_port_probe()
162 spin_lock_init(&priv->lock); in spcp8x5_port_probe()
163 priv->quirks = id->driver_info; in spcp8x5_port_probe()
167 port->port.drain_delay = 256; in spcp8x5_port_probe()
183 struct usb_device *dev = port->serial->dev; in spcp8x5_set_ctrl_line()
186 if (priv->quirks & SPCP825_QUIRK_NO_UART_STATUS) in spcp8x5_set_ctrl_line()
[all …]
/openbmc/linux/drivers/staging/greybus/
H A Daudio_topology.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2015-2016 Google Inc.
5 * Copyright 2015-2016 Linaro Ltd.
13 /* mixer control */
40 dev_dbg(codec->dev, "%s:Find module#%d\n", __func__, dev_id); in find_gb_module()
42 mutex_lock(&codec->lock); in find_gb_module()
43 list_for_each_entry(module, &codec->module_list, list) { in find_gb_module()
44 if (module->dev_id == dev_id) { in find_gb_module()
45 mutex_unlock(&codec->lock); in find_gb_module()
49 mutex_unlock(&codec->lock); in find_gb_module()
[all …]

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