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/openbmc/linux/drivers/clk/stm32/
Dstm32mp13_rcc.h
/openbmc/qemu/hw/net/
H A Dtulip.h13 #define CSR0_SWR BIT(0)
14 #define CSR0_BAR BIT(1)
17 #define CSR0_BLE BIT(7)
27 #define CSR0_RLE BIT(23)
28 #define CSR0_WIE BIT(24)
32 #define CSR5_TI BIT(0)
33 #define CSR5_TPS BIT(1)
34 #define CSR5_TU BIT(2)
35 #define CSR5_TJT BIT(3)
36 #define CSR5_LNP_ANC BIT(4)
[all …]
/openbmc/linux/drivers/gpu/drm/mcde/
Dmcde_dsi_regs.h
/openbmc/linux/drivers/net/ethernet/freescale/dpaa2/
Ddpkg.h
/openbmc/linux/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h
/openbmc/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
Dsun8i_a83t_mipi_csi2_reg.h
/openbmc/linux/include/linux/mfd/abx500/
Dab8500-sysctrl.h
/openbmc/linux/drivers/usb/typec/tcpm/
Dfusb302_reg.h
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h17 #ifndef BIT
18 #define BIT(nr) (1 << (nr)) macro
342 #define AR933X_PLL_CLK_CTRL_BYPASS BIT(2)
368 #define AR934X_PLL_CPU_CONFIG_PLLPWD BIT(30)
369 #define AR934X_PLL_CPU_CONFIG_UPDATING BIT(31)
381 #define AR934X_PLL_DDR_CONFIG_PLLPWD BIT(30)
382 #define AR934X_PLL_DDR_CONFIG_UPDATING BIT(31)
384 #define AR934X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2)
385 #define AR934X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3)
386 #define AR934X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4)
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg11 # Two 8-Bit devices are connected on the 16-Bit bus on the same
20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
21 # bit 7-4: 2, MPPSel1 SPI_MOSI (1=NF_IO[3])
22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4])
23 # bit 15-12: 2, MPPSel3 SPI_MISO (1=NF_IO[5])
24 # bit 19-16: 1, MPPSel4 NF_IO[6]
25 # bit 23-20: 1, MPPSel5 NF_IO[7]
26 # bit 27-24: 1, MPPSel6 SYSRST_O
27 # bit 31-28: 0, MPPSel7 GPO[7]
30 # bit 3-0: 0, MPPSel8 GPIO[8] CPU_SDA bitbanged
[all …]
H A Dkwbimage_128M16_1.cfg20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
21 # bit 7-4: 2, MPPSel1 SPI_SI (1=NF_IO[3])
22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4])
23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5])
24 # bit 19-16: 1, MPPSel4 NF_IO[6]
25 # bit 23-20: 1, MPPSel5 NF_IO[7]
26 # bit 27-24: 1, MPPSel6 SYSRST_O
27 # bit 31-28: 0, MPPSel7 GPO[7]
30 # bit 3-0: 0, MPPSel8 GPIO[8]
31 # bit 7-4: 0, MPPSel9 GPIO[9]
[all …]
/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dtimer.c40 #define TCU_TCSR_PWM_SD BIT(9)
41 #define TCU_TCSR_PWM_INITL_HIGH BIT(8)
42 #define TCU_TCSR_PWM_EN BIT(7)
51 #define TCU_TCSR_EXT_EN BIT(2)
52 #define TCU_TCSR_RTC_EN BIT(1)
53 #define TCU_TCSR_PCK_EN BIT(0)
55 #define TCU_TER_TCEN5 BIT(5)
56 #define TCU_TER_TCEN4 BIT(4)
57 #define TCU_TER_TCEN3 BIT(3)
58 #define TCU_TER_TCEN2 BIT(2)
[all …]
/openbmc/linux/include/linux/mfd/
Drohm-bd71815.h
Dlp87565.h
Dlp873x.h
/openbmc/linux/arch/mips/include/asm/mach-loongson32/
Dregs-mux.h
/openbmc/qemu/include/hw/usb/
H A Ddwc2-regs.h48 #define GOTGCTL_CHIRPEN BIT(27)
51 #define GOTGCTL_OTGVER BIT(20)
52 #define GOTGCTL_BSESVLD BIT(19)
53 #define GOTGCTL_ASESVLD BIT(18)
54 #define GOTGCTL_DBNC_SHORT BIT(17)
55 #define GOTGCTL_CONID_B BIT(16)
56 #define GOTGCTL_DBNCE_FLTR_BYPASS BIT(15)
57 #define GOTGCTL_DEVHNPEN BIT(11)
58 #define GOTGCTL_HSTSETHNPEN BIT(10)
59 #define GOTGCTL_HNPREQ BIT(9)
[all …]
/openbmc/linux/drivers/staging/vt6656/
Dmac.h
/openbmc/linux/drivers/gpu/drm/bridge/
Dsil-sii8620.h
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dreg.h
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h
/openbmc/linux/drivers/staging/sm750fb/
Dddk750_reg.h
/openbmc/linux/drivers/gpu/drm/mediatek/
Dmtk_hdmi_regs.h
/openbmc/linux/drivers/net/ethernet/altera/
Daltera_sgdmahw.h
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
Ddescs.h

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