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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Daspeed,ast2600-fmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
11 - Cédric Le Goater <clg@kaod.org>
14 This binding describes the Aspeed Static Memory Controllers (FMC and
15 SPI) of the AST2400, AST2500 and AST2600 SOCs.
18 - $ref: spi-controller.yaml#
23 - aspeed,ast2600-fmc
[all …]
/openbmc/qemu/tests/qtest/
H A Daspeed_smc-test.c28 #include "libqtest-single.h"
30 #include "aspeed-smc-utils.h"
37 fd = g_file_open_tmp("qtest.m25p80.n25q256a.XXXXXX", &data->tmp_path, NULL); in test_palmetto_bmc()
43 data->s = qtest_initf("-m 256 -machine palmetto-bmc " in test_palmetto_bmc()
44 "-drive file=%s,format=raw,if=mtd", in test_palmetto_bmc()
45 data->tmp_path); in test_palmetto_bmc()
47 /* fmc cs0 with n25q256a flash */ in test_palmetto_bmc()
48 data->flash_base = 0x20000000; in test_palmetto_bmc()
49 data->spi_base = 0x1E620000; in test_palmetto_bmc()
50 data->jedec_id = 0x20ba19; in test_palmetto_bmc()
[all …]
/openbmc/qemu/docs/system/arm/
H A Daspeed.rst1 …-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7 AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9 with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
16 - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
17 - ``quanta-q71l-bmc`` OpenBMC Quanta BMC
18 - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
19 - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
23 - ``ast2500-evb`` Aspeed AST2500 Evaluation board
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dast2600-fpga.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
6 model = "AST2600 FPGA";
7 compatible = "aspeed,ast2600-fpga", "aspeed,ast2600";
15 stdout-path = &uart5;
19 spi0 = &fmc;
25 clock-frequency = <50000000>;
28 clock-frequency = <50000000>;
34 u-boot,dm-pre-reloc;
39 clock-frequency = <400000000>;
[all …]
H A Dast2600-ampere.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "AST2600 Ampere BMC";
9 compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
17 stdout-path = &uart5;
21 spi0 = &fmc;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-x4tf.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "AST2600 ASUS X4TF";
9 compatible = "aspeed,ast2600-asus", "aspeed,ast2600";
17 stdout-path = &uart5;
21 spi0 = &fmc;
28 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
42 clock-frequency = <400000000>;
[all …]
H A Dast2600-facebook.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 …compatible = "facebook,harma-bmc", "facebook,minerva-bmc", "facebook,catalina-bmc", "aspeed,ast260…
17 stdout-path = &uart5;
21 spi0 = &fmc;
26 clock-frequency = <800000000>;
29 clock-frequency = <800000000>;
35 u-boot,dm-pre-reloc;
40 clock-frequency = <400000000>;
[all …]
H A Dast2600-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
22 spi0 = &fmc;
29 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
38 u-boot,dm-pre-reloc;
43 clock-frequency = <400000000>;
[all …]
H A Dast2600-p10bmc.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "ibm,everest-bmc", "ibm,rainier-bmc", "ibm,p10bmc", "aspeed,ast2600";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 no-map;
28 stdout-path = &uart5;
33 spi0 = &fmc;
[all …]
H A Dast2600-qcom-dc-scm-v1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "Qualcomm DC-SCM V1 BMC";
9 compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
21 spi0 = &fmc;
28 clock-frequency = <800000000>;
31 clock-frequency = <800000000>;
[all …]
H A Dast2600-pfr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 EVB";
8 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
16 stdout-path = &uart5;
23 spi0 = &fmc;
34 clock-frequency = <800000000>;
37 clock-frequency = <800000000>;
43 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-intel.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 Intel EGS server board";
8 compatible = "aspeed,ast2600-intel", "aspeed,ast2600";
16 stdout-path = &uart5;
23 spi0 = &fmc;
34 clock-frequency = <1200000000>;
37 clock-frequency = <1200000000>;
43 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-evb.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
6 model = "AST2600 EVB";
7 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
15 stdout-path = &uart5;
22 spi0 = &fmc;
33 clock-frequency = <800000000>;
36 clock-frequency = <800000000>;
42 u-boot,dm-pre-reloc;
47 clock-frequency = <400000000>;
[all …]
H A Dast2600-greatlakes.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
21 spi0 = &fmc;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
41 clock-frequency = <400000000>;
[all …]
H A Dast2600-s6q.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "quanta,s6q-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
21 spi0 = &fmc;
29 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
38 u-boot,dm-pre-reloc;
43 clock-frequency = <400000000>;
[all …]
H A Dast2600-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
24 spi0 = &fmc;
35 clock-frequency = <800000000>;
38 clock-frequency = <800000000>;
44 u-boot,dm-pre-reloc;
49 clock-frequency = <400000000>;
[all …]
H A Dast2600-dcscm.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
4 #include "ast2600-evb.dts"
7 model = "AST2600 DC-SCM";
10 &fmc {
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_fmcquad_default>;
15 timing-calibration-disabled;
16 num-cs = <1>;
20 spi-max-frequency = <12500000>;
[all …]
H A Dast2600-slt.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
12 stdout-path = &uart5;
19 spi0 = &fmc;
30 clock-frequency = <800000000>;
33 clock-frequency = <800000000>;
39 u-boot,dm-pre-reloc;
44 clock-frequency = <400000000>;
48 u-boot,dm-pre-reloc;
53 u-boot,dm-pre-reloc;
[all …]
H A Dast2600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "aspeed,ast2600";
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast2600.c4 * Copyright (c) 2016-2019, IBM Corporation.
7 * the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
19 #include "target/arm/cpu-qom.h"
96 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
138 [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */
139 [ASPEED_DEV_PCIE] = 167, /* 167 -> 168 */
146 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
150 [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
158 return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]); in aspeed_soc_ast2600_get_irq()
[all …]
H A Dfby35.c5 * file in the top-level directory.
12 #include "sysemu/block-backend.h"
14 #include "hw/qdev-clock.h"
75 object_initialize_child(OBJECT(s), "bmc", &s->bmc, "ast2600-a3"); in fby35_bmc_init()
76 soc = ASPEED_SOC(&s->bmc); in fby35_bmc_init()
78 memory_region_init(&s->bmc_memory, OBJECT(&s->bmc), "bmc-memory", in fby35_bmc_init()
80 memory_region_init_ram(&s->bmc_dram, OBJECT(&s->bmc), "bmc-dram", in fby35_bmc_init()
83 object_property_set_int(OBJECT(&s->bmc), "ram-size", FBY35_BMC_RAM_SIZE, in fby35_bmc_init()
85 object_property_set_link(OBJECT(&s->bmc), "memory", OBJECT(&s->bmc_memory), in fby35_bmc_init()
87 object_property_set_link(OBJECT(&s->bmc), "dram", OBJECT(&s->bmc_dram), in fby35_bmc_init()
[all …]
/openbmc/u-boot/arch/arm/mach-aspeed/ast2600/
H A Dscu_info.c1 // SPDX-License-Identifier: GPL-2.0+
21 SOC_ID("AST2600-A0", 0x0500030305000303),
22 SOC_ID("AST2600-A1", 0x0501030305010303),
23 SOC_ID("AST2620-A1", 0x0501020305010203),
24 SOC_ID("AST2600-A2", 0x0502030305010303),
25 SOC_ID("AST2620-A2", 0x0502020305010203),
26 SOC_ID("AST2605-A2", 0x0502010305010103),
27 SOC_ID("AST2600-A3", 0x0503030305030303),
28 SOC_ID("AST2620-A3", 0x0503020305030203),
29 SOC_ID("AST2605-A3", 0x0503010305030103),
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
10 model = "AST2600 EVB";
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
[all …]
/openbmc/qemu/hw/ssi/
H A Daspeed_smc.c31 #include "qemu/error-report.h"
37 #include "hw/qdev-properties.h"
55 #define CONF_FLASH_TYPE_SPI 0x2 /* AST2600 is SPI only */
80 (!((s)->regs[R_CE_CMD_CTRL] & (1 << (CTRL_ADDR_BYTE0_DISABLE_SHIFT + (i)))))
82 (!((s)->regs[R_CE_CMD_CTRL] & (1 << (CTRL_DATA_BYTE0_DISABLE_SHIFT + (i)))))
115 #define SEG_START_SHIFT 16 /* address bit [A29-A23] */
128 /* FMC_WDT2 Control/Status Register for Alternate Boot (AST2600) */
180 * range is 0x40000000 - 0x5FFFFFFF (AST2400)
181 * 0x80000000 - 0xBFFFFFFF (AST2500)
184 * range is 0x20000000 - 0x2FFFFFFF.
[all …]

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