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/openbmc/linux/drivers/phy/tegra/
H A DMakefile2 obj-$(CONFIG_PHY_TEGRA_XUSB) += phy-tegra-xusb.o
4 phy-tegra-xusb-y += xusb.o
5 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_124_SOC) += xusb-tegra124.o
6 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_132_SOC) += xusb-tegra124.o
7 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
8 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_186_SOC) += xusb-tegra186.o
9 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_194_SOC) += xusb-tegra186.o
10 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_234_SOC) += xusb-tegra186.o
H A DKconfig3 tristate "NVIDIA Tegra XUSB pad controller driver"
12 be called phy-tegra-xusb.
H A Dxusb.c13 #include <linux/phy/tegra/xusb.h>
22 #include "xusb.h"
53 .compatible = "nvidia,tegra124-xusb-padctl",
59 .compatible = "nvidia,tegra210-xusb-padctl",
65 .compatible = "nvidia,tegra186-xusb-padctl",
71 .compatible = "nvidia,tegra194-xusb-padctl",
77 .compatible = "nvidia,tegra234-xusb-padctl",
1258 dev_fmt("failed to setup XUSB ports: %d\n"), err); in tegra_xusb_padctl_probe()
1323 .name = "tegra-xusb-padctl",
1338 np = of_parse_phandle(dev->of_node, "nvidia,xusb-padctl", 0); in tegra_xusb_padctl_get()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dnvidia,tegra124-xusb.yaml4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
14 exposed by the Tegra XUSB pad controller.
21 const: nvidia,tegra124-xusb
25 - const: nvidia,tegra132-xusb
26 - const: nvidia,tegra124-xusb
31 - description: base and length of the XUSB FPCI registers
32 - description: base and length of the XUSB IPFS registers
47 - description: XUSB host clock
48 - description: XUSB host source clock
49 - description: XUSB Falcon source clock
[all …]
H A Dnvidia,tegra210-xusb.yaml4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
14 exposed by the Tegra XUSB pad controller.
18 const: nvidia,tegra210-xusb
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
39 - description: XUSB host clock
40 - description: XUSB host source clock
41 - description: XUSB Falcon source clock
42 - description: XUSB SuperSpeed clock
43 - description: XUSB SuperSpeed clock divider
[all …]
H A Dnvidia,tegra234-xusb.yaml4 $id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#
15 the Tegra XUSB pad controller. The xHCI controller controls up to eight
20 const: nvidia,tegra234-xusb
25 - description: XUSB FPCI registers
26 - description: XUSB bar2 registers
41 - description: XUSB host clock
42 - description: XUSB Falcon source clock
43 - description: XUSB SuperSpeed clock
44 - description: XUSB SuperSpeed source clock
45 - description: XUSB HighSpeed clock source
[all …]
H A Dnvidia,tegra194-xusb.yaml4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
14 exposed by the Tegra XUSB pad controller.
18 const: nvidia,tegra194-xusb
23 - description: base and length of the XUSB FPCI registers
37 - description: XUSB host clock
38 - description: XUSB Falcon source clock
39 - description: XUSB SuperSpeed clock
40 - description: XUSB SuperSpeed source clock
41 - description: XUSB HighSpeed clock source
42 - description: XUSB FullSpeed clock source
[all …]
H A Dnvidia,tegra186-xusb.yaml4 $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
14 exposed by the Tegra XUSB pad controller.
18 const: nvidia,tegra186-xusb
23 - description: base and length of the XUSB FPCI registers
37 - description: XUSB host clock
38 - description: XUSB Falcon source clock
39 - description: XUSB SuperSpeed clock
40 - description: XUSB SuperSpeed source clock
41 - description: XUSB HighSpeed clock source
42 - description: XUSB FullSpeed clock source
[all …]
H A Dnvidia,tegra-xudc.yaml7 title: NVIDIA Tegra XUSB device mode controller (XUDC)
30 - description: XUSB device controller registers
31 - description: XUSB device PCI Config registers
32 - description: XUSB device registers.
43 description: Must contain the XUSB device interrupt.
48 - description: Clock to enable core XUSB dev clock.
49 - description: Clock to enable XUSB super speed clock.
50 - description: Clock to enable XUSB super speed dev clock.
51 - description: Clock to enable XUSB high speed dev clock.
52 - description: Clock to enable XUSB full speed dev clock.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
7 title: NVIDIA Tegra194 XUSB pad controller
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
30 Pads will be represented as children of the top-level XUSB pad controller
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
46 - nvidia,tegra194-xusb-padctl
47 - nvidia,tegra234-xusb-padctl
61 - description: XUSB pad controller interrupt
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
7 title: NVIDIA Tegra186 XUSB pad controller
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
30 Pads will be represented as children of the top-level XUSB pad controller
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
45 const: nvidia,tegra186-xusb-padctl
54 - description: XUSB pad controller interrupt
85 subnodes, one for each of the pads exposed by the XUSB pad controller.
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
7 title: NVIDIA Tegra124 XUSB pad controller
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
30 Pads will be represented as children of the top-level XUSB pad controller
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
47 - nvidia,tegra124-xusb-padctl
50 - const: nvidia,tegra132-xusb-padctl
51 - const: nvidia,tegra124-xusb-padctl
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
7 title: NVIDIA Tegra210 XUSB pad controller
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
30 Pads will be represented as children of the top-level XUSB pad controller
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
45 const: nvidia,tegra210-xusb-padctl
56 - description: XUSB pad controller interrupt
80 subnodes, one for each of the pads exposed by the XUSB pad controller.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra124-xusb-padctl.txt1 Device tree binding for NVIDIA Tegra XUSB pad controller
4 NOTE: It turns out that this binding isn't an accurate description of the XUSB
7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
14 This document defines the device-specific binding for the XUSB pad controller.
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
31 See <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> for the list of valid values.
67 Valid functions for this group are: "snps", "xusb", "uart", "rsvd".
[all …]
/openbmc/linux/drivers/soc/tegra/fuse/
H A Dfuse-tegra30.c155 .name = "xusb-pad-calibration",
214 .cell_name = "xusb-pad-calibration",
315 .name = "xusb-pad-calibration",
369 .name = "xusb-pad-calibration-ext",
395 .cell_name = "xusb-pad-calibration",
440 .cell_name = "xusb-pad-calibration-ext",
468 .name = "xusb-pad-calibration",
474 .name = "xusb-pad-calibration-ext",
485 .cell_name = "xusb-pad-calibration",
490 .cell_name = "xusb-pad-calibration-ext",
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3740-0002.dtsi81 nvidia,function = "xusb";
86 nvidia,function = "xusb";
91 nvidia,function = "xusb";
96 nvidia,function = "xusb";
105 nvidia,function = "xusb";
110 nvidia,function = "xusb";
115 nvidia,function = "xusb";
H A Dtegra234-p3768-0000.dtsi48 nvidia,function = "xusb";
53 nvidia,function = "xusb";
58 nvidia,function = "xusb";
67 nvidia,function = "xusb";
72 nvidia,function = "xusb";
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A DMakefile11 obj-y += xusb-padctl.o
12 obj-y += ../xusb-padctl-common.o
H A Dxusb-padctl.c6 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
13 #include "../xusb-padctl-common.h"
17 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
34 "xusb",
436 "nvidia,tegra210-xusb-padctl"); in tegra_xusb_padctl_init()
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A DMakefile14 obj-y += xusb-padctl.o
15 obj-y += ../xusb-padctl-common.o
H A Dxusb-padctl.c6 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
13 #include "../xusb-padctl-common.h"
15 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
55 "xusb",
330 "nvidia,tegra124-xusb-padctl"); in tegra_xusb_padctl_init()
/openbmc/linux/drivers/usb/host/
H A Dxhci-tegra.c20 #include <linux/phy/tegra/xusb.h>
1174 dev_err(dev, "failed to enable XUSB SS partition\n"); in tegra_xusb_unpowergate_partitions()
1180 dev_err(dev, "failed to enable XUSB Host partition\n"); in tegra_xusb_unpowergate_partitions()
1189 dev_err(dev, "failed to enable XUSB SS partition\n"); in tegra_xusb_unpowergate_partitions()
1197 dev_err(dev, "failed to enable XUSB Host partition\n"); in tegra_xusb_unpowergate_partitions()
1214 dev_err(dev, "failed to disable XUSB Host partition\n"); in tegra_xusb_powergate_partitions()
1220 dev_err(dev, "failed to disable XUSB SS partition\n"); in tegra_xusb_powergate_partitions()
1227 dev_err(dev, "failed to disable XUSB Host partition\n"); in tegra_xusb_powergate_partitions()
1233 dev_err(dev, "failed to disable XUSB SS partition\n"); in tegra_xusb_powergate_partitions()
1590 np = of_parse_phandle(pdev->dev.of_node, "nvidia,xusb-padctl", 0); in tegra_xusb_probe()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra210-p2371-2180.dts41 xusb {
43 nvidia,function = "xusb";
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dxusb-padctl-common.c6 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
11 #include "xusb-padctl-common.h"
295 /* deassert XUSB padctl reset */ in tegra_xusb_process_nodes()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c207 #define XUSB(_name, _parents, _offset, \ macro
743 …XUSB("xusb_host_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, TEGRA_PERIPH_ON_APB…
744 …XUSB("xusb_host_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, TEGRA_PERIPH_ON_APB | TE…
745 …XUSB("xusb_falcon_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO…
746 …XUSB("xusb_falcon_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO_RESE…
747 …XUSB("xusb_fs_src", mux_clkm_48M_pllp_480M, CLK_SOURCE_XUSB_FS_SRC, 143, TEGRA_PERIPH_NO_RESET, te…
748 …XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M_pllc_ref, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_…
749 …XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_NO_RESET,…
753 …XUSB("xusb_dev_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | …
754 …XUSB("xusb_dev_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | TEGRA…

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