| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-helper-xaui.h | 31 * Functions for XAUI initialization, configuration,
39 * Probe a XAUI interface and determine the number of ports
40 * connected to it. The XAUI interface should still be down
51 * Bringup and enable a XAUI interface. After this call packet
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| /openbmc/u-boot/board/freescale/corenet_ds/ |
| H A D | eth_hydra.c | 12 * XGMII PHY is provided via the XAUI riser card. Since there is only one
20 * the value is based on which slot the XAUI is inserted in.
22 * The SERDES configuration is used to determine where the SGMII and XAUI cards
244 /* XAUI */ in board_ft_fman_fixup_port()
247 /* The XAUI PHY is identified by the slot */ in board_ft_fman_fixup_port()
482 * For 10G, we only support one XAUI card per Fman. If present, then we in board_eth_init()
487 * The PHY address for the XAUI card depends on which slot it's in. The in board_eth_init()
489 * that's not true. On the P4080DS, FM1 could only use XAUI in slot 5, in board_eth_init()
490 * and FM2 could only use a XAUI in slot 4. On the Hydra board, we in board_eth_init()
498 /* XAUI card is in slot 1 */ in board_eth_init()
[all …]
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| H A D | eth_superhydra.c | 12 * XGMII PHYs are provided via the XAUI riser card. The P5040 has 2 FMans
14 * the RCW, we could have upto 3 SGMII cards and 1 XAUI card at a time.
20 * the value is based on which slot the XAUI is inserted in.
22 * The SERDES configuration is used to determine where the SGMII and XAUI cards
623 * For 10G, we only support one XAUI card per Fman. If present, then we in board_eth_init()
628 * The PHY address for the XAUI card depends on which slot it's in. The in board_eth_init()
630 * that's not true. On the P4080DS, FM1 could only use XAUI in slot 5, in board_eth_init()
631 * and FM2 could only use a XAUI in slot 4. On the Hydra board, we in board_eth_init()
637 debug("FM1@TGEC1 expects XAUI in slot %u\n", lane_to_slot[lane]); in board_eth_init()
739 * For 10G, we only support one XAUI card per Fman. If present, then we in board_eth_init()
[all …]
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| /openbmc/linux/drivers/net/ethernet/sfc/ |
| H A D | enum.h | 17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
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| /openbmc/linux/drivers/net/ethernet/sfc/siena/ |
| H A D | enum.h | 17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
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| /openbmc/linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | enum.h | 17 * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
22 * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
32 * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
33 * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
34 * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
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| /openbmc/u-boot/board/freescale/b4860qds/ |
| H A D | eth_b4860qds.c | 13 * The 10Gb XGMII PHY is provided via the XAUI riser card. There is only
15 * where the SGMII and XAUI cards exist, and also which Fman MACs are routed
278 /* XAUI in Slot1 and Slot2 */ in board_eth_init()
289 /* XAUI in Slot2 */ in board_eth_init()
409 case 0x98: /* XAUI interface */ in board_ft_fman_fixup_port()
416 case 0x9e: /* XAUI interface */ in board_ft_fman_fixup_port()
423 case 0x97: /* XAUI interface */ in board_ft_fman_fixup_port()
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| /openbmc/linux/arch/mips/cavium-octeon/executive/ |
| H A D | cvmx-helper-xaui.c | 29 * Functions for XAUI initialization, configuration,
58 * Probe a XAUI interface and determine the number of ports
59 * connected to it. The XAUI interface should still be down
85 * interface to the XAUI. This allows us to use HiGig2 in __cvmx_helper_xaui_probe()
97 /* All PKO ports map to the same XAUI hardware port */ in __cvmx_helper_xaui_probe()
106 * Bringup and enable a XAUI interface. After this call packet
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| H A D | cvmx-helper-util.c | 70 return "XAUI"; in cvmx_helper_interface_mode_to_string()
194 ** applies to *GMII and XAUI ports */ in __cvmx_helper_setup_gmx()
267 * SPI and XAUI can have lots of ports but the GMX hardware in __cvmx_helper_setup_gmx()
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| H A D | Makefile | 14 cvmx-helper-board.o cvmx-helper.o cvmx-helper-xaui.o \
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | mdio-mux-mmioreg.yaml | 56 mdio@0 { // Slot 1 XAUI (FM2)
67 mdio@2 { // Slot 2 XAUI (FM1)
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | vsc7326_reg.h | 156 #define REG_XAUI_STAT_A CRA(0x1,0xa,0x20) /* XAUI status A */
157 #define REG_XAUI_STAT_B CRA(0x1,0xa,0x21) /* XAUI status B */
158 #define REG_XAUI_STAT_C CRA(0x1,0xa,0x22) /* XAUI status C */
159 #define REG_XAUI_CONF_A CRA(0x1,0xa,0x23) /* XAUI configuration A */
160 #define REG_XAUI_CONF_B CRA(0x1,0xa,0x24) /* XAUI configuration B */
161 #define REG_XAUI_CODE_GRP_CNT CRA(0x1,0xa,0x25) /* XAUI code group error count */
162 #define REG_XAUI_CONF_TEST_A CRA(0x1,0xa,0x26) /* XAUI test register A */
163 #define REG_PDERRCNT CRA(0x1,0xa,0x27) /* XAUI test register B */
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | b4860qds.dts | 90 phy_xaui_slot1: xaui-phy@slot1 {
96 phy_xaui_slot2: xaui-phy@slot2 {
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fsl_corenet_serdes.c | 225 * selected as XAUI to place the lane into reset. in __serdes_reset_rx()
235 * selected as XAUI to bring the lane out of reset. in __serdes_reset_rx()
378 * Banks 2 (XAUI) and 3 (SGMII) have different clocking in p4080_erratum_serdes8()
386 /* Determine refclock from XAUI ratio */ in p4080_erratum_serdes8()
445 * Set SRDSBnPLLCR1[PLLBW_SEL] to 0 for each bank that selects XAUI in p4080_erratum_serdes_a005()
446 * before XAUI is initialized. in p4080_erratum_serdes_a005()
713 * for each of the SerDes lanes selected as SGMII, XAUI, SRIO, in fsl_serdes_init()
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| H A D | p2041_serdes.c | 63 /* P2040[e] does not support XAUI */ in serdes_get_prtcl()
79 /* P2040[e] does not support XAUI */ in is_serdes_prtcl_valid()
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| /openbmc/u-boot/board/freescale/p2041rdb/ |
| H A D | eth.c | 111 /* XAUI */ in board_ft_fman_fixup_port()
114 /* The XAUI PHY is identified by the slot */ in board_ft_fman_fixup_port()
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| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-381-netgear-gs110emx.dts | 213 phy-mode = "xaui";
221 phy-mode = "xaui";
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| /openbmc/u-boot/include/ |
| H A D | phy_interface.h | 54 [PHY_INTERFACE_MODE_XAUI] = "xaui",
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | transmit-amplitude.yaml | 46 - xaui
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-net-phydev | 44 xaui, 10gbase-kr, unknown
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| /openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| H A D | high_speed_env_spec.c | 53 { 4, 0, 0, 0 }, /* XAUI */
59 * (i.e a single XAUI is counted as 1 unit)
83 { NA, NA, NA, 0x8, 0x9, 0x8, 0x4 }, /* XAUI */
109 "XAUI",
867 * If XAUI is in use - serdes_lane_in_use_count has to be = 0; in hws_serdes_xaui_topology_verify()
872 printf("%s: Warning: wrong number of lanes is set to XAUI - %d\n", in hws_serdes_xaui_topology_verify()
874 printf("%s: XAUI has to be defined on 4 lanes\n", __func__); in hws_serdes_xaui_topology_verify()
1348 case XAUI: in serdes_type_and_speed_to_speed_seq()
1887 case XAUI: in serdes_power_up_ctrl()
1989 * Check that number of used lanes for XAUI and RXAUI in hws_update_serdes_phy_selectors()
[all …]
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| /openbmc/u-boot/drivers/net/phy/ |
| H A D | teranetics.c | 52 * Wait for the XAUI-SERDES lanes to align first. Under normal in tn2020_startup()
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | aq100x.c | 342 * Verify XAUI settings, but let prep succeed no matter what. in t3_aq100x_phy_prep()
349 "PHY%d: incorrect XAUI settings (0x%x, 0x%x).\n", in t3_aq100x_phy_prep()
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| /openbmc/linux/arch/arm/boot/dts/nxp/vf/ |
| H A D | vf610-zii-dev-rev-c.dts | 83 phy-mode = "xaui";
180 phy-mode = "xaui";
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| /openbmc/u-boot/board/freescale/t4qds/ |
| H A D | README | 15 - XAUI
48 SGMII and XAUI support via SERDES block (see above).
|