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/openbmc/linux/kernel/
H A Dcpu.c1 /* CPU control.
17 #include <linux/cpu.h>
36 #include <linux/percpu-rwsem.h>
48 * struct cpuhp_cpu_state - Per cpu hotplug state storage
49 * @state: The current cpu state
51 * @fail: Current CPU hotplug callback state
55 * @single: Single callback invocation
56 * @bringup: Single callback bringup or teardown selector
57 * @cpu: CPU number
58 * @node: Remote CPU node; for multi-instance, do a
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/openbmc/linux/include/linux/
H A Dcpu_pm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * When a CPU goes to a low power state that turns off power to the CPU's
25 * The notifications are split into two classes: CPU notifications and CPU
28 * CPU notifications apply to a single CPU and must be called on the affected
29 * CPU. They are used to save per-cpu context for affected blocks.
31 * CPU cluster notifications apply to all CPUs in a single power domain. They
41 /* A single cpu is entering a low power state */
44 /* A single cpu failed to enter a low power state */
47 /* A single cpu is exiting a low power state */
50 /* A cpu power domain is entering a low power state */
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/openbmc/linux/Documentation/tools/rtla/
H A Drtla-hwnoise.rst1 .. SPDX-License-Identifier: GPL-2.0
4 rtla-hwnoise
6 ------------------------------------------
7 Detect and quantify hardware-related noise
8 ------------------------------------------
22 of threads as a consequence, only non-maskable interrupts and hardware-related
38 In the example below, the **rtla hwnoise** tool is set to run on CPUs *1-7*
39 on a system with 8 cores/16 threads with hyper-threading enabled.
45 # rtla hwnoise -c 1-7 -T 1 -d 10m -q
46 Hardware-related Noise
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/openbmc/linux/Documentation/driver-api/
H A Dedac.rst5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
32 A physical connector on the motherboard that accepts a single memory
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
45 same branch can be used in single mode or in lockstep mode. When
50 of correcting more errors than on single mode.
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
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/openbmc/qemu/accel/tcg/
H A Dtcg-accel-ops-rr.c2 * QEMU TCG Single Threaded vCPUs implementation
4 * Copyright (c) 2003-2008 Fabrice Bellard
30 #include "sysemu/cpu-timers.h"
31 #include "qemu/main-loop.h"
33 #include "qemu/guest-random.h"
34 #include "exec/exec-all.h"
36 #include "tcg-accel-ops.h"
37 #include "tcg-accel-ops-rr.h"
38 #include "tcg-accel-ops-icount.h"
43 CPUState *cpu; in rr_kick_vcpu_thread() local
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/openbmc/linux/Documentation/arch/x86/
H A Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
28 the past a socket always contained a single package (see below), but with the
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - cpuinfo_x86.x86_max_cores:
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H A Dtlb.rst1 .. SPDX-License-Identifier: GPL-2.0
10 1. Flush the entire TLB with a two-instruction sequence. This is
14 2. Use the invlpg instruction to invalidate a single page at a
32 4. The microarchitecture. The TLB has become a multi-level
34 expensive relative to single-page flushes.
53 Despite the fact that a single individual flush on x86 is
67 perf stat -e
68 cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/,
69 cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/,
70 cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/,
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/openbmc/qemu/docs/system/
H A Dgdb.rst4 ---------
6 QEMU supports working with gdb via gdb's remote-connection facility
8 way that you might with a low-level debug facility like JTAG
13 In order to use gdb, launch QEMU with the ``-s`` and ``-S`` options.
14 The ``-s`` option will make QEMU listen for an incoming connection
15 from gdb on TCP port 1234, and ``-S`` will make QEMU not start the
18 connection, use the ``-gdb dev`` option instead of ``-s``. See
21 .. parsed-literal::
23 |qemu_system| -s -S -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
42 1. Use ``info reg`` to display all the CPU registers.
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/openbmc/linux/arch/sparc/kernel/
H A Dsun4d_smp.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/cpu.h>
73 /* Unblock the master CPU _only_ when the scheduler state in sun4d_cpu_pre_online()
74 * of all secondary CPUs will be up-to-date, so after in sun4d_cpu_pre_online()
79 local_ops->cache_all(); in sun4d_cpu_pre_online()
80 local_ops->tlb_all(); in sun4d_cpu_pre_online()
85 while (current_set[cpuid]->cpu != cpuid) in sun4d_cpu_pre_online()
98 current->active_mm = &init_mm; in sun4d_cpu_pre_online()
100 local_ops->cache_all(); in sun4d_cpu_pre_online()
101 local_ops->tlb_all(); in sun4d_cpu_pre_online()
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H A Dleon_smp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* leon_smp.c: Sparc-Leon SMP support.
27 #include <linux/cpu.h>
81 * go-ahead by setting the smp_commenced_mask and will wait without in leon_cpu_pre_online()
87 local_ops->cache_all(); in leon_cpu_pre_online()
88 local_ops->tlb_all(); in leon_cpu_pre_online()
96 current->active_mm = &init_mm; in leon_cpu_pre_online()
114 …printk(KERN_INFO "Note: SMP with snooping only works on 4k cache, found %dk(0x%x) on cpu %d, disab… in leon_configure_cache_smp()
122 … printk(KERN_INFO "Note: You have to enable snooping in the vhdl model cpu %d, disabling caches\n", in leon_configure_cache_smp()
128 local_ops->cache_all(); in leon_configure_cache_smp()
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/openbmc/linux/fs/squashfs/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SquashFS 4.0 - Squashed file system support"
7 Read-Only File System). Squashfs is a highly compressed read-only
16 Squashfs is intended for general read-only filesystem use, for
53 on the single buffer.
88 decompression. Each one exhibits various trade-offs between
89 decompression performance and CPU and memory usage.
91 If in doubt, select "Single threaded compression"
94 bool "Single threaded compression"
97 Traditionally Squashfs has used single-threaded decompression.
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/openbmc/linux/tools/memory-model/Documentation/
H A Dsimple.txt2 memory-ordering lives simple, as is necessary for those whose domain
3 is complex. After all, there are bugs other than memory-ordering bugs,
4 and the time spent gaining memory-ordering knowledge is not available
5 for gaining domain knowledge. Furthermore Linux-kernel memory model
15 of MMIO-based device drivers will often need to use mb(), rmb(), and
22 Single-threaded code
25 In single-threaded code, there is no reordering, at least assuming
27 it is generally a mistake to assume your code will only run in a single
33 your code really is executed within a single thread that does not access
38 this lock at a given time, your code will be executed single-threaded.
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dapple,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
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/openbmc/u-boot/arch/m68k/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0+
3 head-y := arch/m68k/cpu/$(CPU)/start.o
5 libs-y += arch/m68k/cpu/$(CPU)/
6 libs-y += arch/m68k/lib/
8 cpuflags-$(CONFIG_M5208) := -mcpu=5208
9 cpuflags-$(CONFIG_M5235) := -mcpu=5235 -fPIC
10 cpuflags-$(CONFIG_M52277) := -mcpu=52277 -fPIC
11 cpuflags-$(CONFIG_M5249) := -mcpu=5249
12 cpuflags-$(CONFIG_M5253) := -mcpu=5253
13 cpuflags-$(CONFIG_M5271) := -mcpu=5271
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/openbmc/linux/Documentation/networking/
H A Dscaling.rst1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
35 Multi-queue distribution can also be used for traffic prioritization, but
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/openbmc/linux/kernel/debug/kdb/
H A Dkdb_debugger.c40 kdb_current_task = kgdb_info[ks->cpu].task; in kdb_common_init_state()
41 kdb_current_regs = kgdb_info[ks->cpu].debuggerinfo; in kdb_common_init_state()
47 kdb_initial_cpu = -1; in kdb_common_deinit_state()
57 unsigned long addr = kgdb_arch_pc(ks->ex_vector, ks->linux_regs); in kdb_stub()
66 addr = instruction_pointer(ks->linux_regs); in kdb_stub()
68 ks->pass_exception = 0; in kdb_stub()
72 if (ks->err_code == KDB_REASON_SYSTEM_NMI && ks->signo == SIGTRAP) in kdb_stub()
79 if ((bp->bp_enabled) && (bp->bp_addr == addr)) { in kdb_stub()
82 if (addr != instruction_pointer(ks->linux_regs)) in kdb_stub()
83 kgdb_arch_set_pc(ks->linux_regs, addr); in kdb_stub()
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/openbmc/linux/kernel/irq/
H A Dipi.c1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
19 * Allocate a virq that can be used to send IPI to any CPU in dest mask.
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
48 * If the underlying implementation uses a single HW irq on in irq_reserve_ipi()
49 * all cpus then we only need a single Linux irq number for in irq_reserve_ipi()
59 * The IPI requires a separate HW irq on each CPU. We require in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
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/openbmc/linux/include/linux/sched/
H A Dsd_flags.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sched-domains (multiprocessor balancing) flag declarations.
29 * certain level (e.g. domain starts spanning CPUs outside of the base CPU's
78 * Consider waking task on waking CPU.
85 * Domain members have different CPU capacities
89 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups.
94 * Domain members have different CPU capacities spanning all unique CPU
98 * all available CPU capacities are visible
99 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups.
104 * Domain members share CPU capacity (i.e. SMT)
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/openbmc/linux/arch/mips/boot/dts/ralink/
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
12 cpu@0 {
14 device_type = "cpu";
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
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/openbmc/linux/arch/x86/events/intel/
H A Dpt.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2013-2014, Intel Corporation.
8 * http://software.intel.com/en-us/intel-isa-extensions
15 * Single-entry ToPA: when this close to region boundary, switch
54 * struct pt_buffer - buffer configuration; one buffer per task_struct or
55 * cpu, depending on perf event configuration
67 * @single: use Single Range Output instead of ToPA
85 bool single; member
95 * struct pt_filter - IP range filter configuration
98 * @config: 4-bit field in RTIT_CTL
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/openbmc/phosphor-dbus-interfaces/yaml/com/intel/Protocol/PECI/
H A DRaw.interface.yaml2 Implement to provide D-Bus raw PECI access to the CPU.
5 - name: Send
7 Send raw PECI command(s) to the CPU
9 - name: device
13 - name: commands
17 bytes for a single PECI command. The larger array allows
18 sending multiple PECI commands in a single transaction.
20 - name: results
24 bytes for a single PECI response corresponding to the command in
/openbmc/linux/drivers/net/wireguard/
H A Dqueueing.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
67 #define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))
68 #define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
73 return real_protocol && skb->protocol == real_protocol; in wg_check_packet_protocol()
78 u8 l4_hash = skb->l4_hash; in wg_reset_packet()
79 u8 sw_hash = skb->sw_hash; in wg_reset_packet()
80 u32 hash = skb->hash; in wg_reset_packet()
82 memset(&skb->headers, 0, sizeof(skb->headers)); in wg_reset_packet()
84 skb->l4_hash = l4_hash; in wg_reset_packet()
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/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-topology.txt2 CPU topology binding description
6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
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/openbmc/linux/Documentation/core-api/
H A Ddma-attributes.rst6 defined in linux/dma-mapping.h.
9 ----------------------
19 ----------------------
29 --------------------------
33 such mapping is non-trivial task and consumes very limited resources
47 ----------------------
49 By default dma_map_{single,page,sg} functions family transfer a given
50 buffer from CPU domain to device domain. Some advanced use cases might
53 performed by calling dma_map_{single,page,sg} function more than once
55 the buffer sharing. The first call transfers a buffer from 'CPU' domain
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/openbmc/u-boot/arch/arm/dts/
H A Domap34xx.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/media/omap3-isp.h>
17 cpu: cpu@0 { label
18 /* OMAP343x/OMAP35xx variants OPP1-5 */
19 operating-points = <
27 clock-latency = <300000>; /* From legacy driver */
33 compatible = "ti,omap3-padconf", "pinctrl-single";
35 #address-cells = <1>;
36 #size-cells = <0>;
37 #pinctrl-cells = <1>;
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