19ea34af7SStefan Roese// SPDX-License-Identifier: GPL-2.0 29ea34af7SStefan Roese 37d4ad2e7SHarvey Hunt/ { 47d4ad2e7SHarvey Hunt #address-cells = <1>; 57d4ad2e7SHarvey Hunt #size-cells = <1>; 67d4ad2e7SHarvey Hunt compatible = "ralink,mt7628a-soc"; 77d4ad2e7SHarvey Hunt 87d4ad2e7SHarvey Hunt cpus { 97d4ad2e7SHarvey Hunt #address-cells = <1>; 107d4ad2e7SHarvey Hunt #size-cells = <0>; 117d4ad2e7SHarvey Hunt 127d4ad2e7SHarvey Hunt cpu@0 { 137d4ad2e7SHarvey Hunt compatible = "mti,mips24KEc"; 147d4ad2e7SHarvey Hunt device_type = "cpu"; 157d4ad2e7SHarvey Hunt reg = <0>; 167d4ad2e7SHarvey Hunt }; 177d4ad2e7SHarvey Hunt }; 187d4ad2e7SHarvey Hunt 197d4ad2e7SHarvey Hunt resetc: reset-controller { 207d4ad2e7SHarvey Hunt compatible = "ralink,rt2880-reset"; 217d4ad2e7SHarvey Hunt #reset-cells = <1>; 227d4ad2e7SHarvey Hunt }; 237d4ad2e7SHarvey Hunt 247d4ad2e7SHarvey Hunt cpuintc: interrupt-controller { 257d4ad2e7SHarvey Hunt #address-cells = <0>; 267d4ad2e7SHarvey Hunt #interrupt-cells = <1>; 277d4ad2e7SHarvey Hunt interrupt-controller; 287d4ad2e7SHarvey Hunt compatible = "mti,cpu-interrupt-controller"; 297d4ad2e7SHarvey Hunt }; 307d4ad2e7SHarvey Hunt 317d4ad2e7SHarvey Hunt palmbus@10000000 { 327d4ad2e7SHarvey Hunt compatible = "palmbus"; 337d4ad2e7SHarvey Hunt reg = <0x10000000 0x200000>; 347d4ad2e7SHarvey Hunt ranges = <0x0 0x10000000 0x1FFFFF>; 357d4ad2e7SHarvey Hunt 367d4ad2e7SHarvey Hunt #address-cells = <1>; 377d4ad2e7SHarvey Hunt #size-cells = <1>; 387d4ad2e7SHarvey Hunt 397d4ad2e7SHarvey Hunt sysc: system-controller@0 { 407d4ad2e7SHarvey Hunt compatible = "ralink,mt7620a-sysc", "syscon"; 41380f072cSStefan Roese reg = <0x0 0x60>; 42380f072cSStefan Roese }; 43380f072cSStefan Roese 44380f072cSStefan Roese pinmux: pinmux@60 { 45380f072cSStefan Roese compatible = "pinctrl-single"; 46380f072cSStefan Roese reg = <0x60 0x8>; 47380f072cSStefan Roese #address-cells = <1>; 48380f072cSStefan Roese #size-cells = <0>; 49380f072cSStefan Roese #pinctrl-cells = <2>; 50380f072cSStefan Roese pinctrl-single,bit-per-mux; 51380f072cSStefan Roese pinctrl-single,register-width = <32>; 52380f072cSStefan Roese pinctrl-single,function-mask = <0x1>; 53380f072cSStefan Roese 54*5cad8323STony Lindgren pinmux_gpio_gpio: gpio-gpio-pins { 55380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x3>; 56380f072cSStefan Roese }; 57380f072cSStefan Roese 58*5cad8323STony Lindgren pinmux_spi_cs1_cs: spi-cs1-cs-pins { 59380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x30>; 60380f072cSStefan Roese }; 61380f072cSStefan Roese 62*5cad8323STony Lindgren pinmux_i2s_gpio: i2s-gpio-pins { 63380f072cSStefan Roese pinctrl-single,bits = <0x0 0x40 0xc0>; 64380f072cSStefan Roese }; 65380f072cSStefan Roese 66*5cad8323STony Lindgren pinmux_uart0_uart: uart0-uart0-pins { 67380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x300>; 68380f072cSStefan Roese }; 69380f072cSStefan Roese 70*5cad8323STony Lindgren pinmux_sdmode_sdxc: sdmode-sdxc-pins { 71380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0xc00>; 72380f072cSStefan Roese }; 73380f072cSStefan Roese 74*5cad8323STony Lindgren pinmux_sdmode_gpio: sdmode-gpio-pins { 75380f072cSStefan Roese pinctrl-single,bits = <0x0 0x400 0xc00>; 76380f072cSStefan Roese }; 77380f072cSStefan Roese 78*5cad8323STony Lindgren pinmux_spi_spi: spi-spi-pins { 79380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x1000>; 80380f072cSStefan Roese }; 81380f072cSStefan Roese 82*5cad8323STony Lindgren pinmux_refclk_gpio: refclk-gpio-pins { 83380f072cSStefan Roese pinctrl-single,bits = <0x0 0x40000 0x40000>; 84380f072cSStefan Roese }; 85380f072cSStefan Roese 86*5cad8323STony Lindgren pinmux_i2c_i2c: i2c-i2c-pins { 87380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x300000>; 88380f072cSStefan Roese }; 89380f072cSStefan Roese 90*5cad8323STony Lindgren pinmux_uart1_uart: uart1-uart1-pins { 91380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x3000000>; 92380f072cSStefan Roese }; 93380f072cSStefan Roese 94*5cad8323STony Lindgren pinmux_uart2_uart: uart2-uart-pins { 95380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0xc000000>; 96380f072cSStefan Roese }; 97380f072cSStefan Roese 98*5cad8323STony Lindgren pinmux_pwm0_pwm: pwm0-pwm-pins { 99380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0x30000000>; 100380f072cSStefan Roese }; 101380f072cSStefan Roese 102*5cad8323STony Lindgren pinmux_pwm0_gpio: pwm0-gpio-pins { 103380f072cSStefan Roese pinctrl-single,bits = <0x0 0x10000000 104380f072cSStefan Roese 0x30000000>; 105380f072cSStefan Roese }; 106380f072cSStefan Roese 107*5cad8323STony Lindgren pinmux_pwm1_pwm: pwm1-pwm-pins { 108380f072cSStefan Roese pinctrl-single,bits = <0x0 0x0 0xc0000000>; 109380f072cSStefan Roese }; 110380f072cSStefan Roese 111*5cad8323STony Lindgren pinmux_pwm1_gpio: pwm1-gpio-pins { 112380f072cSStefan Roese pinctrl-single,bits = <0x0 0x40000000 113380f072cSStefan Roese 0xc0000000>; 114380f072cSStefan Roese }; 115380f072cSStefan Roese 116*5cad8323STony Lindgren pinmux_p0led_an_gpio: p0led-an-gpio-pins { 117380f072cSStefan Roese pinctrl-single,bits = <0x4 0x4 0xc>; 118380f072cSStefan Roese }; 119380f072cSStefan Roese 120*5cad8323STony Lindgren pinmux_p1led_an_gpio: p1led-an-gpio-pins { 121380f072cSStefan Roese pinctrl-single,bits = <0x4 0x10 0x30>; 122380f072cSStefan Roese }; 123380f072cSStefan Roese 124*5cad8323STony Lindgren pinmux_p2led_an_gpio: p2led-an-gpio-pins { 125380f072cSStefan Roese pinctrl-single,bits = <0x4 0x40 0xc0>; 126380f072cSStefan Roese }; 127380f072cSStefan Roese 128*5cad8323STony Lindgren pinmux_p3led_an_gpio: p3led-an-gpio-pins { 129380f072cSStefan Roese pinctrl-single,bits = <0x4 0x100 0x300>; 130380f072cSStefan Roese }; 131380f072cSStefan Roese 132*5cad8323STony Lindgren pinmux_p4led_an_gpio: p4led-an-gpio-pins { 133380f072cSStefan Roese pinctrl-single,bits = <0x4 0x400 0xc00>; 134380f072cSStefan Roese }; 1357d4ad2e7SHarvey Hunt }; 1367d4ad2e7SHarvey Hunt 1371bca2eacSStefan Roese watchdog: watchdog@100 { 1381bca2eacSStefan Roese compatible = "mediatek,mt7621-wdt"; 1391bca2eacSStefan Roese reg = <0x100 0x30>; 1401bca2eacSStefan Roese 1411bca2eacSStefan Roese resets = <&resetc 8>; 1421bca2eacSStefan Roese reset-names = "wdt"; 1431bca2eacSStefan Roese 1441bca2eacSStefan Roese interrupt-parent = <&intc>; 1451bca2eacSStefan Roese interrupts = <24>; 1461bca2eacSStefan Roese 1471bca2eacSStefan Roese status = "disabled"; 1481bca2eacSStefan Roese }; 1491bca2eacSStefan Roese 1507d4ad2e7SHarvey Hunt intc: interrupt-controller@200 { 1517d4ad2e7SHarvey Hunt compatible = "ralink,rt2880-intc"; 1527d4ad2e7SHarvey Hunt reg = <0x200 0x100>; 1537d4ad2e7SHarvey Hunt 1547d4ad2e7SHarvey Hunt interrupt-controller; 1557d4ad2e7SHarvey Hunt #interrupt-cells = <1>; 1567d4ad2e7SHarvey Hunt 1577d4ad2e7SHarvey Hunt resets = <&resetc 9>; 1587d4ad2e7SHarvey Hunt reset-names = "intc"; 1597d4ad2e7SHarvey Hunt 1607d4ad2e7SHarvey Hunt interrupt-parent = <&cpuintc>; 1617d4ad2e7SHarvey Hunt interrupts = <2>; 1627d4ad2e7SHarvey Hunt 1637d4ad2e7SHarvey Hunt ralink,intc-registers = <0x9c 0xa0 1647d4ad2e7SHarvey Hunt 0x6c 0xa4 1657d4ad2e7SHarvey Hunt 0x80 0x78>; 1667d4ad2e7SHarvey Hunt }; 1677d4ad2e7SHarvey Hunt 1687d4ad2e7SHarvey Hunt memory-controller@300 { 1697d4ad2e7SHarvey Hunt compatible = "ralink,mt7620a-memc"; 1707d4ad2e7SHarvey Hunt reg = <0x300 0x100>; 1717d4ad2e7SHarvey Hunt }; 1727d4ad2e7SHarvey Hunt 173e456a3bdSStefan Roese gpio: gpio@600 { 174e456a3bdSStefan Roese compatible = "mediatek,mt7621-gpio"; 175e456a3bdSStefan Roese reg = <0x600 0x100>; 176e456a3bdSStefan Roese 177e456a3bdSStefan Roese gpio-controller; 178e456a3bdSStefan Roese interrupt-controller; 179e456a3bdSStefan Roese #gpio-cells = <2>; 180e456a3bdSStefan Roese #interrupt-cells = <2>; 181e456a3bdSStefan Roese 182e456a3bdSStefan Roese interrupt-parent = <&intc>; 183e456a3bdSStefan Roese interrupts = <6>; 184e456a3bdSStefan Roese }; 185e456a3bdSStefan Roese 1864e41b745SStefan Roese spi: spi@b00 { 1874e41b745SStefan Roese compatible = "ralink,mt7621-spi"; 1884e41b745SStefan Roese reg = <0xb00 0x100>; 1894e41b745SStefan Roese 1904e41b745SStefan Roese pinctrl-names = "default"; 1914e41b745SStefan Roese pinctrl-0 = <&pinmux_spi_spi>; 1924e41b745SStefan Roese 1934e41b745SStefan Roese resets = <&resetc 18>; 1944e41b745SStefan Roese reset-names = "spi"; 1954e41b745SStefan Roese 1964e41b745SStefan Roese #address-cells = <1>; 1974e41b745SStefan Roese #size-cells = <0>; 1984e41b745SStefan Roese 1994e41b745SStefan Roese status = "disabled"; 2004e41b745SStefan Roese }; 2014e41b745SStefan Roese 202cd5f9e4fSStefan Roese i2c: i2c@900 { 203cd5f9e4fSStefan Roese compatible = "mediatek,mt7621-i2c"; 204cd5f9e4fSStefan Roese reg = <0x900 0x100>; 205cd5f9e4fSStefan Roese 206cd5f9e4fSStefan Roese pinctrl-names = "default"; 207cd5f9e4fSStefan Roese pinctrl-0 = <&pinmux_i2c_i2c>; 208cd5f9e4fSStefan Roese 209cd5f9e4fSStefan Roese resets = <&resetc 16>; 210cd5f9e4fSStefan Roese reset-names = "i2c"; 211cd5f9e4fSStefan Roese 212cd5f9e4fSStefan Roese #address-cells = <1>; 213cd5f9e4fSStefan Roese #size-cells = <0>; 214cd5f9e4fSStefan Roese 215cd5f9e4fSStefan Roese status = "disabled"; 216cd5f9e4fSStefan Roese }; 217cd5f9e4fSStefan Roese 2187d4ad2e7SHarvey Hunt uart0: uartlite@c00 { 2197d4ad2e7SHarvey Hunt compatible = "ns16550a"; 2207d4ad2e7SHarvey Hunt reg = <0xc00 0x100>; 2217d4ad2e7SHarvey Hunt 2226394de39SStefan Roese pinctrl-names = "default"; 2236394de39SStefan Roese pinctrl-0 = <&pinmux_uart0_uart>; 2246394de39SStefan Roese 2257d4ad2e7SHarvey Hunt resets = <&resetc 12>; 2267d4ad2e7SHarvey Hunt reset-names = "uart0"; 2277d4ad2e7SHarvey Hunt 2287d4ad2e7SHarvey Hunt interrupt-parent = <&intc>; 2297d4ad2e7SHarvey Hunt interrupts = <20>; 2307d4ad2e7SHarvey Hunt 2317d4ad2e7SHarvey Hunt reg-shift = <2>; 2327d4ad2e7SHarvey Hunt }; 2337d4ad2e7SHarvey Hunt 2347d4ad2e7SHarvey Hunt uart1: uart1@d00 { 2357d4ad2e7SHarvey Hunt compatible = "ns16550a"; 2367d4ad2e7SHarvey Hunt reg = <0xd00 0x100>; 2377d4ad2e7SHarvey Hunt 2386394de39SStefan Roese pinctrl-names = "default"; 2396394de39SStefan Roese pinctrl-0 = <&pinmux_uart1_uart>; 2406394de39SStefan Roese 2417d4ad2e7SHarvey Hunt resets = <&resetc 19>; 2427d4ad2e7SHarvey Hunt reset-names = "uart1"; 2437d4ad2e7SHarvey Hunt 2447d4ad2e7SHarvey Hunt interrupt-parent = <&intc>; 2457d4ad2e7SHarvey Hunt interrupts = <21>; 2467d4ad2e7SHarvey Hunt 2477d4ad2e7SHarvey Hunt reg-shift = <2>; 2487d4ad2e7SHarvey Hunt }; 2497d4ad2e7SHarvey Hunt 2507d4ad2e7SHarvey Hunt uart2: uart2@e00 { 2517d4ad2e7SHarvey Hunt compatible = "ns16550a"; 2527d4ad2e7SHarvey Hunt reg = <0xe00 0x100>; 2537d4ad2e7SHarvey Hunt 2546394de39SStefan Roese pinctrl-names = "default"; 2556394de39SStefan Roese pinctrl-0 = <&pinmux_uart2_uart>; 2566394de39SStefan Roese 2577d4ad2e7SHarvey Hunt resets = <&resetc 20>; 2587d4ad2e7SHarvey Hunt reset-names = "uart2"; 2597d4ad2e7SHarvey Hunt 2607d4ad2e7SHarvey Hunt interrupt-parent = <&intc>; 2617d4ad2e7SHarvey Hunt interrupts = <22>; 2627d4ad2e7SHarvey Hunt 2637d4ad2e7SHarvey Hunt reg-shift = <2>; 2647d4ad2e7SHarvey Hunt }; 2657d4ad2e7SHarvey Hunt }; 2667d4ad2e7SHarvey Hunt 2677d4ad2e7SHarvey Hunt usb_phy: usb-phy@10120000 { 2687d4ad2e7SHarvey Hunt compatible = "mediatek,mt7628-usbphy"; 2697d4ad2e7SHarvey Hunt reg = <0x10120000 0x1000>; 2707d4ad2e7SHarvey Hunt 2717d4ad2e7SHarvey Hunt #phy-cells = <0>; 2727d4ad2e7SHarvey Hunt 2737d4ad2e7SHarvey Hunt ralink,sysctl = <&sysc>; 2747d4ad2e7SHarvey Hunt resets = <&resetc 22 &resetc 25>; 2757d4ad2e7SHarvey Hunt reset-names = "host", "device"; 2767d4ad2e7SHarvey Hunt }; 2777d4ad2e7SHarvey Hunt 2783180b64aSSerge Semin usb@101c0000 { 2797d4ad2e7SHarvey Hunt compatible = "generic-ehci"; 2807d4ad2e7SHarvey Hunt reg = <0x101c0000 0x1000>; 2817d4ad2e7SHarvey Hunt 2827d4ad2e7SHarvey Hunt phys = <&usb_phy>; 2837d4ad2e7SHarvey Hunt phy-names = "usb"; 2847d4ad2e7SHarvey Hunt 2857d4ad2e7SHarvey Hunt interrupt-parent = <&intc>; 2867d4ad2e7SHarvey Hunt interrupts = <18>; 2877d4ad2e7SHarvey Hunt }; 288ff68d0daSReto Schneider 289ff68d0daSReto Schneider wmac: wmac@10300000 { 290ff68d0daSReto Schneider compatible = "mediatek,mt7628-wmac"; 291ff68d0daSReto Schneider reg = <0x10300000 0x100000>; 292ff68d0daSReto Schneider 293ff68d0daSReto Schneider interrupt-parent = <&cpuintc>; 294ff68d0daSReto Schneider interrupts = <6>; 295ff68d0daSReto Schneider 296ff68d0daSReto Schneider status = "disabled"; 297ff68d0daSReto Schneider }; 2987d4ad2e7SHarvey Hunt}; 299