/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/libsmi/libsmi/ |
H A D | 0001-Fix-build-failure-with-gcc-15.patch | 26 smi-data.c: In function 'loadModule': 27 smi-data.c:4658:9: error: too many arguments to function 'smiparse'; expected 0, have 1 30 smi-data.c:42:12: note: declared here 33 parser-smi.c:1515:5: error: conflicting types for 'smiparse'; have 'int(struct Parser *)' 36 In file included from parser-smi.y:37: 37 parser-smi.h:27:12: note: previous declaration of 'smiparse' with type 'int(void)' 40 parser-smi.c:63:25: error: conflicting types for 'smiparse'; have 'int(struct Parser *)' 43 parser-smi.c:3207:1: note: in expansion of macro 'yyparse' 46 parser-smi.h:27:12: note: previous declaration of 'smiparse' with type 'int(void)' 70 make[2]: *** [Makefile:573: smi-data.lo] Error 1 [all …]
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H A D | smi.conf | 2 # smi.conf - Global/User SMI configuration file. (EXAMPLE) 9 # @(#) $Id: smi.conf-example 1134 2001-06-11 09:59:13Z strauss $ 31 load SNMPv2-SMI
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H A D | libsmi-fix-the-test-dump-files.patch | 105 + import SNMPv2-SMI (MODULE-IDENTITY, OBJECT-TYPE, Counter32, 152 + import SNMPv2-SMI (Counter32, Integer32, Counter64, OBJECT-TYPE, 191 + import SNMPv2-SMI (MODULE-IDENTITY, OBJECT-TYPE, 266 + import SNMPv2-SMI (MODULE-IDENTITY, OBJECT-TYPE,
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/openbmc/u-boot/doc/device-tree-bindings/misc/ |
H A D | intel-lpc.txt | 9 - intel,alt-gp-smi-enable : Enable SMI sources. This cell is written to the 18 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) 56 * 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is 62 /* Enable EC SMI source */ 63 intel,alt-gp-smi-enable = <0x0100>;
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/openbmc/openbmc-test-automation/lib/snmp/ |
H A D | redfish_snmp_utils.robot | 221 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 222 …# SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 369 SNMPv2-SMI::enterprises.49871.1.0.1.2 =… 223 # UInt64: 1397718405502468474 SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: 3 224 # SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING: "xxx.xx.xx Failure" 245 …Should Be Equal ${snmp_trap}[1] SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1… 246 Should Match Regexp ${snmp_trap}[2] SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: \[0-9]* 247 …Should Match Regexp ${snmp_trap}[3] SNMPv2-SMI::enterprises.49871.1.0.1.2 = Opaque: UInt64: \[0-… 248 Should Match Regexp ${snmp_trap}[4] SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: \[0-9] 249 …Should Be Equal ${snmp_trap}[5] SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING: "${expected_erro… 292 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 [all …]
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/openbmc/u-boot/drivers/mtd/ |
H A D | st_smi.c | 129 * flash_get_size - Detect the SMI flash by reading the ID. 133 * Detect the SMI flash by reading the ID. Initializes the flash_info structure 166 * smi_read_sr - Read status register of SMI 179 /* Program SMI in HW Mode */ in smi_read_sr() 222 printf("SMI controller is still in wait, timeout=%d\n", timeout); in smi_wait_till_ready() 243 /* Program SMI in H/W Mode */ in smi_write_enable() 269 * smi_init - SMI initialization routine 271 * SMI initialization routine. Sets SMI control register1. 275 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ in smi_init() 324 /* Put SMI in SW mode */ in smi_sector_erase() [all …]
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/openbmc/openbmc-test-automation/redfish/events/ |
H A D | test_bmc_snmp_config.robot | 207 …Should Be Equal ${SNMP_TRAP}[1] SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1… 208 Should Match Regexp ${SNMP_TRAP}[2] SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: \[0-9]* 209 …Should Match Regexp ${SNMP_TRAP}[3] SNMPv2-SMI::enterprises.49871.1.0.1.2 = Opaque: UInt64: \[0-… 210 Should Match Regexp ${SNMP_TRAP}[4] SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: \[0-9] 211 …Should Be Equal ${SNMP_TRAP}[5] SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING: "${expected_erro… 233 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 234 # SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 54 235 # SNMPv2-SMI::enterprises.49871.1.0.1.2 = Opaque: UInt64: 4622921648578756984 236 # SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: 3 237 # SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING:
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H A D | test_bmc_snmp_trap.robot | 324 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 325 # SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 54 326 # SNMPv2-SMI::enterprises.49871.1.0.1.2 = Opaque: UInt64: 4622921648578756984 327 # SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: 3 328 # SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING:
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/libsmi/ |
H A D | libsmi_0.5.0.bb | 1 SUMMARY = "A Library to Access SMI MIB Information" 8 file://smi.conf \ 35 install -m 0644 ${UNPACKDIR}/smi.conf ${D}${sysconfdir}/smi.conf
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/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/tcpdump/ |
H A D | tcpdump_4.99.5.bb | 41 PACKAGECONFIG[smi] = "--with-smi,--without-smi,libsmi"
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/openbmc/openbmc-test-automation/gui/gui_test/settings_menu/ |
H A D | test_snmp_alerts_sub_menu.robot | 375 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 376 …# SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 369 SNMPv2-SMI::enterprises.49871.1.0.1.2 =… 377 # UInt64: 1397718405502468474 SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: 3 378 # SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING: "xxx.xx.xx Failure" 468 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 469 …# SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 369 SNMPv2-SMI::enterprises.49871.1.0.1.2 =… 470 # UInt64: 1397718405502468474 SNMPv2-SMI::enterprises.49871.1.0.1.3 = INTEGER: 3 471 # SNMPv2-SMI::enterprises.49871.1.0.1.4 = STRING: "xxx.xx.xx Failure" 507 # SNMPv2-MIB::snmpTrapOID.0 = OID: SNMPv2-SMI::enterprises.49871.1.0.0.1 508 # SNMPv2-SMI::enterprises.49871.1.0.1.1 = Gauge32: 369 [all …]
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/openbmc/qemu/tests/functional/acpi-bits/bits-tests/ |
H A D | smilatency.py2 | 31 """SMI latency test.""" 41 # testsuite.add_test("SMI latency test", smi_latency); 42 # testsuite.add_test("SMI latency test with USB disabled via BIOS handoff", test_with_usb_disabl… 70 …testsuite.test("SMI latency < 150us to minimize risk of OS timeouts", max_latency / tsc_per_usec <… 82 …testsuite.print_detail("{} SMI detected using MSR_SMI_COUNT (MSR {:#x})".format(smi_count_delta, M…
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/openbmc/openbmc-test-automation/lib/ |
H A D | os_utilities.robot | 266 [Documentation] Collect ndivia-smi command output. 271 # Collects the output of ndivia-smi cmd output. 273 # | NVIDIA-SMI 361.89 Driver Version: 361.89 | 304 ${nvidia_out} ${stderr} ${rc}= OS Execute Command nvidia-smi 313 # nvidia-smi --query-gpu=power.limit --format=csv returns 320 ${cmd}= Catenate nvidia-smi --query-gpu=power.limit 332 # nvidia-smi --query-gpu=power.draw --format=csv returns 339 ${cmd}= Catenate nvidia-smi --query-gpu=power.draw 347 ... nvidia-smi. 349 ${cmd}= Catenate nvidia-smi --query-gpu=power.draw --format=csv | [all …]
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/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/ |
H A D | pch.h | 355 #define INTEL_USB2_EN (1 << 18) /* Intel-Specific USB2 SMI logic */ 356 #define LEGACY_USB2_EN (1 << 17) /* Legacy USB2 SMI logic */ 357 #define PERIODIC_EN (1 << 14) /* SMI on PERIODIC_STS in SMI_STS */ 361 #define SWSMI_TMR_EN (1 << 6) /* start software smi timer on bit set */ 362 #define APMC_EN (1 << 5) /* Writes to APM_CNT cause SMI# */ 363 #define SLP_SMI_EN (1 << 4) /* Write SLP_EN in PM1_CNT asserts SMI# */ 364 #define LEGACY_USB_EN (1 << 3) /* Legacy USB circuit SMI logic */ 365 #define BIOS_EN (1 << 2) /* Assert SMI# on setting GBL_RLS bit */ 366 #define EOS (1 << 1) /* End of SMI (deassert SMI#) */ 367 #define GBL_SMI_EN (1 << 0) /* SMI# generation at all? */
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/openbmc/u-boot/arch/x86/lib/ |
H A D | acpi.c | 95 * either an SCI or SMI interrupt. When this bit is set, then power in enter_acpi_mode() 97 * is reset power management events will generate an SMI interrupt. in enter_acpi_mode() 102 * U-Boot does not support SMI. And we don't have plan to support in enter_acpi_mode()
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/openbmc/u-boot/drivers/net/ |
H A D | armada100_fec.c | 35 printf("offset: smi, value: 0x%x\n", readl(®s->smi)); in eth_dump_regs() 86 /* wait for the SMI register to become available */ in smi_reg_read() 87 if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) { in smi_reg_read() 92 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, ®s->smi); in smi_reg_read() 95 if (armdfec_phy_timeout(®s->smi, SMI_R_VALID, true)) { in smi_reg_read() 96 val = readl(®s->smi); in smi_reg_read() 101 val = readl(®s->smi); in smi_reg_read() 129 /* wait for the SMI register to become available */ in smi_reg_write() 130 if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) { in smi_reg_write() 136 ®s->smi); in smi_reg_write()
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H A D | armada100_fec.h | 34 /* smi register */ 157 u32 smi; /* SMI */ member
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H A D | mvgbe.c | 42 #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) 52 printf("Error: SMI busy timeout\n"); in smi_wait_ready() 86 /* wait till the SMI is not busy */ in __mvgbe_mdio_read() 95 /* write the smi register */ in __mvgbe_mdio_read() 102 /* read smi register */ in __mvgbe_mdio_read() 105 printf("Err..(%s) SMI read ready timeout\n", in __mvgbe_mdio_read() 111 /* Wait for the data to update in the SMI register */ in __mvgbe_mdio_read() 164 /* wait till the SMI is not busy */ in __mvgbe_mdio_write() 174 /* write the smi register */ in __mvgbe_mdio_write()
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/openbmc/u-boot/drivers/net/phy/ |
H A D | mv88e61xx.c | 52 /* SMI indirection registers for multichip addressing mode */ 221 /* Wait for the current SMI indirect command to complete */ 235 puts("SMI busy timeout\n"); in mv88e61xx_smi_wait() 240 * The mv88e61xx has three types of addresses: the smi bus address, the device 241 * address, and the register address. The smi bus address distinguishes it on 242 * the smi bus from other PHYs or switches. The device address determines 248 * single-chip addressing mode, where it responds to all SMI addresses, using 249 * the smi address as its device address. This obviously only works when this 250 * is the only chip on the SMI bus. This allows the driver to access device 252 * non-zero address, it only responds to that SMI address and requires indirect [all …]
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/openbmc/qemu/hw/isa/ |
H A D | lpc_ich9.c | 405 * cpu hot-[un]plug with SMI requires SMI broadcast, in smi_features_ok_callback() 436 fw_cfg_add_file(fw_cfg, "etc/smi/supported-features", in ich9_lpc_pm_init() 443 fw_cfg_add_file_callback(fw_cfg, "etc/smi/requested-features", in ich9_lpc_pm_init() 448 fw_cfg_add_file_callback(fw_cfg, "etc/smi/features-ok", in ich9_lpc_pm_init() 470 /* SMI_EN = PMBASE + 30. SMI control and enable register */ in ich9_apm_ctrl_changed() 832 DEFINE_PROP_BIT64("x-smi-broadcast", ICH9LPCState, smi_host_features, 834 DEFINE_PROP_BIT64("x-smi-cpu-hotplug", ICH9LPCState, smi_host_features, 836 DEFINE_PROP_BIT64("x-smi-cpu-hotunplug", ICH9LPCState, smi_host_features, 838 DEFINE_PROP_BOOL("x-smi-swsmi-timer", ICH9LPCState, 840 DEFINE_PROP_BOOL("x-smi-periodic-timer", ICH9LPCState,
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/openbmc/qemu/include/hw/southbridge/ |
H A D | ich9.h | 57 /* SMI feature negotiation via fw_cfg */ 244 #define ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP "x-smi-negotiated-features" 246 /* bit positions used in fw_cfg SMI feature negotiation */
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/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | marvell,armada-37xx-pinctrl.txt | 121 group smi 123 - functions smi, gpio
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/openbmc/u-boot/include/linux/mtd/ |
H A D | st_smi.h | 10 /* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */ 11 /* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Security/ |
H A D | RestrictionMode.interface.yaml | 37 commands are blocked (except BIOS SMI based ones).
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/openbmc/bmcweb/redfish-core/include/generated/enums/ |
H A D | computer_system.hpp | 100 SMI, enumerator 308 {WatchdogWarningActions::SMI, "SMI"},
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