1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
279788bb1SAjay Bhargav /*
379788bb1SAjay Bhargav * (C) Copyright 2011
479788bb1SAjay Bhargav * eInfochips Ltd. <www.einfochips.com>
5c7c47ca2SAjay Bhargav * Written-by: Ajay Bhargav <contact@8051projects.net>
679788bb1SAjay Bhargav *
779788bb1SAjay Bhargav * (C) Copyright 2010
879788bb1SAjay Bhargav * Marvell Semiconductor <www.marvell.com>
979788bb1SAjay Bhargav * Contributor: Mahavir Jain <mjain@marvell.com>
1079788bb1SAjay Bhargav */
1179788bb1SAjay Bhargav
1279788bb1SAjay Bhargav #include <common.h>
1379788bb1SAjay Bhargav #include <net.h>
1479788bb1SAjay Bhargav #include <malloc.h>
1579788bb1SAjay Bhargav #include <miiphy.h>
1679788bb1SAjay Bhargav #include <netdev.h>
1779788bb1SAjay Bhargav #include <asm/types.h>
1879788bb1SAjay Bhargav #include <asm/byteorder.h>
1979788bb1SAjay Bhargav #include <linux/err.h>
2079788bb1SAjay Bhargav #include <linux/mii.h>
2179788bb1SAjay Bhargav #include <asm/io.h>
2279788bb1SAjay Bhargav #include <asm/arch/armada100.h>
2379788bb1SAjay Bhargav #include "armada100_fec.h"
2479788bb1SAjay Bhargav
2579788bb1SAjay Bhargav #define PHY_ADR_REQ 0xFF /* Magic number to read/write PHY address */
2679788bb1SAjay Bhargav
2779788bb1SAjay Bhargav #ifdef DEBUG
eth_dump_regs(struct eth_device * dev)2879788bb1SAjay Bhargav static int eth_dump_regs(struct eth_device *dev)
2979788bb1SAjay Bhargav {
3079788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
3179788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
3279788bb1SAjay Bhargav unsigned int i = 0;
3379788bb1SAjay Bhargav
3479788bb1SAjay Bhargav printf("\noffset: phy_adr, value: 0x%x\n", readl(®s->phyadr));
3579788bb1SAjay Bhargav printf("offset: smi, value: 0x%x\n", readl(®s->smi));
3679788bb1SAjay Bhargav for (i = 0x400; i <= 0x4e4; i += 4)
3779788bb1SAjay Bhargav printf("offset: 0x%x, value: 0x%x\n",
3879788bb1SAjay Bhargav i, readl(ARMD1_FEC_BASE + i));
3979788bb1SAjay Bhargav return 0;
4079788bb1SAjay Bhargav }
4179788bb1SAjay Bhargav #endif
4279788bb1SAjay Bhargav
armdfec_phy_timeout(u32 * reg,u32 flag,int cond)4379788bb1SAjay Bhargav static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond)
4479788bb1SAjay Bhargav {
4579788bb1SAjay Bhargav u32 timeout = PHY_WAIT_ITERATIONS;
4679788bb1SAjay Bhargav u32 reg_val;
4779788bb1SAjay Bhargav
4879788bb1SAjay Bhargav while (--timeout) {
4979788bb1SAjay Bhargav reg_val = readl(reg);
5079788bb1SAjay Bhargav if (cond && (reg_val & flag))
5179788bb1SAjay Bhargav break;
5279788bb1SAjay Bhargav else if (!cond && !(reg_val & flag))
5379788bb1SAjay Bhargav break;
5479788bb1SAjay Bhargav udelay(PHY_WAIT_MICRO_SECONDS);
5579788bb1SAjay Bhargav }
5679788bb1SAjay Bhargav return !timeout;
5779788bb1SAjay Bhargav }
5879788bb1SAjay Bhargav
smi_reg_read(struct mii_dev * bus,int phy_addr,int devad,int phy_reg)595a49f174SJoe Hershberger static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad,
605a49f174SJoe Hershberger int phy_reg)
6179788bb1SAjay Bhargav {
625a49f174SJoe Hershberger u16 value = 0;
635a49f174SJoe Hershberger struct eth_device *dev = eth_get_dev_by_name(bus->name);
6479788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
6579788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
6679788bb1SAjay Bhargav u32 val;
6779788bb1SAjay Bhargav
6879788bb1SAjay Bhargav if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) {
6979788bb1SAjay Bhargav val = readl(®s->phyadr);
705a49f174SJoe Hershberger value = val & 0x1f;
715a49f174SJoe Hershberger return value;
7279788bb1SAjay Bhargav }
7379788bb1SAjay Bhargav
7479788bb1SAjay Bhargav /* check parameters */
7579788bb1SAjay Bhargav if (phy_addr > PHY_MASK) {
7679788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Invalid phy address: 0x%X\n",
7779788bb1SAjay Bhargav __func__, phy_addr);
7879788bb1SAjay Bhargav return -EINVAL;
7979788bb1SAjay Bhargav }
8079788bb1SAjay Bhargav if (phy_reg > PHY_MASK) {
8179788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Invalid register offset: 0x%X\n",
8279788bb1SAjay Bhargav __func__, phy_reg);
8379788bb1SAjay Bhargav return -EINVAL;
8479788bb1SAjay Bhargav }
8579788bb1SAjay Bhargav
8679788bb1SAjay Bhargav /* wait for the SMI register to become available */
87472d5460SYork Sun if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) {
8879788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__);
8979788bb1SAjay Bhargav return -1;
9079788bb1SAjay Bhargav }
9179788bb1SAjay Bhargav
9279788bb1SAjay Bhargav writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, ®s->smi);
9379788bb1SAjay Bhargav
9479788bb1SAjay Bhargav /* now wait for the data to be valid */
95472d5460SYork Sun if (armdfec_phy_timeout(®s->smi, SMI_R_VALID, true)) {
9679788bb1SAjay Bhargav val = readl(®s->smi);
9779788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n",
9879788bb1SAjay Bhargav __func__, val);
9979788bb1SAjay Bhargav return -1;
10079788bb1SAjay Bhargav }
10179788bb1SAjay Bhargav val = readl(®s->smi);
1025a49f174SJoe Hershberger value = val & 0xffff;
10379788bb1SAjay Bhargav
1045a49f174SJoe Hershberger return value;
10579788bb1SAjay Bhargav }
10679788bb1SAjay Bhargav
smi_reg_write(struct mii_dev * bus,int phy_addr,int devad,int phy_reg,u16 value)1075a49f174SJoe Hershberger static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad,
1085a49f174SJoe Hershberger int phy_reg, u16 value)
10979788bb1SAjay Bhargav {
1105a49f174SJoe Hershberger struct eth_device *dev = eth_get_dev_by_name(bus->name);
11179788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
11279788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
11379788bb1SAjay Bhargav
11479788bb1SAjay Bhargav if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) {
11579788bb1SAjay Bhargav clrsetbits_le32(®s->phyadr, 0x1f, value & 0x1f);
11679788bb1SAjay Bhargav return 0;
11779788bb1SAjay Bhargav }
11879788bb1SAjay Bhargav
11979788bb1SAjay Bhargav /* check parameters */
12079788bb1SAjay Bhargav if (phy_addr > PHY_MASK) {
12179788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Invalid phy address\n", __func__);
12279788bb1SAjay Bhargav return -EINVAL;
12379788bb1SAjay Bhargav }
12479788bb1SAjay Bhargav if (phy_reg > PHY_MASK) {
12579788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Invalid register offset\n", __func__);
12679788bb1SAjay Bhargav return -EINVAL;
12779788bb1SAjay Bhargav }
12879788bb1SAjay Bhargav
12979788bb1SAjay Bhargav /* wait for the SMI register to become available */
130472d5460SYork Sun if (armdfec_phy_timeout(®s->smi, SMI_BUSY, false)) {
13179788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) PHY busy timeout\n", __func__);
13279788bb1SAjay Bhargav return -1;
13379788bb1SAjay Bhargav }
13479788bb1SAjay Bhargav
13579788bb1SAjay Bhargav writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_W | (value & 0xffff),
13679788bb1SAjay Bhargav ®s->smi);
13779788bb1SAjay Bhargav return 0;
13879788bb1SAjay Bhargav }
13979788bb1SAjay Bhargav
14079788bb1SAjay Bhargav /*
14179788bb1SAjay Bhargav * Abort any transmit and receive operations and put DMA
14279788bb1SAjay Bhargav * in idle state. AT and AR bits are cleared upon entering
14379788bb1SAjay Bhargav * in IDLE state. So poll those bits to verify operation.
14479788bb1SAjay Bhargav */
abortdma(struct eth_device * dev)14579788bb1SAjay Bhargav static void abortdma(struct eth_device *dev)
14679788bb1SAjay Bhargav {
14779788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
14879788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
14979788bb1SAjay Bhargav int delay;
15079788bb1SAjay Bhargav int maxretries = 40;
15179788bb1SAjay Bhargav u32 tmp;
15279788bb1SAjay Bhargav
15379788bb1SAjay Bhargav while (--maxretries) {
15479788bb1SAjay Bhargav writel(SDMA_CMD_AR | SDMA_CMD_AT, ®s->sdma_cmd);
15579788bb1SAjay Bhargav udelay(100);
15679788bb1SAjay Bhargav
15779788bb1SAjay Bhargav delay = 10;
15879788bb1SAjay Bhargav while (--delay) {
15979788bb1SAjay Bhargav tmp = readl(®s->sdma_cmd);
16079788bb1SAjay Bhargav if (!(tmp & (SDMA_CMD_AR | SDMA_CMD_AT)))
16179788bb1SAjay Bhargav break;
16279788bb1SAjay Bhargav udelay(10);
16379788bb1SAjay Bhargav }
16479788bb1SAjay Bhargav if (delay)
16579788bb1SAjay Bhargav break;
16679788bb1SAjay Bhargav }
16779788bb1SAjay Bhargav
16879788bb1SAjay Bhargav if (!maxretries)
16979788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) DMA Stuck\n", __func__);
17079788bb1SAjay Bhargav }
17179788bb1SAjay Bhargav
nibble_swapping_32_bit(u32 x)17279788bb1SAjay Bhargav static inline u32 nibble_swapping_32_bit(u32 x)
17379788bb1SAjay Bhargav {
17479788bb1SAjay Bhargav return ((x & 0xf0f0f0f0) >> 4) | ((x & 0x0f0f0f0f) << 4);
17579788bb1SAjay Bhargav }
17679788bb1SAjay Bhargav
nibble_swapping_16_bit(u32 x)17779788bb1SAjay Bhargav static inline u32 nibble_swapping_16_bit(u32 x)
17879788bb1SAjay Bhargav {
17979788bb1SAjay Bhargav return ((x & 0x0000f0f0) >> 4) | ((x & 0x00000f0f) << 4);
18079788bb1SAjay Bhargav }
18179788bb1SAjay Bhargav
flip_4_bits(u32 x)18279788bb1SAjay Bhargav static inline u32 flip_4_bits(u32 x)
18379788bb1SAjay Bhargav {
18479788bb1SAjay Bhargav return ((x & 0x01) << 3) | ((x & 0x002) << 1)
18579788bb1SAjay Bhargav | ((x & 0x04) >> 1) | ((x & 0x008) >> 3);
18679788bb1SAjay Bhargav }
18779788bb1SAjay Bhargav
18879788bb1SAjay Bhargav /*
18979788bb1SAjay Bhargav * This function will calculate the hash function of the address.
19079788bb1SAjay Bhargav * depends on the hash mode and hash size.
19179788bb1SAjay Bhargav * Inputs
19279788bb1SAjay Bhargav * mach - the 2 most significant bytes of the MAC address.
19379788bb1SAjay Bhargav * macl - the 4 least significant bytes of the MAC address.
19479788bb1SAjay Bhargav * Outputs
19579788bb1SAjay Bhargav * return the calculated entry.
19679788bb1SAjay Bhargav */
hash_function(u32 mach,u32 macl)19779788bb1SAjay Bhargav static u32 hash_function(u32 mach, u32 macl)
19879788bb1SAjay Bhargav {
19979788bb1SAjay Bhargav u32 hashresult;
20079788bb1SAjay Bhargav u32 addrh;
20179788bb1SAjay Bhargav u32 addrl;
20279788bb1SAjay Bhargav u32 addr0;
20379788bb1SAjay Bhargav u32 addr1;
20479788bb1SAjay Bhargav u32 addr2;
20579788bb1SAjay Bhargav u32 addr3;
20679788bb1SAjay Bhargav u32 addrhswapped;
20779788bb1SAjay Bhargav u32 addrlswapped;
20879788bb1SAjay Bhargav
20979788bb1SAjay Bhargav addrh = nibble_swapping_16_bit(mach);
21079788bb1SAjay Bhargav addrl = nibble_swapping_32_bit(macl);
21179788bb1SAjay Bhargav
21279788bb1SAjay Bhargav addrhswapped = flip_4_bits(addrh & 0xf)
21379788bb1SAjay Bhargav + ((flip_4_bits((addrh >> 4) & 0xf)) << 4)
21479788bb1SAjay Bhargav + ((flip_4_bits((addrh >> 8) & 0xf)) << 8)
21579788bb1SAjay Bhargav + ((flip_4_bits((addrh >> 12) & 0xf)) << 12);
21679788bb1SAjay Bhargav
21779788bb1SAjay Bhargav addrlswapped = flip_4_bits(addrl & 0xf)
21879788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 4) & 0xf)) << 4)
21979788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 8) & 0xf)) << 8)
22079788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 12) & 0xf)) << 12)
22179788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 16) & 0xf)) << 16)
22279788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 20) & 0xf)) << 20)
22379788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 24) & 0xf)) << 24)
22479788bb1SAjay Bhargav + ((flip_4_bits((addrl >> 28) & 0xf)) << 28);
22579788bb1SAjay Bhargav
22679788bb1SAjay Bhargav addrh = addrhswapped;
22779788bb1SAjay Bhargav addrl = addrlswapped;
22879788bb1SAjay Bhargav
22979788bb1SAjay Bhargav addr0 = (addrl >> 2) & 0x03f;
23079788bb1SAjay Bhargav addr1 = (addrl & 0x003) | (((addrl >> 8) & 0x7f) << 2);
23179788bb1SAjay Bhargav addr2 = (addrl >> 15) & 0x1ff;
23279788bb1SAjay Bhargav addr3 = ((addrl >> 24) & 0x0ff) | ((addrh & 1) << 8);
23379788bb1SAjay Bhargav
23479788bb1SAjay Bhargav hashresult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3);
23579788bb1SAjay Bhargav hashresult = hashresult & 0x07ff;
23679788bb1SAjay Bhargav return hashresult;
23779788bb1SAjay Bhargav }
23879788bb1SAjay Bhargav
23979788bb1SAjay Bhargav /*
24079788bb1SAjay Bhargav * This function will add an entry to the address table.
24179788bb1SAjay Bhargav * depends on the hash mode and hash size that was initialized.
24279788bb1SAjay Bhargav * Inputs
24379788bb1SAjay Bhargav * mach - the 2 most significant bytes of the MAC address.
24479788bb1SAjay Bhargav * macl - the 4 least significant bytes of the MAC address.
24579788bb1SAjay Bhargav * skip - if 1, skip this address.
24679788bb1SAjay Bhargav * rd - the RD field in the address table.
24779788bb1SAjay Bhargav * Outputs
24879788bb1SAjay Bhargav * address table entry is added.
24979788bb1SAjay Bhargav * 0 if success.
25079788bb1SAjay Bhargav * -ENOSPC if table full
25179788bb1SAjay Bhargav */
add_del_hash_entry(struct armdfec_device * darmdfec,u32 mach,u32 macl,u32 rd,u32 skip,int del)25279788bb1SAjay Bhargav static int add_del_hash_entry(struct armdfec_device *darmdfec, u32 mach,
25379788bb1SAjay Bhargav u32 macl, u32 rd, u32 skip, int del)
25479788bb1SAjay Bhargav {
25579788bb1SAjay Bhargav struct addr_table_entry_t *entry, *start;
25679788bb1SAjay Bhargav u32 newhi;
25779788bb1SAjay Bhargav u32 newlo;
25879788bb1SAjay Bhargav u32 i;
25979788bb1SAjay Bhargav
26079788bb1SAjay Bhargav newlo = (((mach >> 4) & 0xf) << 15)
26179788bb1SAjay Bhargav | (((mach >> 0) & 0xf) << 11)
26279788bb1SAjay Bhargav | (((mach >> 12) & 0xf) << 7)
26379788bb1SAjay Bhargav | (((mach >> 8) & 0xf) << 3)
26479788bb1SAjay Bhargav | (((macl >> 20) & 0x1) << 31)
26579788bb1SAjay Bhargav | (((macl >> 16) & 0xf) << 27)
26679788bb1SAjay Bhargav | (((macl >> 28) & 0xf) << 23)
26779788bb1SAjay Bhargav | (((macl >> 24) & 0xf) << 19)
26879788bb1SAjay Bhargav | (skip << HTESKIP) | (rd << HTERDBIT)
26979788bb1SAjay Bhargav | HTEVALID;
27079788bb1SAjay Bhargav
27179788bb1SAjay Bhargav newhi = (((macl >> 4) & 0xf) << 15)
27279788bb1SAjay Bhargav | (((macl >> 0) & 0xf) << 11)
27379788bb1SAjay Bhargav | (((macl >> 12) & 0xf) << 7)
27479788bb1SAjay Bhargav | (((macl >> 8) & 0xf) << 3)
27579788bb1SAjay Bhargav | (((macl >> 21) & 0x7) << 0);
27679788bb1SAjay Bhargav
27779788bb1SAjay Bhargav /*
27879788bb1SAjay Bhargav * Pick the appropriate table, start scanning for free/reusable
27979788bb1SAjay Bhargav * entries at the index obtained by hashing the specified MAC address
28079788bb1SAjay Bhargav */
28179788bb1SAjay Bhargav start = (struct addr_table_entry_t *)(darmdfec->htpr);
28279788bb1SAjay Bhargav entry = start + hash_function(mach, macl);
28379788bb1SAjay Bhargav for (i = 0; i < HOP_NUMBER; i++) {
28479788bb1SAjay Bhargav if (!(entry->lo & HTEVALID)) {
28579788bb1SAjay Bhargav break;
28679788bb1SAjay Bhargav } else {
28779788bb1SAjay Bhargav /* if same address put in same position */
28879788bb1SAjay Bhargav if (((entry->lo & 0xfffffff8) == (newlo & 0xfffffff8))
28979788bb1SAjay Bhargav && (entry->hi == newhi))
29079788bb1SAjay Bhargav break;
29179788bb1SAjay Bhargav }
29279788bb1SAjay Bhargav if (entry == start + 0x7ff)
29379788bb1SAjay Bhargav entry = start;
29479788bb1SAjay Bhargav else
29579788bb1SAjay Bhargav entry++;
29679788bb1SAjay Bhargav }
29779788bb1SAjay Bhargav
29879788bb1SAjay Bhargav if (((entry->lo & 0xfffffff8) != (newlo & 0xfffffff8)) &&
29979788bb1SAjay Bhargav (entry->hi != newhi) && del)
30079788bb1SAjay Bhargav return 0;
30179788bb1SAjay Bhargav
30279788bb1SAjay Bhargav if (i == HOP_NUMBER) {
30379788bb1SAjay Bhargav if (!del) {
30479788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) table section is full\n",
30579788bb1SAjay Bhargav __func__);
30679788bb1SAjay Bhargav return -ENOSPC;
30779788bb1SAjay Bhargav } else {
30879788bb1SAjay Bhargav return 0;
30979788bb1SAjay Bhargav }
31079788bb1SAjay Bhargav }
31179788bb1SAjay Bhargav
31279788bb1SAjay Bhargav /*
31379788bb1SAjay Bhargav * Update the selected entry
31479788bb1SAjay Bhargav */
31579788bb1SAjay Bhargav if (del) {
31679788bb1SAjay Bhargav entry->hi = 0;
31779788bb1SAjay Bhargav entry->lo = 0;
31879788bb1SAjay Bhargav } else {
31979788bb1SAjay Bhargav entry->hi = newhi;
32079788bb1SAjay Bhargav entry->lo = newlo;
32179788bb1SAjay Bhargav }
32279788bb1SAjay Bhargav
32379788bb1SAjay Bhargav return 0;
32479788bb1SAjay Bhargav }
32579788bb1SAjay Bhargav
32679788bb1SAjay Bhargav /*
32779788bb1SAjay Bhargav * Create an addressTable entry from MAC address info
32879788bb1SAjay Bhargav * found in the specifed net_device struct
32979788bb1SAjay Bhargav *
33079788bb1SAjay Bhargav * Input : pointer to ethernet interface network device structure
33179788bb1SAjay Bhargav * Output : N/A
33279788bb1SAjay Bhargav */
update_hash_table_mac_address(struct armdfec_device * darmdfec,u8 * oaddr,u8 * addr)33379788bb1SAjay Bhargav static void update_hash_table_mac_address(struct armdfec_device *darmdfec,
33479788bb1SAjay Bhargav u8 *oaddr, u8 *addr)
33579788bb1SAjay Bhargav {
33679788bb1SAjay Bhargav u32 mach;
33779788bb1SAjay Bhargav u32 macl;
33879788bb1SAjay Bhargav
33979788bb1SAjay Bhargav /* Delete old entry */
34079788bb1SAjay Bhargav if (oaddr) {
34179788bb1SAjay Bhargav mach = (oaddr[0] << 8) | oaddr[1];
34279788bb1SAjay Bhargav macl = (oaddr[2] << 24) | (oaddr[3] << 16) |
34379788bb1SAjay Bhargav (oaddr[4] << 8) | oaddr[5];
34479788bb1SAjay Bhargav add_del_hash_entry(darmdfec, mach, macl, 1, 0, HASH_DELETE);
34579788bb1SAjay Bhargav }
34679788bb1SAjay Bhargav
34779788bb1SAjay Bhargav /* Add new entry */
34879788bb1SAjay Bhargav mach = (addr[0] << 8) | addr[1];
34979788bb1SAjay Bhargav macl = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
35079788bb1SAjay Bhargav add_del_hash_entry(darmdfec, mach, macl, 1, 0, HASH_ADD);
35179788bb1SAjay Bhargav }
35279788bb1SAjay Bhargav
35379788bb1SAjay Bhargav /* Address Table Initialization */
init_hashtable(struct eth_device * dev)35479788bb1SAjay Bhargav static void init_hashtable(struct eth_device *dev)
35579788bb1SAjay Bhargav {
35679788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
35779788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
35879788bb1SAjay Bhargav memset(darmdfec->htpr, 0, HASH_ADDR_TABLE_SIZE);
35979788bb1SAjay Bhargav writel((u32)darmdfec->htpr, ®s->htpr);
36079788bb1SAjay Bhargav }
36179788bb1SAjay Bhargav
36279788bb1SAjay Bhargav /*
36379788bb1SAjay Bhargav * This detects PHY chip from address 0-31 by reading PHY status
36479788bb1SAjay Bhargav * registers. PHY chip can be connected at any of this address.
36579788bb1SAjay Bhargav */
ethernet_phy_detect(struct eth_device * dev)36679788bb1SAjay Bhargav static int ethernet_phy_detect(struct eth_device *dev)
36779788bb1SAjay Bhargav {
36879788bb1SAjay Bhargav u32 val;
36979788bb1SAjay Bhargav u16 tmp, mii_status;
37079788bb1SAjay Bhargav u8 addr;
37179788bb1SAjay Bhargav
37279788bb1SAjay Bhargav for (addr = 0; addr < 32; addr++) {
37379788bb1SAjay Bhargav if (miiphy_read(dev->name, addr, MII_BMSR, &mii_status) != 0)
37479788bb1SAjay Bhargav /* try next phy */
37579788bb1SAjay Bhargav continue;
37679788bb1SAjay Bhargav
37779788bb1SAjay Bhargav /* invalid MII status. More validation required here... */
37879788bb1SAjay Bhargav if (mii_status == 0 || mii_status == 0xffff)
37979788bb1SAjay Bhargav /* try next phy */
38079788bb1SAjay Bhargav continue;
38179788bb1SAjay Bhargav
38279788bb1SAjay Bhargav if (miiphy_read(dev->name, addr, MII_PHYSID1, &tmp) != 0)
38379788bb1SAjay Bhargav /* try next phy */
38479788bb1SAjay Bhargav continue;
38579788bb1SAjay Bhargav
38679788bb1SAjay Bhargav val = tmp << 16;
38779788bb1SAjay Bhargav if (miiphy_read(dev->name, addr, MII_PHYSID2, &tmp) != 0)
38879788bb1SAjay Bhargav /* try next phy */
38979788bb1SAjay Bhargav continue;
39079788bb1SAjay Bhargav
39179788bb1SAjay Bhargav val |= tmp;
39279788bb1SAjay Bhargav
39379788bb1SAjay Bhargav if ((val & 0xfffffff0) != 0)
39479788bb1SAjay Bhargav return addr;
39579788bb1SAjay Bhargav }
39679788bb1SAjay Bhargav return -1;
39779788bb1SAjay Bhargav }
39879788bb1SAjay Bhargav
armdfec_init_rx_desc_ring(struct armdfec_device * darmdfec)39979788bb1SAjay Bhargav static void armdfec_init_rx_desc_ring(struct armdfec_device *darmdfec)
40079788bb1SAjay Bhargav {
40179788bb1SAjay Bhargav struct rx_desc *p_rx_desc;
40279788bb1SAjay Bhargav int i;
40379788bb1SAjay Bhargav
40479788bb1SAjay Bhargav /* initialize the Rx descriptors ring */
40579788bb1SAjay Bhargav p_rx_desc = darmdfec->p_rxdesc;
40679788bb1SAjay Bhargav for (i = 0; i < RINGSZ; i++) {
40779788bb1SAjay Bhargav p_rx_desc->cmd_sts = BUF_OWNED_BY_DMA | RX_EN_INT;
40879788bb1SAjay Bhargav p_rx_desc->buf_size = PKTSIZE_ALIGN;
40979788bb1SAjay Bhargav p_rx_desc->byte_cnt = 0;
41079788bb1SAjay Bhargav p_rx_desc->buf_ptr = darmdfec->p_rxbuf + i * PKTSIZE_ALIGN;
41179788bb1SAjay Bhargav if (i == (RINGSZ - 1)) {
41279788bb1SAjay Bhargav p_rx_desc->nxtdesc_p = darmdfec->p_rxdesc;
41379788bb1SAjay Bhargav } else {
41479788bb1SAjay Bhargav p_rx_desc->nxtdesc_p = (struct rx_desc *)
41579788bb1SAjay Bhargav ((u32)p_rx_desc + ARMDFEC_RXQ_DESC_ALIGNED_SIZE);
41679788bb1SAjay Bhargav p_rx_desc = p_rx_desc->nxtdesc_p;
41779788bb1SAjay Bhargav }
41879788bb1SAjay Bhargav }
41979788bb1SAjay Bhargav darmdfec->p_rxdesc_curr = darmdfec->p_rxdesc;
42079788bb1SAjay Bhargav }
42179788bb1SAjay Bhargav
armdfec_init(struct eth_device * dev,bd_t * bd)42279788bb1SAjay Bhargav static int armdfec_init(struct eth_device *dev, bd_t *bd)
42379788bb1SAjay Bhargav {
42479788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
42579788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
42679788bb1SAjay Bhargav int phy_adr;
42728cb465fSAjay Bhargav u32 temp;
42879788bb1SAjay Bhargav
42979788bb1SAjay Bhargav armdfec_init_rx_desc_ring(darmdfec);
43079788bb1SAjay Bhargav
43179788bb1SAjay Bhargav /* Disable interrupts */
43279788bb1SAjay Bhargav writel(0, ®s->im);
43379788bb1SAjay Bhargav writel(0, ®s->ic);
43479788bb1SAjay Bhargav /* Write to ICR to clear interrupts. */
43579788bb1SAjay Bhargav writel(0, ®s->iwc);
43679788bb1SAjay Bhargav
43779788bb1SAjay Bhargav /*
43879788bb1SAjay Bhargav * Abort any transmit and receive operations and put DMA
43979788bb1SAjay Bhargav * in idle state.
44079788bb1SAjay Bhargav */
44179788bb1SAjay Bhargav abortdma(dev);
44279788bb1SAjay Bhargav
44379788bb1SAjay Bhargav /* Initialize address hash table */
44479788bb1SAjay Bhargav init_hashtable(dev);
44579788bb1SAjay Bhargav
44679788bb1SAjay Bhargav /* SDMA configuration */
44779788bb1SAjay Bhargav writel(SDCR_BSZ8 | /* Burst size = 32 bytes */
44879788bb1SAjay Bhargav SDCR_RIFB | /* Rx interrupt on frame */
44979788bb1SAjay Bhargav SDCR_BLMT | /* Little endian transmit */
45079788bb1SAjay Bhargav SDCR_BLMR | /* Little endian receive */
45179788bb1SAjay Bhargav SDCR_RC_MAX_RETRANS, /* Max retransmit count */
45279788bb1SAjay Bhargav ®s->sdma_conf);
45379788bb1SAjay Bhargav /* Port Configuration */
45479788bb1SAjay Bhargav writel(PCR_HS, ®s->pconf); /* Hash size is 1/2kb */
45579788bb1SAjay Bhargav
45679788bb1SAjay Bhargav /* Set extended port configuration */
45779788bb1SAjay Bhargav writel(PCXR_2BSM | /* Two byte suffix aligns IP hdr */
45879788bb1SAjay Bhargav PCXR_DSCP_EN | /* Enable DSCP in IP */
45979788bb1SAjay Bhargav PCXR_MFL_1536 | /* Set MTU = 1536 */
46079788bb1SAjay Bhargav PCXR_FLP | /* do not force link pass */
46179788bb1SAjay Bhargav PCXR_TX_HIGH_PRI, /* Transmit - high priority queue */
46279788bb1SAjay Bhargav ®s->pconf_ext);
46379788bb1SAjay Bhargav
46479788bb1SAjay Bhargav update_hash_table_mac_address(darmdfec, NULL, dev->enetaddr);
46579788bb1SAjay Bhargav
46679788bb1SAjay Bhargav /* Update TX and RX queue descriptor register */
46728cb465fSAjay Bhargav temp = (u32)®s->txcdp[TXQ];
46828cb465fSAjay Bhargav writel((u32)darmdfec->p_txdesc, temp);
46928cb465fSAjay Bhargav temp = (u32)®s->rxfdp[RXQ];
47028cb465fSAjay Bhargav writel((u32)darmdfec->p_rxdesc, temp);
47128cb465fSAjay Bhargav temp = (u32)®s->rxcdp[RXQ];
47228cb465fSAjay Bhargav writel((u32)darmdfec->p_rxdesc_curr, temp);
47379788bb1SAjay Bhargav
47479788bb1SAjay Bhargav /* Enable Interrupts */
47579788bb1SAjay Bhargav writel(ALL_INTS, ®s->im);
47679788bb1SAjay Bhargav
47779788bb1SAjay Bhargav /* Enable Ethernet Port */
47879788bb1SAjay Bhargav setbits_le32(®s->pconf, PCR_EN);
47979788bb1SAjay Bhargav
48079788bb1SAjay Bhargav /* Enable RX DMA engine */
48179788bb1SAjay Bhargav setbits_le32(®s->sdma_cmd, SDMA_CMD_ERD);
48279788bb1SAjay Bhargav
48379788bb1SAjay Bhargav #ifdef DEBUG
48479788bb1SAjay Bhargav eth_dump_regs(dev);
48579788bb1SAjay Bhargav #endif
48679788bb1SAjay Bhargav
48779788bb1SAjay Bhargav #if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
48879788bb1SAjay Bhargav
48979788bb1SAjay Bhargav #if defined(CONFIG_PHY_BASE_ADR)
49079788bb1SAjay Bhargav miiphy_write(dev->name, PHY_ADR_REQ, PHY_ADR_REQ, CONFIG_PHY_BASE_ADR);
49179788bb1SAjay Bhargav #else
49279788bb1SAjay Bhargav /* Search phy address from range 0-31 */
49379788bb1SAjay Bhargav phy_adr = ethernet_phy_detect(dev);
49479788bb1SAjay Bhargav if (phy_adr < 0) {
49579788bb1SAjay Bhargav printf("ARMD100 FEC: PHY not detected at address range 0-31\n");
49679788bb1SAjay Bhargav return -1;
49779788bb1SAjay Bhargav } else {
49879788bb1SAjay Bhargav debug("ARMD100 FEC: PHY detected at addr %d\n", phy_adr);
49979788bb1SAjay Bhargav miiphy_write(dev->name, PHY_ADR_REQ, PHY_ADR_REQ, phy_adr);
50079788bb1SAjay Bhargav }
50179788bb1SAjay Bhargav #endif
50279788bb1SAjay Bhargav
50379788bb1SAjay Bhargav #if defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
50479788bb1SAjay Bhargav /* Wait up to 5s for the link status */
50579788bb1SAjay Bhargav for (i = 0; i < 5; i++) {
50679788bb1SAjay Bhargav u16 phy_adr;
50779788bb1SAjay Bhargav
50879788bb1SAjay Bhargav miiphy_read(dev->name, 0xFF, 0xFF, &phy_adr);
50979788bb1SAjay Bhargav /* Return if we get link up */
51079788bb1SAjay Bhargav if (miiphy_link(dev->name, phy_adr))
51179788bb1SAjay Bhargav return 0;
51279788bb1SAjay Bhargav udelay(1000000);
51379788bb1SAjay Bhargav }
51479788bb1SAjay Bhargav
51579788bb1SAjay Bhargav printf("ARMD100 FEC: No link on %s\n", dev->name);
51679788bb1SAjay Bhargav return -1;
51779788bb1SAjay Bhargav #endif
51879788bb1SAjay Bhargav #endif
51979788bb1SAjay Bhargav return 0;
52079788bb1SAjay Bhargav }
52179788bb1SAjay Bhargav
armdfec_halt(struct eth_device * dev)52279788bb1SAjay Bhargav static void armdfec_halt(struct eth_device *dev)
52379788bb1SAjay Bhargav {
52479788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
52579788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
52679788bb1SAjay Bhargav
52779788bb1SAjay Bhargav /* Stop RX DMA */
52879788bb1SAjay Bhargav clrbits_le32(®s->sdma_cmd, SDMA_CMD_ERD);
52979788bb1SAjay Bhargav
53079788bb1SAjay Bhargav /*
53179788bb1SAjay Bhargav * Abort any transmit and receive operations and put DMA
53279788bb1SAjay Bhargav * in idle state.
53379788bb1SAjay Bhargav */
53479788bb1SAjay Bhargav abortdma(dev);
53579788bb1SAjay Bhargav
53679788bb1SAjay Bhargav /* Disable interrupts */
53779788bb1SAjay Bhargav writel(0, ®s->im);
53879788bb1SAjay Bhargav writel(0, ®s->ic);
53979788bb1SAjay Bhargav writel(0, ®s->iwc);
54079788bb1SAjay Bhargav
54179788bb1SAjay Bhargav /* Disable Port */
54279788bb1SAjay Bhargav clrbits_le32(®s->pconf, PCR_EN);
54379788bb1SAjay Bhargav }
54479788bb1SAjay Bhargav
armdfec_send(struct eth_device * dev,void * dataptr,int datasize)54574e738e8SJoe Hershberger static int armdfec_send(struct eth_device *dev, void *dataptr, int datasize)
54679788bb1SAjay Bhargav {
54779788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
54879788bb1SAjay Bhargav struct armdfec_reg *regs = darmdfec->regs;
54979788bb1SAjay Bhargav struct tx_desc *p_txdesc = darmdfec->p_txdesc;
55079788bb1SAjay Bhargav void *p = (void *)dataptr;
55179788bb1SAjay Bhargav int retry = PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS;
552905b3b00SMarek Vasut u32 cmd_sts, temp;
55379788bb1SAjay Bhargav
55479788bb1SAjay Bhargav /* Copy buffer if it's misaligned */
55579788bb1SAjay Bhargav if ((u32)dataptr & 0x07) {
55679788bb1SAjay Bhargav if (datasize > PKTSIZE_ALIGN) {
55779788bb1SAjay Bhargav printf("ARMD100 FEC: Non-aligned data too large (%d)\n",
55879788bb1SAjay Bhargav datasize);
55979788bb1SAjay Bhargav return -1;
56079788bb1SAjay Bhargav }
56179788bb1SAjay Bhargav memcpy(darmdfec->p_aligned_txbuf, p, datasize);
56279788bb1SAjay Bhargav p = darmdfec->p_aligned_txbuf;
56379788bb1SAjay Bhargav }
56479788bb1SAjay Bhargav
56579788bb1SAjay Bhargav p_txdesc->cmd_sts = TX_ZERO_PADDING | TX_GEN_CRC;
56679788bb1SAjay Bhargav p_txdesc->cmd_sts |= TX_FIRST_DESC | TX_LAST_DESC;
56779788bb1SAjay Bhargav p_txdesc->cmd_sts |= BUF_OWNED_BY_DMA;
56879788bb1SAjay Bhargav p_txdesc->cmd_sts |= TX_EN_INT;
56979788bb1SAjay Bhargav p_txdesc->buf_ptr = p;
57079788bb1SAjay Bhargav p_txdesc->byte_cnt = datasize;
57179788bb1SAjay Bhargav
57279788bb1SAjay Bhargav /* Apply send command using high priority TX queue */
573905b3b00SMarek Vasut temp = (u32)®s->txcdp[TXQ];
574905b3b00SMarek Vasut writel((u32)p_txdesc, temp);
57579788bb1SAjay Bhargav writel(SDMA_CMD_TXDL | SDMA_CMD_TXDH | SDMA_CMD_ERD, ®s->sdma_cmd);
57679788bb1SAjay Bhargav
57779788bb1SAjay Bhargav /*
57879788bb1SAjay Bhargav * wait for packet xmit completion
57979788bb1SAjay Bhargav */
58079788bb1SAjay Bhargav cmd_sts = readl(&p_txdesc->cmd_sts);
58179788bb1SAjay Bhargav while (cmd_sts & BUF_OWNED_BY_DMA) {
58279788bb1SAjay Bhargav /* return fail if error is detected */
58379788bb1SAjay Bhargav if ((cmd_sts & (TX_ERROR | TX_LAST_DESC)) ==
58479788bb1SAjay Bhargav (TX_ERROR | TX_LAST_DESC)) {
58579788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) in xmit packet\n", __func__);
58679788bb1SAjay Bhargav return -1;
58779788bb1SAjay Bhargav }
58879788bb1SAjay Bhargav cmd_sts = readl(&p_txdesc->cmd_sts);
58979788bb1SAjay Bhargav if (!(retry--)) {
59079788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) xmit packet timeout!\n",
59179788bb1SAjay Bhargav __func__);
59279788bb1SAjay Bhargav return -1;
59379788bb1SAjay Bhargav }
59479788bb1SAjay Bhargav }
59579788bb1SAjay Bhargav
59679788bb1SAjay Bhargav return 0;
59779788bb1SAjay Bhargav }
59879788bb1SAjay Bhargav
armdfec_recv(struct eth_device * dev)59979788bb1SAjay Bhargav static int armdfec_recv(struct eth_device *dev)
60079788bb1SAjay Bhargav {
60179788bb1SAjay Bhargav struct armdfec_device *darmdfec = to_darmdfec(dev);
60279788bb1SAjay Bhargav struct rx_desc *p_rxdesc_curr = darmdfec->p_rxdesc_curr;
60379788bb1SAjay Bhargav u32 cmd_sts;
60479788bb1SAjay Bhargav u32 timeout = 0;
60528cb465fSAjay Bhargav u32 temp;
60679788bb1SAjay Bhargav
60779788bb1SAjay Bhargav /* wait untill rx packet available or timeout */
60879788bb1SAjay Bhargav do {
60979788bb1SAjay Bhargav if (timeout < PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS) {
61079788bb1SAjay Bhargav timeout++;
61179788bb1SAjay Bhargav } else {
61279788bb1SAjay Bhargav debug("ARMD100 FEC: %s time out...\n", __func__);
61379788bb1SAjay Bhargav return -1;
61479788bb1SAjay Bhargav }
61579788bb1SAjay Bhargav } while (readl(&p_rxdesc_curr->cmd_sts) & BUF_OWNED_BY_DMA);
61679788bb1SAjay Bhargav
61779788bb1SAjay Bhargav if (p_rxdesc_curr->byte_cnt != 0) {
61879788bb1SAjay Bhargav debug("ARMD100 FEC: %s: Received %d byte Packet @ 0x%x"
61979788bb1SAjay Bhargav "(cmd_sts= %08x)\n", __func__,
62079788bb1SAjay Bhargav (u32)p_rxdesc_curr->byte_cnt,
62179788bb1SAjay Bhargav (u32)p_rxdesc_curr->buf_ptr,
62279788bb1SAjay Bhargav (u32)p_rxdesc_curr->cmd_sts);
62379788bb1SAjay Bhargav }
62479788bb1SAjay Bhargav
62579788bb1SAjay Bhargav /*
62679788bb1SAjay Bhargav * In case received a packet without first/last bits on
62779788bb1SAjay Bhargav * OR the error summary bit is on,
62879788bb1SAjay Bhargav * the packets needs to be dropeed.
62979788bb1SAjay Bhargav */
63079788bb1SAjay Bhargav cmd_sts = readl(&p_rxdesc_curr->cmd_sts);
63179788bb1SAjay Bhargav
63279788bb1SAjay Bhargav if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
63379788bb1SAjay Bhargav (RX_FIRST_DESC | RX_LAST_DESC)) {
63479788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Dropping packet spread on"
63579788bb1SAjay Bhargav " multiple descriptors\n", __func__);
63679788bb1SAjay Bhargav } else if (cmd_sts & RX_ERROR) {
63779788bb1SAjay Bhargav printf("ARMD100 FEC: (%s) Dropping packet with errors\n",
63879788bb1SAjay Bhargav __func__);
63979788bb1SAjay Bhargav } else {
64079788bb1SAjay Bhargav /* !!! call higher layer processing */
64179788bb1SAjay Bhargav debug("ARMD100 FEC: (%s) Sending Received packet to"
6421fd92db8SJoe Hershberger " upper layer (net_process_received_packet)\n", __func__);
64379788bb1SAjay Bhargav
64479788bb1SAjay Bhargav /*
64579788bb1SAjay Bhargav * let the upper layer handle the packet, subtract offset
64679788bb1SAjay Bhargav * as two dummy bytes are added in received buffer see
64779788bb1SAjay Bhargav * PORT_CONFIG_EXT register bit TWO_Byte_Stuff_Mode bit.
64879788bb1SAjay Bhargav */
6491fd92db8SJoe Hershberger net_process_received_packet(
6501fd92db8SJoe Hershberger p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET,
65179788bb1SAjay Bhargav (int)(p_rxdesc_curr->byte_cnt - RX_BUF_OFFSET));
65279788bb1SAjay Bhargav }
65379788bb1SAjay Bhargav /*
65479788bb1SAjay Bhargav * free these descriptors and point next in the ring
65579788bb1SAjay Bhargav */
65679788bb1SAjay Bhargav p_rxdesc_curr->cmd_sts = BUF_OWNED_BY_DMA | RX_EN_INT;
65779788bb1SAjay Bhargav p_rxdesc_curr->buf_size = PKTSIZE_ALIGN;
65879788bb1SAjay Bhargav p_rxdesc_curr->byte_cnt = 0;
65979788bb1SAjay Bhargav
66028cb465fSAjay Bhargav temp = (u32)&darmdfec->p_rxdesc_curr;
66128cb465fSAjay Bhargav writel((u32)p_rxdesc_curr->nxtdesc_p, temp);
66279788bb1SAjay Bhargav
66379788bb1SAjay Bhargav return 0;
66479788bb1SAjay Bhargav }
66579788bb1SAjay Bhargav
armada100_fec_register(unsigned long base_addr)66679788bb1SAjay Bhargav int armada100_fec_register(unsigned long base_addr)
66779788bb1SAjay Bhargav {
66879788bb1SAjay Bhargav struct armdfec_device *darmdfec;
66979788bb1SAjay Bhargav struct eth_device *dev;
67079788bb1SAjay Bhargav
67179788bb1SAjay Bhargav darmdfec = malloc(sizeof(struct armdfec_device));
67279788bb1SAjay Bhargav if (!darmdfec)
67379788bb1SAjay Bhargav goto error;
67479788bb1SAjay Bhargav
67579788bb1SAjay Bhargav memset(darmdfec, 0, sizeof(struct armdfec_device));
67679788bb1SAjay Bhargav
67779788bb1SAjay Bhargav darmdfec->htpr = memalign(8, HASH_ADDR_TABLE_SIZE);
67879788bb1SAjay Bhargav if (!darmdfec->htpr)
67979788bb1SAjay Bhargav goto error1;
68079788bb1SAjay Bhargav
68179788bb1SAjay Bhargav darmdfec->p_rxdesc = memalign(PKTALIGN,
68279788bb1SAjay Bhargav ARMDFEC_RXQ_DESC_ALIGNED_SIZE * RINGSZ + 1);
68379788bb1SAjay Bhargav
68479788bb1SAjay Bhargav if (!darmdfec->p_rxdesc)
68579788bb1SAjay Bhargav goto error1;
68679788bb1SAjay Bhargav
68779788bb1SAjay Bhargav darmdfec->p_rxbuf = memalign(PKTALIGN, RINGSZ * PKTSIZE_ALIGN + 1);
68879788bb1SAjay Bhargav if (!darmdfec->p_rxbuf)
68979788bb1SAjay Bhargav goto error1;
69079788bb1SAjay Bhargav
69179788bb1SAjay Bhargav darmdfec->p_aligned_txbuf = memalign(8, PKTSIZE_ALIGN);
69279788bb1SAjay Bhargav if (!darmdfec->p_aligned_txbuf)
69379788bb1SAjay Bhargav goto error1;
69479788bb1SAjay Bhargav
69579788bb1SAjay Bhargav darmdfec->p_txdesc = memalign(PKTALIGN, sizeof(struct tx_desc) + 1);
69679788bb1SAjay Bhargav if (!darmdfec->p_txdesc)
69779788bb1SAjay Bhargav goto error1;
69879788bb1SAjay Bhargav
69979788bb1SAjay Bhargav dev = &darmdfec->dev;
70079788bb1SAjay Bhargav /* Assign ARMADA100 Fast Ethernet Controller Base Address */
70179788bb1SAjay Bhargav darmdfec->regs = (void *)base_addr;
70279788bb1SAjay Bhargav
703f6add132SMike Frysinger /* must be less than sizeof(dev->name) */
70479788bb1SAjay Bhargav strcpy(dev->name, "armd-fec0");
70579788bb1SAjay Bhargav
70679788bb1SAjay Bhargav dev->init = armdfec_init;
70779788bb1SAjay Bhargav dev->halt = armdfec_halt;
70879788bb1SAjay Bhargav dev->send = armdfec_send;
70979788bb1SAjay Bhargav dev->recv = armdfec_recv;
71079788bb1SAjay Bhargav
71179788bb1SAjay Bhargav eth_register(dev);
71279788bb1SAjay Bhargav
71379788bb1SAjay Bhargav #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
7145a49f174SJoe Hershberger int retval;
7155a49f174SJoe Hershberger struct mii_dev *mdiodev = mdio_alloc();
7165a49f174SJoe Hershberger if (!mdiodev)
7175a49f174SJoe Hershberger return -ENOMEM;
7185a49f174SJoe Hershberger strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
7195a49f174SJoe Hershberger mdiodev->read = smi_reg_read;
7205a49f174SJoe Hershberger mdiodev->write = smi_reg_write;
7215a49f174SJoe Hershberger
7225a49f174SJoe Hershberger retval = mdio_register(mdiodev);
7235a49f174SJoe Hershberger if (retval < 0)
7245a49f174SJoe Hershberger return retval;
72579788bb1SAjay Bhargav #endif
72679788bb1SAjay Bhargav return 0;
72779788bb1SAjay Bhargav
72879788bb1SAjay Bhargav error1:
72979788bb1SAjay Bhargav free(darmdfec->p_aligned_txbuf);
73079788bb1SAjay Bhargav free(darmdfec->p_rxbuf);
73179788bb1SAjay Bhargav free(darmdfec->p_rxdesc);
73279788bb1SAjay Bhargav free(darmdfec->htpr);
73379788bb1SAjay Bhargav error:
73479788bb1SAjay Bhargav free(darmdfec);
73579788bb1SAjay Bhargav printf("AMD100 FEC: (%s) Failed to allocate memory\n", __func__);
73679788bb1SAjay Bhargav return -1;
73779788bb1SAjay Bhargav }
738