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/openbmc/linux/drivers/staging/iio/accel/
H A DKconfig8 tristate "Analog Devices ADIS16203 Programmable 360 Degrees Inclinometer"
13 Say Y here to build support for Analog Devices adis16203 Programmable
20 tristate "Analog Devices ADIS16240 Programmable Impact Sensor and Recorder"
25 Say Y here to build support for Analog Devices adis16240 programmable
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,5p35023.yaml7 title: Renesas 5p35023 VersaClock 3 programmable I2C clock generator
13 The 5P35023 is a VersaClock programmable clock generator and
16 architecture design, and each PLL is individually programmable
29 …om/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-program…
/openbmc/linux/Documentation/devicetree/bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml31 live audio/video streams from the programmable logic. The Video Rendering
75 dp_live_video_in_clk is the live video clock (from Programmable
123 Connections to the programmable logic and the DisplayPort PHYs. Each port
129 description: The live video input from the programmable logic
133 description: The live graphics input from the programmable logic
137 description: The live audio input from the programmable logic
141 description: The blended video output to the programmable logic
145 description: The mixed audio output to the programmable logic
/openbmc/u-boot/drivers/pwm/
H A DKconfig17 supports a programmable period and duty cycle. A 32-bit counter is
26 programmable period and duty cycle. A 32-bit counter is used.
43 four channels with a programmable period and duty cycle. Only a
52 programmable period and duty cycle. A 16-bit counter is used.
/openbmc/linux/drivers/clk/
H A DKconfig78 tristate "Maxim 9485 Programmable Clock Generator"
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
126 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
137 This driver supports Silicon Labs 5351A/B/C programmable clock
146 This driver supports the Silicon Labs 514 programmable clock
154 This driver supports the Silicon Labs 544 programmable clock
163 This driver supports Silicon Labs 570/571/598/599 programmable
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
194 This driver supports the TI CDCE913/925/937/949 programmable clock
395 This driver supports the Renesas VersaClock 3 programmable clock
[all …]
/openbmc/u-boot/doc/
H A DREADME.atmel_pmecc1 How to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs
5 The Programmable Multibit ECC (PMECC) controller is a programmable binary
30 How to enable PMECC header for direct programmable boot.bin
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pmc.h45 u32 pck[4]; /* 0x40 Programmable Clock Register 0 - 3 */
178 #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
179 #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
180 #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
181 #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
253 #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
254 #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
255 #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
256 #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
/openbmc/linux/include/linux/clk/
H A Dat91_pmc.h30 #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
31 #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
32 #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
33 #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
34 #define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */
188 #define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
189 #define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate lengt…
204 #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
205 #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
206 #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Dpipeline.json21 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
29 …xed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters availa…
36 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
51 …ated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is c…
60 …ated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is c…
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dcontrol.hpp40 Programmable,
75 {ImplementationType::Programmable, "Programmable"},
39 Programmable, global() enumerator
/openbmc/linux/Documentation/driver-api/
H A Dptp.rst97 - 2 Time stamp external triggers, programmable polarity (opt. interrupt)
103 - 6 GPIOs programmable as inputs or outputs
119 - Programmable output periodic signals
120 - Programmable inputs can time stamp external triggers
123 …- Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk…
/openbmc/linux/Documentation/hwmon/
H A Dmlxreg-fan.rst15 FAN controller is implemented by the programmable device logic.
17 The default registers offsets set within the programmable device is as
45 device. PWM and tachometers are sensed through the on-board programmable
49 one cooling device. It could be as many instances as programmable device
H A Dlm80.rst53 triggered if the rotation speed has dropped below a programmable limit. Fan
54 readings can be divided by a programmable divider (1, 2, 4 or 8) to give
60 An alarm is triggered if the voltage has crossed a programmable minimum
H A Dlm87.rst48 triggered if the rotation speed has dropped below a programmable limit. Fan
49 readings can be divided by a programmable divider (1, 2, 4 or 8) to give
55 volts. An alarm is triggered if the voltage has crossed a programmable
H A Dlm78.rst54 triggered if the rotation speed has dropped below a programmable limit. Fan
55 readings can be divided by a programmable divider (1, 2, 4 or 8) to give
61 An alarm is triggered if the voltage has crossed a programmable minimum
H A Dgl518sm.rst50 triggered if the rotation speed has dropped below a programmable limit. In
53 Fan readings can be divided by a programmable divider (1, 2, 4 or 8) to
59 An alarm is triggered if the voltage has crossed a programmable minimum or
H A Dpm6764tr.rst27 custom configurations. The PM6764TR device features up to 4-phase programmable operation.
29 The PM6764TR supports power state transitions featuring VFDE, and programmable DPM
/openbmc/linux/drivers/fpga/
H A DKconfig161 Select this option to enable common support for Field-Programmable
208 PAC (Programmable Acceleration Card) N3000. It communicates
218 Field-Programmable Gate Array (FPGA) solutions which implement
234 to configure the programmable logic(PL) through PS
243 configure the programmable logic(PL).
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dactions,atc260x.yaml18 ATC2603C includes 3 programmable DC-DC converters, 9 programmable LDO
20 ATC2609A includes 5 programmable DC-DC converters and 10 programmable LDO
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dopp.h42 /* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */
101 /* 0x3 - Programmable control A */
103 /* 0x4 - Programmable control B */
111 /* 0x3 - Programmable control A */
113 /* 0x4 - Programmable control B */
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi_oc_tiny.txt8 - baud-width: width, in bits, of the programmable divider used to scale
12 is programmable. They are not needed if the divider is fixed.
/openbmc/linux/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml84 # CPU Supervisor with Nonvolatile Memory and Programmable I/O
200 # 5 Bit Programmable, Pulse-Width Modulator
214 # 10-bit 10 kOhm linear programmable voltage divider
216 # 10-bit 50 kOhm linear programmable voltage divider
218 # 10-bit 10 kOhm linear programmable variable resistor
220 # 10-bit 50 kOhm linear programmable variable resistor
362 # Silicon Labs SI3210 Programmable CMOS SLIC/CODEC with SPI interface
/openbmc/linux/drivers/clk/xilinx/
H A DKconfig9 processing system and programmable logic part by using the logicoreIP
27 This driver supports the Xilinx clocking wizard programmable clock
/openbmc/linux/drivers/staging/axis-fifo/
H A Daxis-fifo.txt38 - xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold
40 - xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold
46 - xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold
48 - xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold
/openbmc/linux/drivers/iio/gyro/
H A DKconfig39 ADIS16250 ADIS16255 and ADIS16251 programmable digital gyroscope sensors.
50 Say yes here to build support for Analog Devices ADXRS290 programmable
61 programmable digital output gyroscope.

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