xref: /openbmc/qemu/include/hw/nvram/bcm2835_otp.h (revision c1bf7540)
1*c1bf7540SRayhan Faizel /*
2*c1bf7540SRayhan Faizel  * BCM2835 One-Time Programmable (OTP) Memory
3*c1bf7540SRayhan Faizel  *
4*c1bf7540SRayhan Faizel  * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
5*c1bf7540SRayhan Faizel  *
6*c1bf7540SRayhan Faizel  * SPDX-License-Identifier: MIT
7*c1bf7540SRayhan Faizel  */
8*c1bf7540SRayhan Faizel 
9*c1bf7540SRayhan Faizel #ifndef BCM2835_OTP_H
10*c1bf7540SRayhan Faizel #define BCM2835_OTP_H
11*c1bf7540SRayhan Faizel 
12*c1bf7540SRayhan Faizel #include "hw/sysbus.h"
13*c1bf7540SRayhan Faizel #include "qom/object.h"
14*c1bf7540SRayhan Faizel 
15*c1bf7540SRayhan Faizel #define TYPE_BCM2835_OTP "bcm2835-otp"
16*c1bf7540SRayhan Faizel OBJECT_DECLARE_SIMPLE_TYPE(BCM2835OTPState, BCM2835_OTP)
17*c1bf7540SRayhan Faizel 
18*c1bf7540SRayhan Faizel #define BCM2835_OTP_ROW_COUNT                              66
19*c1bf7540SRayhan Faizel 
20*c1bf7540SRayhan Faizel /* https://elinux.org/BCM2835_registers#OTP */
21*c1bf7540SRayhan Faizel #define BCM2835_OTP_BOOTMODE_REG                         0x00
22*c1bf7540SRayhan Faizel #define BCM2835_OTP_CONFIG_REG                           0x04
23*c1bf7540SRayhan Faizel #define BCM2835_OTP_CTRL_LO_REG                          0x08
24*c1bf7540SRayhan Faizel #define BCM2835_OTP_CTRL_HI_REG                          0x0c
25*c1bf7540SRayhan Faizel #define BCM2835_OTP_STATUS_REG                           0x10
26*c1bf7540SRayhan Faizel #define BCM2835_OTP_BITSEL_REG                           0x14
27*c1bf7540SRayhan Faizel #define BCM2835_OTP_DATA_REG                             0x18
28*c1bf7540SRayhan Faizel #define BCM2835_OTP_ADDR_REG                             0x1c
29*c1bf7540SRayhan Faizel #define BCM2835_OTP_WRITE_DATA_READ_REG                  0x20
30*c1bf7540SRayhan Faizel #define BCM2835_OTP_INIT_STATUS_REG                      0x24
31*c1bf7540SRayhan Faizel 
32*c1bf7540SRayhan Faizel 
33*c1bf7540SRayhan Faizel /* -- Row 32: Undocumented -- */
34*c1bf7540SRayhan Faizel 
35*c1bf7540SRayhan Faizel #define BCM2835_OTP_ROW_32                                 32
36*c1bf7540SRayhan Faizel 
37*c1bf7540SRayhan Faizel /* Lock OTP Programming (Customer OTP and private key) */
38*c1bf7540SRayhan Faizel #define BCM2835_OTP_ROW_32_LOCK                        BIT(6)
39*c1bf7540SRayhan Faizel 
40*c1bf7540SRayhan Faizel /* -- Row 36-43: Customer OTP -- */
41*c1bf7540SRayhan Faizel 
42*c1bf7540SRayhan Faizel #define BCM2835_OTP_CUSTOMER_OTP                           36
43*c1bf7540SRayhan Faizel #define BCM2835_OTP_CUSTOMER_OTP_LEN                        8
44*c1bf7540SRayhan Faizel 
45*c1bf7540SRayhan Faizel /* Magic numbers to lock programming of customer OTP and private key */
46*c1bf7540SRayhan Faizel #define BCM2835_OTP_LOCK_NUM1                      0xffffffff
47*c1bf7540SRayhan Faizel #define BCM2835_OTP_LOCK_NUM2                      0xaffe0000
48*c1bf7540SRayhan Faizel 
49*c1bf7540SRayhan Faizel /* -- Row 56-63: Device-specific private key -- */
50*c1bf7540SRayhan Faizel 
51*c1bf7540SRayhan Faizel #define BCM2835_OTP_PRIVATE_KEY                            56
52*c1bf7540SRayhan Faizel #define BCM2835_OTP_PRIVATE_KEY_LEN                         8
53*c1bf7540SRayhan Faizel 
54*c1bf7540SRayhan Faizel 
55*c1bf7540SRayhan Faizel struct BCM2835OTPState {
56*c1bf7540SRayhan Faizel     /* <private> */
57*c1bf7540SRayhan Faizel     SysBusDevice parent_obj;
58*c1bf7540SRayhan Faizel 
59*c1bf7540SRayhan Faizel     /* <public> */
60*c1bf7540SRayhan Faizel     MemoryRegion iomem;
61*c1bf7540SRayhan Faizel     uint32_t otp_rows[BCM2835_OTP_ROW_COUNT];
62*c1bf7540SRayhan Faizel };
63*c1bf7540SRayhan Faizel 
64*c1bf7540SRayhan Faizel 
65*c1bf7540SRayhan Faizel uint32_t bcm2835_otp_get_row(BCM2835OTPState *s, unsigned int row);
66*c1bf7540SRayhan Faizel void bcm2835_otp_set_row(BCM2835OTPState *s, unsigned int row, uint32_t value);
67*c1bf7540SRayhan Faizel 
68*c1bf7540SRayhan Faizel #endif
69