/openbmc/u-boot/drivers/net/phy/ |
H A D | mscc.c | 274 static void vsc8584_csr_write(struct mii_dev *bus, int phy0, u16 addr, u32 val) in vsc8584_csr_write() argument 276 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18, in vsc8584_csr_write() 278 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17, in vsc8584_csr_write() 280 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in vsc8584_csr_write() 656 u16 crc, reg, phy0, addr; in vsc8574_config_pre_init() local 667 phy0 = phydev->addr + addr; in vsc8574_config_pre_init() 669 phy0 = phydev->addr - addr; in vsc8574_config_pre_init() 671 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init() 675 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS); in vsc8574_config_pre_init() 677 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS, reg); in vsc8574_config_pre_init() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | amlogic,meson-g12a-usb-ctrl.yaml | 113 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 115 - const: usb3-phy0 # USB3 PHY if USB3_0 is used 132 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 152 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 214 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
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/openbmc/linux/drivers/phy/allwinner/ |
H A D | phy-sun4i-usb.c | 80 /* A83T specific control bits for PHY0 */ 129 /* phy0 / otg related variables */ 471 /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ in sun4i_usb_phy_power_on() 503 * phy0 vbus typically slowly discharges, sometimes this causes the in sun4i_usb_phy_power_off() 574 /* Host mode. Route phy0 to EHCI/OHCI */ in sun4i_usb_phy0_reroute() 577 /* Peripheral mode. Route phy0 to MUSB */ in sun4i_usb_phy0_reroute() 587 struct phy *phy0 = data->phys[0].phy; in sun4i_usb_phy0_id_vbus_det_scan() local 592 if (!phy0) in sun4i_usb_phy0_id_vbus_det_scan() 595 phy = phy_get_drvdata(phy0); in sun4i_usb_phy0_id_vbus_det_scan() 599 mutex_lock(&phy0->mutex); in sun4i_usb_phy0_id_vbus_det_scan() [all …]
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/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/ |
H A D | stingray-usb.dtsi | 29 phy-names = "phy0", "phy1"; 39 phy-names = "phy0", "phy1"; 63 phy-names = "phy0", "phy1", "phy2"; 73 phy-names = "phy0";
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sm8450-dispcc.yaml | 30 - description: Byte clock from DSI PHY0 31 - description: Pixel clock from DSI PHY0 34 - description: Link clock from DP PHY0 35 - description: VCO DIV clock from DP PHY0
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H A D | qcom,sm8550-dispcc.yaml | 30 - description: Byte clock from DSI PHY0 31 - description: Pixel clock from DSI PHY0 34 - description: Link clock from DP PHY0 35 - description: VCO DIV clock from DP PHY0
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H A D | qcom,sm6115-dispcc.yaml | 27 - description: Byte clock from DSI PHY0 28 - description: Pixel clock from DSI PHY0
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H A D | qcom,gcc-msm8953.yaml | 27 - description: Byte clock from DSI PHY0 28 - description: Pixel clock from DSI PHY0
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | qcom-emac.txt | 48 phy-handle = <&phy0>; 52 phy0: ethernet-phy@0 { 97 phy-handle = <&phy0>; 101 phy0: ethernet-phy@4 {
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H A D | arc_emac.txt | 39 phy = <&phy0>; 43 phy0: ethernet-phy@0 {
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1028a-kontron-sl28-var1.dts | 28 phy0: ethernet-phy@4 { label 51 /* Delete the phy-handle to the old phy0 label */ 56 phy-handle = <&phy0>;
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/openbmc/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs-polarberry.dts | 41 * phy0 is connected to mac0, but the port itself is on the (optional) carrier 46 phy-handle = <&phy0>; 59 phy0: ethernet-phy@4 { label
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/openbmc/u-boot/arch/mips/dts/ |
H A D | ar933x.dtsi | 77 phy = <&phy0>; 85 phy0: ethernet-phy@0 { label 94 phy = <&phy0>;
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H A D | nexys4ddr.dts | 28 phy-handle = <&phy0>; 42 phy0: phy@1 { label
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/openbmc/u-boot/drivers/clk/uniphier/ |
H A D | clk-uniphier-sys.c | 43 UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ 58 UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 16), /* usb30-phy0 */ 61 UNIPHIER_CLK_GATE_SIMPLE(20, 0x210c, 17), /* usb31-phy0 */
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040-mcbin.dts | 20 phy0: ethernet-phy@0 { label 36 phy = <&phy0>;
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3036-evb.dts | 18 phy = <&phy0>; 29 phy0: ethernet-phy@0 { label
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/openbmc/linux/arch/arm64/boot/dts/toshiba/ |
H A D | tmpv7708-visrobo-vrb.dts | 43 phy-handle = <&phy0>; 50 phy0: ethernet-phy@1 { label
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H A D | tmpv7708-rm-mbrc.dts | 43 phy-handle = <&phy0>; 50 phy0: ethernet-phy@1 { label
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp151a-prtt1a.dts | 16 phy-handle = <&phy0>; 21 phy0: ethernet-phy@0 { label
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H A D | stm32mp151a-prtt1s.dts | 16 phy-handle = <&phy0>; 55 phy0: ethernet-phy@0 { label
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | cat875.dtsi | 20 phy-handle = <&phy0>; 24 phy0: ethernet-phy@0 { label
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/openbmc/linux/drivers/staging/media/max96712/ |
H A D | max96712.c | 133 /* Configure a 3-lane C-PHY using PHY0 and PHY1. */ in max96712_mipi_configure() 140 /* Configure a 4-lane D-PHY using PHY0 and PHY1. */ in max96712_mipi_configure() 144 /* Configure lane mapping for PHY0 and PHY1. */ in max96712_mipi_configure() 148 /* Configure lane polarity for PHY0 and PHY1. */ in max96712_mipi_configure() 154 /* Set link frequency for PHY0 and PHY1. */ in max96712_mipi_configure() 160 /* Enable PHY0 and PHY1 */ in max96712_mipi_configure()
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/openbmc/u-boot/arch/arm/dts/ |
H A D | mt7629-rfb.dts | 29 phy-handle = <&phy0>; 31 phy0: ethernet-phy@0 { label
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/openbmc/linux/arch/arm/boot/dts/intel/ixp/ |
H A D | intel-ixp42x-ixdp425.dts | 47 phy-handle = <&phy0>; 53 phy0: ethernet-phy@0 { label
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