Lines Matching full:phy0
274 static void vsc8584_csr_write(struct mii_dev *bus, int phy0, u16 addr, u32 val) in vsc8584_csr_write() argument
276 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18, in vsc8584_csr_write()
278 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17, in vsc8584_csr_write()
280 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, in vsc8584_csr_write()
656 u16 crc, reg, phy0, addr; in vsc8574_config_pre_init() local
667 phy0 = phydev->addr + addr; in vsc8574_config_pre_init()
669 phy0 = phydev->addr - addr; in vsc8574_config_pre_init()
671 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
675 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS); in vsc8574_config_pre_init()
677 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS, reg); in vsc8574_config_pre_init()
685 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_2, 0x0040); in vsc8574_config_pre_init()
687 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
690 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_20, 0x4320); in vsc8574_config_pre_init()
691 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_24, 0x0c00); in vsc8574_config_pre_init()
692 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_9, 0x18ca); in vsc8574_config_pre_init()
693 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_5, 0x1b20); in vsc8574_config_pre_init()
695 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8); in vsc8574_config_pre_init()
697 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8, reg); in vsc8574_config_pre_init()
699 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
702 vsc8584_csr_write(bus, phy0, 0x0fae, 0x000401bd); in vsc8574_config_pre_init()
703 vsc8584_csr_write(bus, phy0, 0x0fac, 0x000f000f); in vsc8574_config_pre_init()
704 vsc8584_csr_write(bus, phy0, 0x17a0, 0x00a0f147); in vsc8574_config_pre_init()
705 vsc8584_csr_write(bus, phy0, 0x0fe4, 0x00052f54); in vsc8574_config_pre_init()
706 vsc8584_csr_write(bus, phy0, 0x1792, 0x0027303d); in vsc8574_config_pre_init()
707 vsc8584_csr_write(bus, phy0, 0x07fe, 0x00000704); in vsc8574_config_pre_init()
708 vsc8584_csr_write(bus, phy0, 0x0fe0, 0x00060150); in vsc8574_config_pre_init()
709 vsc8584_csr_write(bus, phy0, 0x0f82, 0x0012b00a); in vsc8574_config_pre_init()
710 vsc8584_csr_write(bus, phy0, 0x0f80, 0x00000d74); in vsc8574_config_pre_init()
711 vsc8584_csr_write(bus, phy0, 0x02e0, 0x00000012); in vsc8574_config_pre_init()
712 vsc8584_csr_write(bus, phy0, 0x03a2, 0x00050208); in vsc8574_config_pre_init()
713 vsc8584_csr_write(bus, phy0, 0x03b2, 0x00009186); in vsc8574_config_pre_init()
714 vsc8584_csr_write(bus, phy0, 0x0fb0, 0x000e3700); in vsc8574_config_pre_init()
715 vsc8584_csr_write(bus, phy0, 0x1688, 0x00049f81); in vsc8574_config_pre_init()
716 vsc8584_csr_write(bus, phy0, 0x0fd2, 0x0000ffff); in vsc8574_config_pre_init()
717 vsc8584_csr_write(bus, phy0, 0x168a, 0x00039fa2); in vsc8574_config_pre_init()
718 vsc8584_csr_write(bus, phy0, 0x1690, 0x0020640b); in vsc8574_config_pre_init()
719 vsc8584_csr_write(bus, phy0, 0x0258, 0x00002220); in vsc8574_config_pre_init()
720 vsc8584_csr_write(bus, phy0, 0x025a, 0x00002a20); in vsc8574_config_pre_init()
721 vsc8584_csr_write(bus, phy0, 0x025c, 0x00003060); in vsc8574_config_pre_init()
722 vsc8584_csr_write(bus, phy0, 0x025e, 0x00003fa0); in vsc8574_config_pre_init()
723 vsc8584_csr_write(bus, phy0, 0x03a6, 0x0000e0f0); in vsc8574_config_pre_init()
724 vsc8584_csr_write(bus, phy0, 0x0f92, 0x00001489); in vsc8574_config_pre_init()
725 vsc8584_csr_write(bus, phy0, 0x16a2, 0x00007000); in vsc8574_config_pre_init()
726 vsc8584_csr_write(bus, phy0, 0x16a6, 0x00071448); in vsc8574_config_pre_init()
727 vsc8584_csr_write(bus, phy0, 0x16a0, 0x00eeffdd); in vsc8574_config_pre_init()
728 vsc8584_csr_write(bus, phy0, 0x0fe8, 0x0091b06c); in vsc8574_config_pre_init()
729 vsc8584_csr_write(bus, phy0, 0x0fea, 0x00041600); in vsc8574_config_pre_init()
730 vsc8584_csr_write(bus, phy0, 0x16b0, 0x00eeff00); in vsc8574_config_pre_init()
731 vsc8584_csr_write(bus, phy0, 0x16b2, 0x00007000); in vsc8574_config_pre_init()
732 vsc8584_csr_write(bus, phy0, 0x16b4, 0x00000814); in vsc8574_config_pre_init()
733 vsc8584_csr_write(bus, phy0, 0x0f90, 0x00688980); in vsc8574_config_pre_init()
734 vsc8584_csr_write(bus, phy0, 0x03a4, 0x0000d8f0); in vsc8574_config_pre_init()
735 vsc8584_csr_write(bus, phy0, 0x0fc0, 0x00000400); in vsc8574_config_pre_init()
736 vsc8584_csr_write(bus, phy0, 0x07fa, 0x0050100f); in vsc8574_config_pre_init()
737 vsc8584_csr_write(bus, phy0, 0x0796, 0x00000003); in vsc8574_config_pre_init()
738 vsc8584_csr_write(bus, phy0, 0x07f8, 0x00c3ff98); in vsc8574_config_pre_init()
739 vsc8584_csr_write(bus, phy0, 0x0fa4, 0x0018292a); in vsc8574_config_pre_init()
740 vsc8584_csr_write(bus, phy0, 0x168c, 0x00d2c46f); in vsc8574_config_pre_init()
741 vsc8584_csr_write(bus, phy0, 0x17a2, 0x00000620); in vsc8574_config_pre_init()
742 vsc8584_csr_write(bus, phy0, 0x16a4, 0x0013132f); in vsc8574_config_pre_init()
743 vsc8584_csr_write(bus, phy0, 0x16a8, 0x00000000); in vsc8574_config_pre_init()
744 vsc8584_csr_write(bus, phy0, 0x0ffc, 0x00c0a028); in vsc8574_config_pre_init()
745 vsc8584_csr_write(bus, phy0, 0x0fec, 0x00901c09); in vsc8574_config_pre_init()
746 vsc8584_csr_write(bus, phy0, 0x0fee, 0x0004a6a1); in vsc8574_config_pre_init()
747 vsc8584_csr_write(bus, phy0, 0x0ffe, 0x00b01807); in vsc8574_config_pre_init()
749 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
752 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_CU_PMD_TX_CNTL, 0x028e); in vsc8574_config_pre_init()
754 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
757 vsc8584_csr_write(bus, phy0, 0x0486, 0x0008a518); in vsc8574_config_pre_init()
758 vsc8584_csr_write(bus, phy0, 0x0488, 0x006dc696); in vsc8574_config_pre_init()
759 vsc8584_csr_write(bus, phy0, 0x048a, 0x00000912); in vsc8574_config_pre_init()
760 vsc8584_csr_write(bus, phy0, 0x048e, 0x00000db6); in vsc8574_config_pre_init()
761 vsc8584_csr_write(bus, phy0, 0x049c, 0x00596596); in vsc8574_config_pre_init()
762 vsc8584_csr_write(bus, phy0, 0x049e, 0x00000514); in vsc8574_config_pre_init()
763 vsc8584_csr_write(bus, phy0, 0x04a2, 0x00410280); in vsc8574_config_pre_init()
764 vsc8584_csr_write(bus, phy0, 0x04a4, 0x00000000); in vsc8574_config_pre_init()
765 vsc8584_csr_write(bus, phy0, 0x04a6, 0x00000000); in vsc8574_config_pre_init()
766 vsc8584_csr_write(bus, phy0, 0x04a8, 0x00000000); in vsc8574_config_pre_init()
767 vsc8584_csr_write(bus, phy0, 0x04aa, 0x00000000); in vsc8574_config_pre_init()
768 vsc8584_csr_write(bus, phy0, 0x04ae, 0x007df7dd); in vsc8574_config_pre_init()
769 vsc8584_csr_write(bus, phy0, 0x04b0, 0x006d95d4); in vsc8574_config_pre_init()
770 vsc8584_csr_write(bus, phy0, 0x04b2, 0x00492410); in vsc8574_config_pre_init()
772 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
775 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8); in vsc8574_config_pre_init()
777 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8, reg); in vsc8574_config_pre_init()
779 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
783 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS); in vsc8574_config_pre_init()
785 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS, reg); in vsc8574_config_pre_init()
787 ret = vsc8584_get_fw_crc(bus, phy0, in vsc8574_config_pre_init()
795 serdes_init = vsc8574_is_serdes_init(bus, phy0); in vsc8574_config_pre_init()
798 ret = vsc8584_micro_assert_reset(bus, phy0); in vsc8574_config_pre_init()
809 if (vsc8584_patch_fw(bus, phy0, fw_patch_vsc8574, in vsc8574_config_pre_init()
815 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
818 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_TRAP_ROM_ADDR(1), in vsc8574_config_pre_init()
820 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PATCH_RAM_ADDR(1), in vsc8574_config_pre_init()
823 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_INT_MEM_CNTL, in vsc8574_config_pre_init()
826 vsc8584_micro_deassert_reset(bus, phy0, false); in vsc8574_config_pre_init()
828 ret = vsc8584_get_fw_crc(bus, phy0, in vsc8574_config_pre_init()
839 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
842 ret = vsc8584_cmd(bus, phy0, PROC_CMD_1588_DEFAULT_INIT | in vsc8574_config_pre_init()
846 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8574_config_pre_init()
855 u16 reg, crc, phy0, addr; in vsc8584_config_pre_init() local
870 phy0 = phydev->addr + addr; in vsc8584_config_pre_init()
872 phy0 = phydev->addr - addr; in vsc8584_config_pre_init()
874 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
878 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS); in vsc8584_config_pre_init()
880 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS, reg); in vsc8584_config_pre_init()
888 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_BYPASS_CONTROL); in vsc8584_config_pre_init()
890 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_BYPASS_CONTROL, reg); in vsc8584_config_pre_init()
892 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
895 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_SERDES_TX_CRC_ERR_CNT, in vsc8584_config_pre_init()
898 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
901 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_5, 0x1f20); in vsc8584_config_pre_init()
903 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8); in vsc8584_config_pre_init()
905 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8, reg); in vsc8584_config_pre_init()
907 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
910 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, 0xafa4); in vsc8584_config_pre_init()
912 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18); in vsc8584_config_pre_init()
915 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18, reg); in vsc8584_config_pre_init()
917 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_ADDR_16, 0x8fa4); in vsc8584_config_pre_init()
919 vsc8584_csr_write(bus, phy0, 0x07fa, 0x0050100f); in vsc8584_config_pre_init()
920 vsc8584_csr_write(bus, phy0, 0x1688, 0x00049f81); in vsc8584_config_pre_init()
921 vsc8584_csr_write(bus, phy0, 0x0f90, 0x00688980); in vsc8584_config_pre_init()
922 vsc8584_csr_write(bus, phy0, 0x03a4, 0x0000d8f0); in vsc8584_config_pre_init()
923 vsc8584_csr_write(bus, phy0, 0x0fc0, 0x00000400); in vsc8584_config_pre_init()
924 vsc8584_csr_write(bus, phy0, 0x0f82, 0x0012b002); in vsc8584_config_pre_init()
925 vsc8584_csr_write(bus, phy0, 0x1686, 0x00000004); in vsc8584_config_pre_init()
926 vsc8584_csr_write(bus, phy0, 0x168c, 0x00d2c46f); in vsc8584_config_pre_init()
927 vsc8584_csr_write(bus, phy0, 0x17a2, 0x00000620); in vsc8584_config_pre_init()
928 vsc8584_csr_write(bus, phy0, 0x16a0, 0x00eeffdd); in vsc8584_config_pre_init()
929 vsc8584_csr_write(bus, phy0, 0x16a6, 0x00071448); in vsc8584_config_pre_init()
930 vsc8584_csr_write(bus, phy0, 0x16a4, 0x0013132f); in vsc8584_config_pre_init()
931 vsc8584_csr_write(bus, phy0, 0x16a8, 0x00000000); in vsc8584_config_pre_init()
932 vsc8584_csr_write(bus, phy0, 0x0ffc, 0x00c0a028); in vsc8584_config_pre_init()
933 vsc8584_csr_write(bus, phy0, 0x0fe8, 0x0091b06c); in vsc8584_config_pre_init()
934 vsc8584_csr_write(bus, phy0, 0x0fea, 0x00041600); in vsc8584_config_pre_init()
935 vsc8584_csr_write(bus, phy0, 0x0f80, 0x00fffaff); in vsc8584_config_pre_init()
936 vsc8584_csr_write(bus, phy0, 0x0fec, 0x00901809); in vsc8584_config_pre_init()
937 vsc8584_csr_write(bus, phy0, 0x0ffe, 0x00b01007); in vsc8584_config_pre_init()
938 vsc8584_csr_write(bus, phy0, 0x16b0, 0x00eeff00); in vsc8584_config_pre_init()
939 vsc8584_csr_write(bus, phy0, 0x16b2, 0x00007000); in vsc8584_config_pre_init()
940 vsc8584_csr_write(bus, phy0, 0x16b4, 0x00000814); in vsc8584_config_pre_init()
942 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
945 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_CU_PMD_TX_CNTL, 0x028e); in vsc8584_config_pre_init()
947 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
950 vsc8584_csr_write(bus, phy0, 0x0486, 0x0008a518); in vsc8584_config_pre_init()
951 vsc8584_csr_write(bus, phy0, 0x0488, 0x006dc696); in vsc8584_config_pre_init()
952 vsc8584_csr_write(bus, phy0, 0x048a, 0x00000912); in vsc8584_config_pre_init()
954 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
957 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8); in vsc8584_config_pre_init()
959 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_TEST_PAGE_8, reg); in vsc8584_config_pre_init()
961 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()
965 reg = bus->read(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS); in vsc8584_config_pre_init()
967 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_PHY_EXT_CNTL_STATUS, reg); in vsc8584_config_pre_init()
969 ret = vsc8584_get_fw_crc(bus, phy0, in vsc8584_config_pre_init()
978 if (vsc8584_patch_fw(bus, phy0, fw_patch_vsc8584, in vsc8584_config_pre_init()
983 vsc8584_micro_deassert_reset(bus, phy0, false); in vsc8584_config_pre_init()
985 ret = vsc8584_get_fw_crc(bus, phy0, in vsc8584_config_pre_init()
995 ret = vsc8584_micro_assert_reset(bus, phy0); in vsc8584_config_pre_init()
999 vsc8584_micro_deassert_reset(bus, phy0, true); in vsc8584_config_pre_init()
1002 bus->write(bus, phy0, MDIO_DEVAD_NONE, MSCC_EXT_PAGE_ACCESS, in vsc8584_config_pre_init()