| /openbmc/u-boot/arch/arm/dts/ |
| H A D | st-pincfg.h | 28 /* User-frendly defines for Pin Direction */ 48 * single-edge data non inverted clock, retime data with clk 53 * single-edge data inverted clock, retime data with clk 58 * double-edge data, retime data with clk 62 * CIV0, CIV1 modes with inverted clock 67 * CLK0, CLK1 modes with non-inverted clock
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| H A D | sun8i-a23-polaroid-mid2407pxe03.dts | 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun8i-a23.dtsi" 45 #include "sun8i-reference-design-tablet.dtsi" 49 compatible = "polaroid,mid2407pxe03", "allwinner,sun8i-a23"; 56 compatible = "mmc-pwrseq-simple"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&wifi_pwrseq_pin_mid2407>; 59 reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */ 60 /* The esp8089 needs 200 ms after driving wifi-en high */ [all …]
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| H A D | sun8i-a33-ga10h-v1.1.dts | 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun8i-a33.dtsi" 45 #include "sun8i-reference-design-tablet.dtsi" 49 compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33"; 52 /* Make u-boot set mac-address for rtl8703as (no eeprom) */ 64 firmware-name = "gsl3675-ga10h.fw"; 65 touchscreen-size-x = <1630>; 66 touchscreen-size-y = <990>; 67 touchscreen-inverted-y; [all …]
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| H A D | meson-gxl-s905x-p212.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on meson-gx-p23x-q20x.dtsi: 5 * - Copyright (c) 2016 Endless Computers, Inc. 7 * - Copyright (c) 2016 BayLibre, SAS. 13 #include "meson-gxl-s905x.dtsi" 23 stdout-path = "serial0:115200n8"; 31 hdmi_5v: regulator-hdmi-5v { 32 compatible = "regulator-fixed"; 34 regulator-name = "HDMI_5V"; 35 regulator-min-microvolt = <5000000>; [all …]
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| H A D | sunxi-libretech-all-h3-cc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 16 stdout-path = "serial0:115200n8"; 20 compatible = "gpio-leds"; 25 default-state = "on"; 35 compatible = "gpio-keys"; 45 compatible = "regulator-fixed"; 46 regulator-name = "vcc1v2"; [all …]
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| H A D | sun5i-a13-utoo-p66.dts | 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun5i-a13.dtsi" 45 #include "sun5i-reference-design-tablet.dtsi" 46 #include <dt-bindings/interrupt-controller/irq.h> 50 compatible = "utoo,p66", "allwinner,sun5i-a13"; 54 /delete-property/serial0; 58 /delete-property/stdout-path; 63 compatible = "i2c-gpio"; 64 pinctrl-names = "default"; [all …]
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| H A D | sun8i-r40-bananapi-m2-ultra.dts | 2 * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> 5 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 45 #include "sun8i-r40.dtsi" 47 #include <dt-bindings/gpio/gpio.h> 50 model = "Banana Pi BPI-M2-Ultra"; 51 compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40"; 59 stdout-path = "serial0:115200n8"; 63 compatible = "gpio-leds"; 65 pwr-led { [all …]
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| H A D | meson-gxl-s905x-libretech-cc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 12 #include "meson-gxl-s905x.dtsi" 15 compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl"; 16 model = "Libre Computer Board AML-S905X-CC"; 24 stdout-path = "serial0:115200n8"; 27 cvbs-connector { 28 compatible = "composite-video-connector"; 32 remote-endpoint = <&cvbs_vdac_out>; [all …]
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| H A D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; 20 stdout-path = "serial0:115200n8"; 29 compatible = "gpio-leds"; 32 label = "nanopi-k2:blue:stat"; 34 default-state = "on"; 35 panic-indicator; [all …]
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| H A D | meson-gxm-khadas-vim2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "meson-gxm.dtsi" 16 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; 26 stdout-path = "serial0:115200n8"; 34 adc-keys { 35 compatible = "adc-keys"; 36 io-channels = <&saradc 0>; [all …]
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| H A D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 15 model = "Hardkernel ODROID-C2"; 23 stdout-path = "serial0:115200n8"; 31 usb_otg_pwr: regulator-usb-pwrs { 32 compatible = "regulator-fixed"; 34 regulator-name = "USB_OTG_PWR"; [all …]
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| /openbmc/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra186-gpio.txt | 42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h> 43 describes the port-level mapping. In that file, the naming convention for ports 52 both the overall controller HW module and the sets-of-ports as "controllers". 56 interrupt signals generated by a set-of-ports. The intent is for each generated 59 per-port-set signals is reported via a separate register. Thus, a driver needs 66 - compatible 69 - "nvidia,tegra186-gpio". 70 - "nvidia,tegra186-gpio-aon". 71 - reg-names 75 - "gpio": Mandatory. GPIO control registers. This may cover either: [all …]
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| H A D | gpio.txt | 5 ----------------- 8 properties, each containing a 'gpio-list': 10 gpio-list ::= <single-gpio> [gpio-list] 11 single-gpio ::= <gpio-phandle> <gpio-specifier> 12 gpio-phandle : phandle to gpio controller node 13 gpio-specifier : Array of #gpio-cells specifying specific gpio 16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 17 of this GPIO for the device. While a non-existent <name> is considered valid 31 and bit-banged data signals: 34 gpio-controller [all …]
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | sunxi_mmc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * (C) Copyright 2007-2011 22 #include <asm-generic/gpio.h> 40 int cd_inverted; /* Inverted Card Detect */ 60 return -EINVAL; in sunxi_mmc_getcd_gpio() 73 priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE; in mmc_resource_init() 74 priv->mclkreg = &ccm->sd0_clk_cfg; in mmc_resource_init() 77 priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE; in mmc_resource_init() 78 priv->mclkreg = &ccm->sd1_clk_cfg; in mmc_resource_init() 81 priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE; in mmc_resource_init() [all …]
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | nand_ecc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com) 32 * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(), 38 * Pre-calculated 256-way 1 byte column parity 60 * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256-byte block 76 /* Get CP0 - CP5 from table */ in nand_calculate_ecc() 87 /* Create non-inverted ECC code from line parity */ in nand_calculate_ecc() 88 tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */ in nand_calculate_ecc() 89 tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */ in nand_calculate_ecc() 90 tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */ in nand_calculate_ecc() [all …]
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| H A D | nand_util.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2006 by Weiss-Electronic GmbH. 10 * @references: borrowed heavily from Linux mtd-utils code: 16 * Artem Bityutskiy <dedekind1@gmail.com> from mtd-utils 41 * nand_erase_opts: - erase NAND flash with support for various options 58 int percent_complete = -1; in nand_erase_opts() 59 const char *mtd_device = mtd->name; in nand_erase_opts() 63 if ((opts->offset & (mtd->erasesize - 1)) != 0) { in nand_erase_opts() 64 printf("Attempt to erase non block-aligned data\n"); in nand_erase_opts() 65 return -1; in nand_erase_opts() [all …]
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | hvx_misc.c | 2 * Copyright(c) 2021-2024 Qualcomm Innovation Center, Inc. All Rights Reserved. 198 "if (!q0) vmem(%2) = v5\n\t" /* Inverted test */ in test_masked_store() 207 "if (q0) vmem(%2) = v5\n\t" /* Non-inverted test */ in test_masked_store() 284 /* The first two vectors come from the vadd-pair instruction */ in test_max_temps() 294 /* The fourth vector comes from the vadd-single instruction */ in test_max_temps() 310 TEST_VEC_OP2(vsub_w, vsub, .w, w, 4, -) 311 TEST_VEC_OP2(vsub_h, vsub, .h, h, 2, -) 312 TEST_VEC_OP2(vsub_b, vsub, .b, b, 1, -) 359 * w - x < 0 in test_vsubuwsat_dv() 360 * y - z < 0 in test_vsubuwsat_dv()
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| /openbmc/libbej/src/ |
| H A D | bej_decoder_json.cpp | 22 * @param[in] params - a valid BejJsonParam struct. 23 * @param[in] propertyName - a NULL terminated string. 32 if (!(*params->isPrevAnnotated)) in addPropertyNameToOutput() 34 params->output->push_back('\"'); in addPropertyNameToOutput() 36 params->output->append(propertyName); in addPropertyNameToOutput() 37 params->output->append("\":"); in addPropertyNameToOutput() 43 * @param[in] propertyName - a NULL terminated string. 44 * @param[in] dataPtr - pointing to a valid BejJsonParam struct. 52 params->output->push_back('{'); in callbackSetStart() 53 *params->isPrevAnnotated = false; in callbackSetStart() [all …]
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | hte.c | 1 // SPDX-License-Identifier: Intel 18 * (per-bit or full byte lane). 73 * Execute a basic single-cache-line memory write/read/verify test using simple 81 * assumed configuration is done and we just re-run the test 125 * Examine a single-cache-line memory with write/read/verify test using multiple 126 * data patterns (victim-aggressor algorithm). 135 * @victim_bit: should be 0 as auto-rotate feature is in use 137 * assumed configuration is done and we just re-run the test 225 msg_port_write(HTE, 0x00020022, (mrc_params->mem_size >> 6) - 1); in hte_mem_init() 240 /* Write/read then write/read with inverted pattern */ in hte_mem_init() [all …]
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| /openbmc/openbmc/poky/bitbake/lib/bs4/builder/ |
| H A D | _lxml.py | 47 NAME = "lxml-xml" 86 tracked. Un-prefixed namespaces are not tracked. 92 # don't track un-prefixed namespaces. Soupselect will 93 # treat an un-prefixed namespace as the default, which 142 # Split the namespace URL out of a fully-qualified lxml tag 162 :param markup: Some markup -- hopefully a bytestring. 169 :yield: A series of 4-tuples: 173 Each 4-tuple represents a strategy for converting the 200 # No, apparently not. Convert the Unicode to UTF-8 and 201 # tell lxml to parse it as UTF-8. [all …]
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| /openbmc/u-boot/board/davinci/da8xxevm/ |
| H A D | da850evm.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 20 #include <asm/ti-common/davinci_nand.h> 27 #include <asm/mach-types.h> 50 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) 88 printf("Error - unable to probe SPI flash.\n"); in get_mac_addr() 89 return -1; in get_mac_addr() 94 printf("Error - unable to read MAC address from SPI flash.\n"); in get_mac_addr() 95 return -1; in get_mac_addr() 108 mdstat = &psc_regs->psc0.mdstat[id]; in dsp_lpsc_on() [all …]
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| /openbmc/u-boot/include/ |
| H A D | SA-1100.h | 2 * FILE SA-1100.h 8 * System StrongARM SA-1100 11 * SA-1100 microprocessor (Advanced RISC Machine (ARM) 13 * StrongARM SA-1100 data sheet version 2.2. 15 * Language-specific definitions are selected by the 33 #include <asm/arch-sa1100/bitfield.h> 195 * Controller (UDC) Control/Status register end-point 0 198 * Controller (UDC) Control/Status register end-point 1 201 * Controller (UDC) Control/Status register end-point 2 204 * Controller (UDC) Data register end-point 0 [all …]
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| /openbmc/u-boot/cmd/ |
| H A D | mem.c | 1 // SPDX-License-Identifier: GPL-2.0+ 150 while (count-- > 0) { in do_mem_mw() 185 /* check for ctrl-c to abort... */ in do_mem_mdc() 212 /* check for ctrl-c to abort... */ in do_mem_mwc() 275 ulong offset = buf1 - base; in do_mem_cmp() 430 while (i-- > 0) in do_mem_loop() 439 while (i-- > 0) in do_mem_loop() 447 while (i-- > 0) in do_mem_loop() 454 while (i-- > 0) in do_mem_loop() 538 while (i-- > 0) in do_mem_loopw() [all …]
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| /openbmc/u-boot/arch/arm/mach-sunxi/ |
| H A D | Kconfig | 4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64 87 ---help--- 100 ---help--- 102 as the original A10 (mach-sun4i). 106 ---help--- 113 ---help--- 116 not have official open-source DRAM initialization code, but can 122 ---help--- 124 have only 16-bit memory buswidth. 128 ---help--- [all …]
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| /openbmc/u-boot/common/ |
| H A D | dlmalloc.src | 1 /* ---------- To make a malloc.h, start cutting here ------------ */ 16 This is not the fastest, most space-conserving, most portable, or 18 while also being among the most space-conserving, portable and tunable. 19 Consistent balance across these factors results in a good general-purpose 20 allocator. For a high-level description, see 38 size argument of zero (re)allocates a minimum-sized chunk. 48 Equivalent to valloc(minimum-page-that-holds(n)), that is, 56 Release all but pad bytes of freed top-most memory back 72 Alignment: 8-byte 77 Code for 8-byte pointers is untested by me but has worked [all …]
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