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/openbmc/linux/drivers/media/platform/nxp/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 comment "NXP media platform drivers"
8 tristate "NXP CSI Bridge driver"
17 Driver for the NXP Camera Sensor Interface (CSI) Bridge. This device
18 is found in the i.MX6UL/L, i.MX7 and i.MX8M[MQ] SoCs.
21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver"
28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
32 tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
39 Video4Linux2 sub-device driver for the MIPI CSI-2 CSIS receiver
40 v3.3/v3.6.3 found on some i.MX7 and i.MX8 SoCs.
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio-pcf857x.txt1 * PCF857x-compatible I/O expanders
3 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
4 driven high by a pull-up current source or driven low to ground. This combines
14 - compatible: should be one of the following.
15 - "maxim,max7328": For the Maxim MAX7378
16 - "maxim,max7329": For the Maxim MAX7329
17 - "nxp,pca8574": For the NXP PCA8574
18 - "nxp,pca8575": For the NXP PCA8575
19 - "nxp,pca9670": For the NXP PCA9670
20 - "nxp,pca9671": For the NXP PCA9671
[all …]
/openbmc/linux/sound/soc/sof/imx/
H A DKconfig1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
4 bool "SOF support for NXP i.MX audio DSPs"
8 This adds support for Sound Open Firmware for NXP i.MX platforms.
22 This option is not user-selectable but automagically handled by
26 tristate "SOF support for i.MX8"
31 This adds support for Sound Open Firmware for NXP i.MX8 platforms.
36 tristate "SOF support for i.MX8M"
40 This adds support for Sound Open Firmware for NXP i.MX8M platforms.
45 tristate "SOF support for i.MX8ULP"
49 This adds support for Sound Open Firmware for NXP i.MX8ULP platforms.
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-jpeg.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX8QXP/QM JPEG decoder/encoder
10 - Mirela Rabulea <mirela.rabulea@nxp.com>
12 description: |-
14 ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline
20 - items:
22 - nxp,imx8qxp-jpgdec
[all …]
H A Damphion,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
16 on NXP i.MX8Q SoCs.
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
25 - nxp,imx8qm-vpu
[all …]
H A Dnxp,imx8mq-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
19 - const: nxp,imx8mq-vpu
21 - const: nxp,imx8mq-vpu-g1
22 - const: nxp,imx8mq-vpu-g2
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dnxp,pcf8575.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
25 - maxim,max7328
26 - maxim,max7329
[all …]
/openbmc/u-boot/drivers/i2c/
H A DKconfig23 Enable old-style I2C functions for compatibility with existing code.
41 ---help---
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
57 behaviour similar to old (i.e. pre DM) I2C bus driver.
71 configuration is given by the device tree. Kernel-style device tree
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
82 i2c-gpio driver unless your system can cope with this limitation.
83 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
141 Only single master mode is supported and only byte-by-byte
[all …]
/openbmc/linux/sound/soc/fsl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 This option is only useful for out-of-tree drivers since
15 in-tree drivers select it automatically.
26 This option is only useful for out-of-tree drivers since
27 in-tree drivers select it automatically.
36 This option is only useful for out-of-tree drivers since
37 in-tree drivers select it automatically.
44 support for the NXP iMX CPUs.
54 This option is only useful for out-of-tree drivers since
55 in-tree drivers select it automatically.
[all …]
/openbmc/linux/drivers/phy/freescale/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "Freescale i.MX8M USB3 PHY"
18 on NXP's i.MX8qm SoC.
28 on NXP's i.MX8 family of SOCs.
31 tristate "Freescale i.MX8M PCIE PHY"
36 i.MX8M family of SOCs.
47 found on NXP's Layerscape platforms such as LX2160A.
/openbmc/linux/drivers/nvmem/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
61 using I/O mapping.
64 tristate "i.MX IC Identification Module support"
68 i.MX SoCs, providing access to 4 Kbits of programmable
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
[all …]
/openbmc/u-boot/board/freescale/mx6memcal/
H A DREADME1 mx6memcal - a tool for calibrating DDR on i.MX6 boards.
3 The mx6memcal board isn't a real board, but a tool for use in bring-up of
4 new i.MX6 board designs.
6 It provides a similar function to the tool from NXP([1]) with a number
9 1. It's open-source, so it's easier to change if needed.
14 The NXP tool requires either a cumbersome JTAG connection that
15 makes running the DDR very slow or a working U-Boot image that
16 suffers from a chicken-and-egg problem (i.e. where do you get the
17 DDR parameters for U-Boot?).
26 produce output in a form usable in a DCD-style .cfg file.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dnxp,dwmac-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8/9 DWMAC glue layer
10 - Clark Wang <xiaoning.wang@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - NXP Linux Team <linux-imx@nxp.com>
20 - nxp,imx8mp-dwmac-eqos
21 - nxp,imx8dxl-dwmac-eqos
[all …]
/openbmc/linux/drivers/leds/
H A Dleds-pca995x.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2022 NXP
23 /* Auto-increment disabled. Normal mode */
81 struct pca995x_chip *chip = led->chip; in pca995x_brightness_set()
82 const struct pca995x_chipdef *chipdef = chip->chipdef; in pca995x_brightness_set()
86 pwmout_addr = chipdef->pwm_base + led->led_no; in pca995x_brightness_set()
87 ledout_addr = PCA995X_LEDOUT0 + (led->led_no / PCA995X_OUTPUTS_PER_REG); in pca995x_brightness_set()
88 shift = PCA995X_LDRX_BITS * (led->led_no % PCA995X_OUTPUTS_PER_REG); in pca995x_brightness_set()
92 return regmap_update_bits(chip->regmap, ledout_addr, in pca995x_brightness_set()
96 return regmap_update_bits(chip->regmap, ledout_addr, in pca995x_brightness_set()
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/bcu/
H A Dbcu_1.1.100.bb1 SUMMARY = "NXP Board Control Utilities"
2 DESCRIPTION = "The NXP Board Control Utilities are able to control various \
3 features of NXP i.MX evaluation boards (EVK) from a host \
7 HOMEPAGE = "https://github.com/nxp-imx/bcu"
9 LICENSE = "BSD-3-Clause"
12 SRC_URI = "git://github.com/nxp-imx/bcu;protocol=https;branch=master \
13 file://0001-CMakeLists-do-not-use-vendored-libcurl.patch \
/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dnxp,pca953x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/nxp,pca953x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA9532 LED Dimmer
10 - Riku Voipio <riku.voipio@iki.fi>
13 The PCA9532 family is SMBus I/O expander optimized for dimming LEDs.
17 https://www.nxp.com/docs/en/data-sheet/PCA9532.pdf
22 - nxp,pca9530
23 - nxp,pca9531
[all …]
/openbmc/u-boot/arch/arm/mach-imx/
H A DKconfig17 bool "i.MX Resource domain controller driver"
20 i.MX Resource domain controller is used to assign masters
34 i.MX6/7 supports DCD and Plugin. Enable this configuration
38 bool "Support i.MX HAB features"
56 on U-Boot. Using the reset button or running bmode normal
58 supports i.MX53 and i.MX6.
75 bool "Read NXP board revision from fuses"
78 NXP boards based on i.MX6/7 contain the board revision information
83 bool "Enable DDRMC (DDR3) on-chip calibration"
86 Vybrid (vf610) SoC provides some on-chip facility to tune the DDR3
[all …]
/openbmc/linux/drivers/firmware/imx/
H A Dimx-dsp.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019 NXP
4 * Author: Daniel Baluta <daniel.baluta@nxp.com>
17 * imx_dsp_ring_doorbell - triggers an interrupt on the other side (DSP)
22 * Returns non-negative value for success, negative value for error
30 return -EINVAL; in imx_dsp_ring_doorbell()
32 dsp_chan = &ipc->chans[idx]; in imx_dsp_ring_doorbell()
33 ret = mbox_send_message(dsp_chan->ch, NULL); in imx_dsp_ring_doorbell()
42 * imx_dsp_handle_rx - rx callback used by imx mailbox
54 if (chan->idx == 0) { in imx_dsp_handle_rx()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
126 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
138 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in pca953x_acpi_get_irq()
152 * relative. Since first controller (gpio-sch.c) and
153 * second (gpio-dwapb.c) are at the fixed bases, we may
175 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
226 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); in pca953x_bank_shift()
248 * - Standard set, below 0x40, each port can be replicated up to 8 times
249 * - PCA953x standard
[all …]
H A Dgpio-pcf857x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
39 { .compatible = "nxp,pcf8574", (void *)8 },
40 { .compatible = "nxp,pcf8574a", (void *)8 },
41 { .compatible = "nxp,pca8574", (void *)8 },
42 { .compatible = "nxp,pca9670", (void *)8 },
43 { .compatible = "nxp,pca9672", (void *)8 },
44 { .compatible = "nxp,pca9674", (void *)8 },
45 { .compatible = "nxp,pcf8575", (void *)16 },
46 { .compatible = "nxp,pca8575", (void *)16 },
47 { .compatible = "nxp,pca9671", (void *)16 },
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8m-anatop.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Family Anatop Module
10 - Peng Fan <peng.fan@nxp.com>
13 NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
18 - enum:
19 - fsl,imx8mm-anatop
20 - fsl,imx8mq-anatop
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dimx8m-soc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/imx8m-soc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Series SoC
10 - Alice Guo <alice.guo@nxp.com>
13 NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be
21 - fsl,imx8mm
22 - fsl,imx8mn
23 - fsl,imx8mp
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
[all …]
/openbmc/linux/drivers/regulator/
H A Dpca9450-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020 NXP.
4 * NXP PCA9450 pmic driver
55 .max_register = PCA9450_MAX_REGISTER - 1,
156 int ret, i; in buck_set_dvs() local
160 if (ret == -EINVAL) in buck_set_dvs()
165 for (i = 0; i < desc->n_voltages; i++) { in buck_set_dvs()
166 ret = regulator_desc_list_voltage_linear_range(desc, i); in buck_set_dvs()
170 i <<= ffs(desc->vsel_mask) - 1; in buck_set_dvs()
171 ret = regmap_update_bits(regmap, reg, mask, i); in buck_set_dvs()
[all …]
/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-lpc32xx/common.c
5 * Author: Kevin Wells <kevin.wells@nxp.com>
7 * Copyright (C) 2010 NXP Semiconductors
11 #include <linux/soc/nxp/lpc32xx-misc.h>
24 int i; in lpc32xx_get_uid() local
26 for (i = 0; i < 4; i++) in lpc32xx_get_uid()
27 devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2)); in lpc32xx_get_uid()

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