1d766dfeeSGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2d766dfeeSGeert Uytterhoeven%YAML 1.2
3d766dfeeSGeert Uytterhoeven---
4d766dfeeSGeert Uytterhoeven$id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5d766dfeeSGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml#
6d766dfeeSGeert Uytterhoeven
7d766dfeeSGeert Uytterhoeventitle: PCF857x-compatible I/O expanders
8d766dfeeSGeert Uytterhoeven
9d766dfeeSGeert Uytterhoevenmaintainers:
10d766dfeeSGeert Uytterhoeven  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11d766dfeeSGeert Uytterhoeven
12d766dfeeSGeert Uytterhoevendescription:
13d766dfeeSGeert Uytterhoeven  The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14d766dfeeSGeert Uytterhoeven  driven high by a pull-up current source or driven low to ground. This
15d766dfeeSGeert Uytterhoeven  combines the direction and output level into a single bit per line, which
16d766dfeeSGeert Uytterhoeven  can't be read back. We can't actually know at initialization time whether a
17d766dfeeSGeert Uytterhoeven  line is configured (a) as output and driving the signal low/high, or (b) as
18d766dfeeSGeert Uytterhoeven  input and reporting a low/high value, without knowing the last value written
19d766dfeeSGeert Uytterhoeven  since the chip came out of reset (if any). The only reliable solution for
20d766dfeeSGeert Uytterhoeven  setting up line direction is thus to do it explicitly.
21d766dfeeSGeert Uytterhoeven
22d766dfeeSGeert Uytterhoevenproperties:
23d766dfeeSGeert Uytterhoeven  compatible:
24d766dfeeSGeert Uytterhoeven    enum:
25d766dfeeSGeert Uytterhoeven      - maxim,max7328
26d766dfeeSGeert Uytterhoeven      - maxim,max7329
27d766dfeeSGeert Uytterhoeven      - nxp,pca8574
28d766dfeeSGeert Uytterhoeven      - nxp,pca8575
29d766dfeeSGeert Uytterhoeven      - nxp,pca9670
30d766dfeeSGeert Uytterhoeven      - nxp,pca9671
31d766dfeeSGeert Uytterhoeven      - nxp,pca9672
32d766dfeeSGeert Uytterhoeven      - nxp,pca9673
33d766dfeeSGeert Uytterhoeven      - nxp,pca9674
34d766dfeeSGeert Uytterhoeven      - nxp,pca9675
35d766dfeeSGeert Uytterhoeven      - nxp,pcf8574
36d766dfeeSGeert Uytterhoeven      - nxp,pcf8574a
37d766dfeeSGeert Uytterhoeven      - nxp,pcf8575
38d766dfeeSGeert Uytterhoeven
39d766dfeeSGeert Uytterhoeven  reg:
40d766dfeeSGeert Uytterhoeven    maxItems: 1
41d766dfeeSGeert Uytterhoeven
42*dc3c7404STrevor Woerner  gpio-line-names:
43*dc3c7404STrevor Woerner    minItems: 1
44*dc3c7404STrevor Woerner    maxItems: 16
45*dc3c7404STrevor Woerner
46d766dfeeSGeert Uytterhoeven  gpio-controller: true
47d766dfeeSGeert Uytterhoeven
48d766dfeeSGeert Uytterhoeven  '#gpio-cells':
49d766dfeeSGeert Uytterhoeven    const: 2
50d766dfeeSGeert Uytterhoeven    description:
51d766dfeeSGeert Uytterhoeven      The first cell is the GPIO number and the second cell specifies GPIO
52d766dfeeSGeert Uytterhoeven      flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH
53d766dfeeSGeert Uytterhoeven      and GPIO_ACTIVE_LOW flags are supported.
54d766dfeeSGeert Uytterhoeven
55d766dfeeSGeert Uytterhoeven  lines-initial-states:
56d766dfeeSGeert Uytterhoeven    $ref: /schemas/types.yaml#/definitions/uint32
57d766dfeeSGeert Uytterhoeven    description:
58d766dfeeSGeert Uytterhoeven      Bitmask that specifies the initial state of each line.
59d766dfeeSGeert Uytterhoeven      When a bit is set to zero, the corresponding line will be initialized to
60d766dfeeSGeert Uytterhoeven      the input (pulled-up) state.
61d766dfeeSGeert Uytterhoeven      When the  bit is set to one, the line will be initialized to the
62d766dfeeSGeert Uytterhoeven      low-level output state.
63d766dfeeSGeert Uytterhoeven      If the property is not specified all lines will be initialized to the
64d766dfeeSGeert Uytterhoeven      input state.
65d766dfeeSGeert Uytterhoeven
66d766dfeeSGeert Uytterhoeven  interrupts:
67d766dfeeSGeert Uytterhoeven    maxItems: 1
68d766dfeeSGeert Uytterhoeven
69d766dfeeSGeert Uytterhoeven  interrupt-controller: true
70d766dfeeSGeert Uytterhoeven
71d766dfeeSGeert Uytterhoeven  '#interrupt-cells':
72d766dfeeSGeert Uytterhoeven    const: 2
73d766dfeeSGeert Uytterhoeven
74d766dfeeSGeert Uytterhoeven  wakeup-source: true
75d766dfeeSGeert Uytterhoeven
76d766dfeeSGeert UytterhoevenpatternProperties:
77d766dfeeSGeert Uytterhoeven  "^(.+-hog(-[0-9]+)?)$":
78d766dfeeSGeert Uytterhoeven    type: object
79d766dfeeSGeert Uytterhoeven
80d766dfeeSGeert Uytterhoeven    required:
81d766dfeeSGeert Uytterhoeven      - gpio-hog
82d766dfeeSGeert Uytterhoeven
83d766dfeeSGeert Uytterhoevenrequired:
84d766dfeeSGeert Uytterhoeven  - compatible
85d766dfeeSGeert Uytterhoeven  - reg
86d766dfeeSGeert Uytterhoeven  - gpio-controller
87d766dfeeSGeert Uytterhoeven  - '#gpio-cells'
88d766dfeeSGeert Uytterhoeven
89d766dfeeSGeert UytterhoevenadditionalProperties: false
90d766dfeeSGeert Uytterhoeven
91d766dfeeSGeert Uytterhoevenexamples:
92d766dfeeSGeert Uytterhoeven  - |
93d766dfeeSGeert Uytterhoeven    i2c {
94d766dfeeSGeert Uytterhoeven            #address-cells = <1>;
95d766dfeeSGeert Uytterhoeven            #size-cells = <0>;
96d766dfeeSGeert Uytterhoeven
97d766dfeeSGeert Uytterhoeven            pcf8575: gpio@20 {
98d766dfeeSGeert Uytterhoeven                    compatible = "nxp,pcf8575";
99d766dfeeSGeert Uytterhoeven                    reg = <0x20>;
100d766dfeeSGeert Uytterhoeven                    interrupt-parent = <&irqpin2>;
101d766dfeeSGeert Uytterhoeven                    interrupts = <3 0>;
102d766dfeeSGeert Uytterhoeven                    gpio-controller;
103d766dfeeSGeert Uytterhoeven                    #gpio-cells = <2>;
104d766dfeeSGeert Uytterhoeven                    interrupt-controller;
105d766dfeeSGeert Uytterhoeven                    #interrupt-cells = <2>;
106d766dfeeSGeert Uytterhoeven            };
107d766dfeeSGeert Uytterhoeven    };
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