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/openbmc/linux/drivers/mtd/nand/raw/
H A Dmxic_nand.c184 static int mxic_nfc_clk_enable(struct mxic_nand_ctlr *nfc) in mxic_nfc_clk_enable() argument
188 ret = clk_prepare_enable(nfc->ps_clk); in mxic_nfc_clk_enable()
192 ret = clk_prepare_enable(nfc->send_clk); in mxic_nfc_clk_enable()
196 ret = clk_prepare_enable(nfc->send_dly_clk); in mxic_nfc_clk_enable()
203 clk_disable_unprepare(nfc->send_clk); in mxic_nfc_clk_enable()
205 clk_disable_unprepare(nfc->ps_clk); in mxic_nfc_clk_enable()
210 static void mxic_nfc_clk_disable(struct mxic_nand_ctlr *nfc) in mxic_nfc_clk_disable() argument
212 clk_disable_unprepare(nfc->send_clk); in mxic_nfc_clk_disable()
213 clk_disable_unprepare(nfc->send_dly_clk); in mxic_nfc_clk_disable()
214 clk_disable_unprepare(nfc->ps_clk); in mxic_nfc_clk_disable()
[all …]
H A Drockchip-nand-controller.c22 * NFC Page Data Layout:
111 * @type: NFC version
226 struct rk_nfc *nfc = nand_get_controller_data(chip); in rk_nfc_data_ptr() local
228 return nfc->page_buf + i * rk_nfc_data_len(chip); in rk_nfc_data_ptr()
233 struct rk_nfc *nfc = nand_get_controller_data(chip); in rk_nfc_oob_ptr() local
235 return nfc->page_buf + i * rk_nfc_data_len(chip) + chip->ecc.size; in rk_nfc_oob_ptr()
240 struct rk_nfc *nfc = nand_get_controller_data(chip); in rk_nfc_hw_ecc_setup() local
244 if (strength == nfc->cfg->ecc_strengths[i]) { in rk_nfc_hw_ecc_setup()
245 reg = nfc->cfg->ecc_cfgs[i]; in rk_nfc_hw_ecc_setup()
253 writel(reg, nfc->regs + nfc->cfg->bchctl_off); in rk_nfc_hw_ecc_setup()
[all …]
H A Dvf610_nfc.c52 /* Addresses for NFC MAIN RAM BUFFER areas */
75 /* NFC ECC mode define */
173 static inline u32 vf610_nfc_read(struct vf610_nfc *nfc, uint reg) in vf610_nfc_read() argument
175 return readl(nfc->regs + reg); in vf610_nfc_read()
178 static inline void vf610_nfc_write(struct vf610_nfc *nfc, uint reg, u32 val) in vf610_nfc_write() argument
180 writel(val, nfc->regs + reg); in vf610_nfc_write()
183 static inline void vf610_nfc_set(struct vf610_nfc *nfc, uint reg, u32 bits) in vf610_nfc_set() argument
185 vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) | bits); in vf610_nfc_set()
188 static inline void vf610_nfc_clear(struct vf610_nfc *nfc, uint reg, u32 bits) in vf610_nfc_clear() argument
190 vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) & ~bits); in vf610_nfc_clear()
[all …]
H A Dmtk_nand.c216 struct mtk_nfc *nfc = nand_get_controller_data(chip); in mtk_data_ptr() local
218 return nfc->buffer + i * mtk_data_len(chip); in mtk_data_ptr()
223 struct mtk_nfc *nfc = nand_get_controller_data(chip); in mtk_oob_ptr() local
225 return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size; in mtk_oob_ptr()
228 static inline void nfi_writel(struct mtk_nfc *nfc, u32 val, u32 reg) in nfi_writel() argument
230 writel(val, nfc->regs + reg); in nfi_writel()
233 static inline void nfi_writew(struct mtk_nfc *nfc, u16 val, u32 reg) in nfi_writew() argument
235 writew(val, nfc->regs + reg); in nfi_writew()
238 static inline void nfi_writeb(struct mtk_nfc *nfc, u8 val, u32 reg) in nfi_writeb() argument
240 writeb(val, nfc->regs + reg); in nfi_writeb()
[all …]
H A Dmeson_nand.c259 struct meson_nfc *nfc = nand_get_controller_data(nand); in meson_nfc_select_chip() local
265 nfc->param.chip_select = meson_chip->sels[chip] ? NAND_CE1 : NAND_CE0; in meson_nfc_select_chip()
266 nfc->param.rb_select = nfc->param.chip_select; in meson_nfc_select_chip()
267 nfc->timing.twb = meson_chip->twb; in meson_nfc_select_chip()
268 nfc->timing.tadl = meson_chip->tadl; in meson_nfc_select_chip()
269 nfc->timing.tbers_max = meson_chip->tbers_max; in meson_nfc_select_chip()
271 if (nfc->clk_rate != meson_chip->clk_rate) { in meson_nfc_select_chip()
272 ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate); in meson_nfc_select_chip()
274 dev_err(nfc->dev, "failed to set clock rate\n"); in meson_nfc_select_chip()
277 nfc->clk_rate = meson_chip->clk_rate; in meson_nfc_select_chip()
[all …]
H A Dstm32_fmc2_nand.c283 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init() local
289 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
299 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
306 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
311 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup() local
333 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
338 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip() local
343 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
346 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
350 if (nfc->dma_tx_ch && nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
[all …]
H A Darasan-nand-controller.c234 static int anfc_wait_for_event(struct arasan_nfc *nfc, unsigned int event) in anfc_wait_for_event() argument
239 ret = readl_relaxed_poll_timeout(nfc->base + INTR_STS_REG, val, in anfc_wait_for_event()
243 dev_err(nfc->dev, "Timeout waiting for event 0x%x\n", event); in anfc_wait_for_event()
247 writel_relaxed(event, nfc->base + INTR_STS_REG); in anfc_wait_for_event()
252 static int anfc_wait_for_rb(struct arasan_nfc *nfc, struct nand_chip *chip, in anfc_wait_for_rb() argument
260 ret = readl_relaxed_poll_timeout(nfc->base + READY_STS_REG, val, in anfc_wait_for_rb()
264 dev_err(nfc->dev, "Timeout waiting for R/B 0x%x\n", in anfc_wait_for_rb()
265 readl_relaxed(nfc->base + READY_STS_REG)); in anfc_wait_for_rb()
272 static void anfc_trigger_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_trigger_op() argument
274 writel_relaxed(nfc_op->pkt_reg, nfc->base + PKT_REG); in anfc_trigger_op()
[all …]
H A Dpl35x-nand-controller.c214 static void pl35x_smc_update_regs(struct pl35x_nandc *nfc) in pl35x_smc_update_regs() argument
218 nfc->conf_regs + PL35X_SMC_DIRECT_CMD); in pl35x_smc_update_regs()
221 static int pl35x_smc_set_buswidth(struct pl35x_nandc *nfc, unsigned int bw) in pl35x_smc_set_buswidth() argument
226 writel(bw, nfc->conf_regs + PL35X_SMC_OPMODE); in pl35x_smc_set_buswidth()
227 pl35x_smc_update_regs(nfc); in pl35x_smc_set_buswidth()
232 static void pl35x_smc_clear_irq(struct pl35x_nandc *nfc) in pl35x_smc_clear_irq() argument
235 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_smc_clear_irq()
238 static int pl35x_smc_wait_for_irq(struct pl35x_nandc *nfc) in pl35x_smc_wait_for_irq() argument
243 ret = readl_poll_timeout(nfc->conf_regs + PL35X_SMC_MEMC_STATUS, reg, in pl35x_smc_wait_for_irq()
247 dev_err(nfc->dev, in pl35x_smc_wait_for_irq()
[all …]
H A Dsunxi_nand.c6 * https://github.com/yuq/sunxi-nfc-mtd
164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC
262 struct sunxi_nfc *nfc = dev_id; in sunxi_nfc_interrupt() local
263 u32 st = readl(nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
264 u32 ien = readl(nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
270 complete(&nfc->complete); in sunxi_nfc_interrupt()
272 writel(st & NFC_INT_MASK, nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
273 writel(~st & ien & NFC_INT_MASK, nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
278 static int sunxi_nfc_wait_events(struct sunxi_nfc *nfc, u32 events, in sunxi_nfc_wait_events() argument
290 init_completion(&nfc->complete); in sunxi_nfc_wait_events()
[all …]
H A Dmarvell_nand.c98 /* NFC does not support transfers of larger chunks at a time */
107 /* Latency in clock cycles between SoC pins and NFC logic */
516 static void marvell_nfc_disable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_disable_int() argument
521 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_int()
522 writel_relaxed(reg | int_mask, nfc->regs + NDCR); in marvell_nfc_disable_int()
525 static void marvell_nfc_enable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_enable_int() argument
530 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_int()
531 writel_relaxed(reg & ~int_mask, nfc->regs + NDCR); in marvell_nfc_enable_int()
534 static u32 marvell_nfc_clear_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_clear_int() argument
538 reg = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_clear_int()
[all …]
/openbmc/linux/Documentation/driver-api/mei/
H A Dnfc.rst3 MEI NFC
6 Some Intel 8 and 9 Series chipsets support NFC devices connected behind
8 MEI client bus exposes the NFC chips as NFC phy devices and enables
9 binding with Microread and NXP PN544 NFC device driver from the Linux NFC
13 :alt: MEI NFC digraph
14 :caption: **MEI NFC** Stack
16 digraph NFC {
18 "drivers/nfc/mei_phy" -> cl_nfc [lhead=bus];
19 "drivers/nfc/microread/mei" -> cl_nfc;
20 "drivers/nfc/microread/mei" -> "drivers/nfc/mei_phy";
[all …]
/openbmc/linux/drivers/nfc/
H A DKconfig3 # Near Field Communication (NFC) devices
6 menu "Near Field Communication (NFC) devices"
7 depends on NFC
10 tristate "Texas Instruments TRF7970a NFC driver"
13 This option enables the NFC driver for Texas Instruments' TRF7970a
22 tristate "MEI bus NFC device support"
25 This adds support to use an mei bus nfc device. Select this if you
26 will use an HCI NFC driver for an NFC chip connected behind an
32 tristate "NFC hardware simulator driver"
35 This driver declares two virtual NFC devices supporting NFC-DEP
[all …]
/openbmc/linux/drivers/nfc/nfcmrvl/
H A DKconfig5 The core driver to support Marvell NFC devices.
8 Marvell NFC device 8897.
11 tristate "Marvell NFC-over-USB driver"
15 Marvell NFC-over-USB driver.
17 This driver provides support for Marvell NFC-over-USB devices:
20 Say Y here to compile support for Marvell NFC-over-USB driver
24 tristate "Marvell NFC-over-UART driver"
28 Marvell NFC-over-UART driver.
30 This driver provides support for Marvell NFC-over-UART devices
32 Say Y here to compile support for Marvell NFC-over-UART driver
[all …]
/openbmc/linux/drivers/mtd/nand/raw/ingenic/
H A Dingenic_nand_drv.c152 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_calculate() local
166 return ingenic_ecc_calculate(nfc->ecc, &params, dat, ecc_code); in ingenic_nand_ecc_calculate()
173 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_correct() local
180 return ingenic_ecc_correct(nfc->ecc, &params, dat, read_ecc); in ingenic_nand_ecc_correct()
186 struct ingenic_nfc *nfc = to_ingenic_nfc(chip->controller); in ingenic_nand_attach_chip() local
199 if (!nfc->ecc) { in ingenic_nand_attach_chip()
200 dev_err(nfc->dev, "HW ECC selected, but ECC controller not found\n"); in ingenic_nand_attach_chip()
209 dev_info(nfc->dev, "using %s (strength %d, size %d, bytes %d)\n", in ingenic_nand_attach_chip()
210 (nfc->ecc) ? "hardware ECC" : "software ECC", in ingenic_nand_attach_chip()
214 dev_info(nfc->dev, "not using ECC\n"); in ingenic_nand_attach_chip()
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dvf610_nfc.c53 /* Addresses for NFC MAIN RAM BUFFER areas */
75 /* NFC ECC mode define */
199 struct vf610_nfc *nfc = mtd_to_nfc(mtd); in vf610_nfc_read() local
201 return readl(nfc->regs + reg); in vf610_nfc_read()
206 struct vf610_nfc *nfc = mtd_to_nfc(mtd); in vf610_nfc_write() local
208 writel(val, nfc->regs + reg); in vf610_nfc_write()
253 struct vf610_nfc *nfc = mtd_to_nfc(mtd); in vf610_nfc_done() local
273 vf610_nfc_clear_status(nfc->regs); in vf610_nfc_done()
328 struct vf610_nfc *nfc = mtd_to_nfc(mtd); in vf610_nfc_addr_cycle() local
329 if (nfc->chip.options & NAND_BUSWIDTH_16) in vf610_nfc_addr_cycle()
[all …]
H A Dmxc_nand_spl.c20 static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR; variable
22 static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI; variable
31 while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT)) in nfc_wait_ready()
35 tmp = readnfc(&nfc->config2); in nfc_wait_ready()
37 writenfc(tmp, &nfc->config2); in nfc_wait_ready()
91 writenfc(CONFIG_SYS_NAND_OOBSIZE / 2, &nfc->spare_area_size); in nfc_nand_init()
94 writenfc(0x2, &nfc->config); in nfc_nand_init()
97 config1 = readnfc(&nfc->config1) | NFC_V1_V2_CONFIG1_ECC_EN | in nfc_nand_init()
108 writenfc(config1, &nfc->config1); in nfc_nand_init()
111 writenfc(0x2, &nfc->config); in nfc_nand_init()
[all …]
H A Dsunxi_nand.c7 * https://github.com/yuq/sunxi-nfc-mtd
315 static int sunxi_nfc_wait_int(struct sunxi_nfc *nfc, u32 flags, in sunxi_nfc_wait_int() argument
330 status = readl(nfc->regs + NFC_REG_ST); in sunxi_nfc_wait_int()
339 writel(status & flags, nfc->regs + NFC_REG_ST); in sunxi_nfc_wait_int()
344 static int sunxi_nfc_wait_cmd_fifo_empty(struct sunxi_nfc *nfc) in sunxi_nfc_wait_cmd_fifo_empty() argument
352 if (!(readl(nfc->regs + NFC_REG_ST) & NFC_CMD_FIFO_STATUS)) in sunxi_nfc_wait_cmd_fifo_empty()
356 dev_err(nfc->dev, "wait for empty cmd FIFO timedout\n"); in sunxi_nfc_wait_cmd_fifo_empty()
360 static int sunxi_nfc_rst(struct sunxi_nfc *nfc) in sunxi_nfc_rst() argument
366 writel(0, nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_rst()
367 writel(NFC_RESET, nfc->regs + NFC_REG_CTL); in sunxi_nfc_rst()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml7 title: Rockchip SoCs NAND FLASH Controller (NFC)
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
23 - rockchip,rk3036-nfc
24 - rockchip,rk3128-nfc
25 - const: rockchip,rk2928-nfc
27 - const: rockchip,rk3308-nfc
28 - const: rockchip,rv1108-nfc
46 - const: nfc
[all …]
H A Datmel-nand.txt21 - atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3
23 - atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
62 * SAMA5 NFC I/O bindings:
68 - compatible: should be "atmel,sama5d3-nfc-io", "syscon".
69 - reg: should contain the I/O range used to interact with the NFC logic.
73 nfc_io: nfc-io@70000000 {
74 compatible = "atmel,sama5d3-nfc-io", "syscon";
99 atmel,nfc-sram = <&nfc_sram>;
100 atmel,nfc-io = <&nfc_io>;
159 Nand Flash Controller(NFC) is an optional sub-node
[all …]
H A Dvf610-nfc.txt1 Freescale's NAND flash controller (NFC)
3 This variant of the Freescale NAND flash controller (NFC) can be found on
7 - compatible: Should be set to "fsl,vf610-nfc".
8 - reg: address range of the NFC.
9 - interrupts: interrupt of the NFC.
27 - compatible: Should be set to "fsl,vf610-nfc-cs".
39 nfc: nand@400e0000 {
40 compatible = "fsl,vf610-nfc";
46 clock-names = "nfc";
51 compatible = "fsl,vf610-nfc-nandcs";
/openbmc/linux/net/nfc/
H A DKconfig3 # NFC subsystem configuration
6 menuconfig NFC config
8 tristate "NFC subsystem support"
11 Say Y here if you want to build support for NFC (Near field
15 be called nfc.
18 depends on NFC
21 tristate "NFC Digital Protocol stack support"
24 Say Y if you want to build NFC digital protocol stack support.
25 This is needed by NFC chipsets whose firmware only implement
26 the NFC analog layer.
[all …]
/openbmc/linux/include/uapi/linux/
H A Dnfc.h27 #define NFC_GENL_NAME "nfc"
33 * enum nfc_commands - supported nfc commands
38 * %NFC_ATTR_DEVICE_INDEX) or dump request to get a list of all nfc devices
39 * @NFC_CMD_DEV_UP: turn on the nfc device
41 * @NFC_CMD_DEV_DOWN: turn off the nfc device
75 * This typically will be sent whenever a new NFC controller with either
78 * the system, as a consequence of e.g. an NFC controller being unplugged.
87 * @NFC_CMD_GET_SE: Dump all discovered secure elements from an NFC controller.
89 * @NFC_CMD_ACTIVATE_TARGET: Request NFC controller to reactivate target.
92 * @NFC_CMD_DEACTIVATE_TARGET: Request NFC controller to deactivate target.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/nfc/
H A Dmarvell,nci.yaml4 $id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#
7 title: Marvell International Ltd. NCI NFC controller
15 - marvell,nfc-i2c
16 - marvell,nfc-spi
17 - marvell,nfc-uart
70 const: marvell,nfc-i2c
85 const: marvell,nfc-spi
100 const: marvell,nfc-uart
122 nfc@8 {
123 compatible = "marvell,nfc-i2c";
[all …]
/openbmc/linux/Documentation/networking/
H A Dnfc.rst2 Linux NFC subsystem
5 The Near Field Communication (NFC) subsystem is required to standardize the
6 NFC device drivers development and to create an unified userspace interface.
14 The NFC subsystem is responsible for:
15 - NFC adapters management;
27 PF_NFC. The NFC_SOCKPROTO_RAW performs raw communication with NFC targets.
58 When registering on the NFC subsystem, the device driver must inform the core
59 of the set of supported NFC protocols and the set of ops callbacks. The ops
84 * NFC_EVENT_DEVICE_ADDED - reports an NFC device addition
85 * NFC_EVENT_DEVICE_REMOVED - reports an NFC device removal
[all …]
/openbmc/linux/drivers/nfc/st95hf/
H A DKconfig3 tristate "ST95HF NFC Transceiver driver"
6 This enables the ST NFC driver for ST95HF NFC transceiver.
8 and registered with NFC digital core to support Linux NFC framework.
10 Say Y here to compile support for ST NFC transceiver ST95HF

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