Lines Matching full:nfc
234 static int anfc_wait_for_event(struct arasan_nfc *nfc, unsigned int event) in anfc_wait_for_event() argument
239 ret = readl_relaxed_poll_timeout(nfc->base + INTR_STS_REG, val, in anfc_wait_for_event()
243 dev_err(nfc->dev, "Timeout waiting for event 0x%x\n", event); in anfc_wait_for_event()
247 writel_relaxed(event, nfc->base + INTR_STS_REG); in anfc_wait_for_event()
252 static int anfc_wait_for_rb(struct arasan_nfc *nfc, struct nand_chip *chip, in anfc_wait_for_rb() argument
260 ret = readl_relaxed_poll_timeout(nfc->base + READY_STS_REG, val, in anfc_wait_for_rb()
264 dev_err(nfc->dev, "Timeout waiting for R/B 0x%x\n", in anfc_wait_for_rb()
265 readl_relaxed(nfc->base + READY_STS_REG)); in anfc_wait_for_rb()
272 static void anfc_trigger_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_trigger_op() argument
274 writel_relaxed(nfc_op->pkt_reg, nfc->base + PKT_REG); in anfc_trigger_op()
275 writel_relaxed(nfc_op->addr1_reg, nfc->base + MEM_ADDR1_REG); in anfc_trigger_op()
276 writel_relaxed(nfc_op->addr2_reg, nfc->base + MEM_ADDR2_REG); in anfc_trigger_op()
277 writel_relaxed(nfc_op->cmd_reg, nfc->base + CMD_REG); in anfc_trigger_op()
278 writel_relaxed(nfc_op->prog_reg, nfc->base + PROG_REG); in anfc_trigger_op()
304 static bool anfc_is_gpio_cs(struct arasan_nfc *nfc, int nfc_cs) in anfc_is_gpio_cs() argument
306 return nfc_cs >= 0 && nfc->cs_array[nfc_cs]; in anfc_is_gpio_cs()
314 static void anfc_assert_cs(struct arasan_nfc *nfc, unsigned int nfc_cs_idx) in anfc_assert_cs() argument
317 if (nfc->cur_cs == nfc_cs_idx) in anfc_assert_cs()
321 if (anfc_is_gpio_cs(nfc, nfc->cur_cs)) in anfc_assert_cs()
322 gpiod_set_value_cansleep(nfc->cs_array[nfc->cur_cs], 1); in anfc_assert_cs()
325 if (anfc_is_gpio_cs(nfc, nfc_cs_idx)) { in anfc_assert_cs()
326 nfc->native_cs = nfc->spare_cs; in anfc_assert_cs()
327 gpiod_set_value_cansleep(nfc->cs_array[nfc_cs_idx], 0); in anfc_assert_cs()
329 nfc->native_cs = nfc_cs_idx; in anfc_assert_cs()
332 nfc->cur_cs = nfc_cs_idx; in anfc_assert_cs()
338 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_select_target() local
342 anfc_assert_cs(nfc, nfc_cs_idx); in anfc_select_target()
345 writel_relaxed(anand->data_iface, nfc->base + DATA_INTERFACE_REG); in anfc_select_target()
346 writel_relaxed(anand->timings, nfc->base + TIMING_REG); in anfc_select_target()
349 if (nfc->cur_clk != anand->clk) { in anfc_select_target()
350 clk_disable_unprepare(nfc->bus_clk); in anfc_select_target()
351 ret = clk_set_rate(nfc->bus_clk, anand->clk); in anfc_select_target()
353 dev_err(nfc->dev, "Failed to change clock rate\n"); in anfc_select_target()
357 ret = clk_prepare_enable(nfc->bus_clk); in anfc_select_target()
359 dev_err(nfc->dev, in anfc_select_target()
364 nfc->cur_clk = anand->clk; in anfc_select_target()
395 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_read_page_hw_ecc() local
412 ADDR2_CS(nfc->native_cs), in anfc_read_page_hw_ecc()
423 dma_addr = dma_map_single(nfc->dev, (void *)buf, len, DMA_FROM_DEVICE); in anfc_read_page_hw_ecc()
424 if (dma_mapping_error(nfc->dev, dma_addr)) { in anfc_read_page_hw_ecc()
425 dev_err(nfc->dev, "Buffer mapping error"); in anfc_read_page_hw_ecc()
429 writel_relaxed(lower_32_bits(dma_addr), nfc->base + DMA_ADDR0_REG); in anfc_read_page_hw_ecc()
430 writel_relaxed(upper_32_bits(dma_addr), nfc->base + DMA_ADDR1_REG); in anfc_read_page_hw_ecc()
432 anfc_trigger_op(nfc, &nfc_op); in anfc_read_page_hw_ecc()
434 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_read_page_hw_ecc()
435 dma_unmap_single(nfc->dev, dma_addr, len, DMA_FROM_DEVICE); in anfc_read_page_hw_ecc()
437 dev_err(nfc->dev, "Error reading page %d\n", page); in anfc_read_page_hw_ecc()
514 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_write_page_hw_ecc() local
530 ADDR2_CS(nfc->native_cs), in anfc_write_page_hw_ecc()
542 writel_relaxed(anand->ecc_conf, nfc->base + ECC_CONF_REG); in anfc_write_page_hw_ecc()
545 nfc->base + ECC_SP_REG); in anfc_write_page_hw_ecc()
547 dma_addr = dma_map_single(nfc->dev, (void *)buf, len, DMA_TO_DEVICE); in anfc_write_page_hw_ecc()
548 if (dma_mapping_error(nfc->dev, dma_addr)) { in anfc_write_page_hw_ecc()
549 dev_err(nfc->dev, "Buffer mapping error"); in anfc_write_page_hw_ecc()
553 writel_relaxed(lower_32_bits(dma_addr), nfc->base + DMA_ADDR0_REG); in anfc_write_page_hw_ecc()
554 writel_relaxed(upper_32_bits(dma_addr), nfc->base + DMA_ADDR1_REG); in anfc_write_page_hw_ecc()
556 anfc_trigger_op(nfc, &nfc_op); in anfc_write_page_hw_ecc()
557 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_write_page_hw_ecc()
558 dma_unmap_single(nfc->dev, dma_addr, len, DMA_TO_DEVICE); in anfc_write_page_hw_ecc()
560 dev_err(nfc->dev, "Error writing page %d\n", page); in anfc_write_page_hw_ecc()
599 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_parse_instructions() local
607 nfc_op->addr2_reg = ADDR2_CS(nfc->native_cs); in anfc_parse_instructions()
680 static int anfc_rw_pio_op(struct arasan_nfc *nfc, struct anfc_op *nfc_op) in anfc_rw_pio_op() argument
690 ret = anfc_wait_for_event(nfc, dir); in anfc_rw_pio_op()
692 dev_err(nfc->dev, "PIO %s ready signal not received\n", in anfc_rw_pio_op()
699 ioread32_rep(nfc->base + DATA_PORT_REG, &buf[offset], in anfc_rw_pio_op()
702 iowrite32_rep(nfc->base + DATA_PORT_REG, &buf[offset], in anfc_rw_pio_op()
712 remainder = readl_relaxed(nfc->base + DATA_PORT_REG); in anfc_rw_pio_op()
716 writel_relaxed(remainder, nfc->base + DATA_PORT_REG); in anfc_rw_pio_op()
720 return anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_rw_pio_op()
727 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_misc_data_type_exec() local
736 anfc_trigger_op(nfc, &nfc_op); in anfc_misc_data_type_exec()
739 ret = anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_misc_data_type_exec()
744 return anfc_rw_pio_op(nfc, &nfc_op); in anfc_misc_data_type_exec()
791 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_misc_zerolen_type_exec() local
800 anfc_trigger_op(nfc, &nfc_op); in anfc_misc_zerolen_type_exec()
802 ret = anfc_wait_for_event(nfc, XFER_COMPLETE); in anfc_misc_zerolen_type_exec()
807 ret = anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_misc_zerolen_type_exec()
815 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_status_type_exec() local
827 tmp = readl_relaxed(nfc->base + FLASH_STS_REG); in anfc_status_type_exec()
848 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_wait_type_exec() local
856 return anfc_wait_for_rb(nfc, chip, nfc_op.rdy_timeout_ms); in anfc_wait_type_exec()
978 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_setup_interface() local
979 struct device_node *np = nfc->dev->of_node; in anfc_setup_interface()
1107 static int anfc_init_hw_ecc_controller(struct arasan_nfc *nfc, in anfc_init_hw_ecc_controller() argument
1124 dev_err(nfc->dev, "Unsupported page size %d\n", mtd->writesize); in anfc_init_hw_ecc_controller()
1146 dev_err(nfc->dev, "Unsupported strength %d\n", ecc->strength); in anfc_init_hw_ecc_controller()
1160 dev_err(nfc->dev, "Unsupported step size %d\n", ecc->strength); in anfc_init_hw_ecc_controller()
1176 anand->errloc = devm_kmalloc_array(nfc->dev, ecc->strength, in anfc_init_hw_ecc_controller()
1181 anand->hw_ecc = devm_kmalloc(nfc->dev, ecc->bytes, GFP_KERNEL); in anfc_init_hw_ecc_controller()
1199 struct arasan_nfc *nfc = to_anfc(chip->controller); in anfc_attach_chip() local
1246 ret = anfc_init_hw_ecc_controller(nfc, chip); in anfc_attach_chip()
1249 dev_err(nfc->dev, "Unsupported ECC mode: %d\n", in anfc_attach_chip()
1272 static int anfc_chip_init(struct arasan_nfc *nfc, struct device_node *np) in anfc_chip_init() argument
1279 anand = devm_kzalloc(nfc->dev, sizeof(*anand), GFP_KERNEL); in anfc_chip_init()
1285 if (anand->ncs_idx <= 0 || anand->ncs_idx > nfc->ncs) { in anfc_chip_init()
1286 dev_err(nfc->dev, "Invalid reg property\n"); in anfc_chip_init()
1290 anand->cs_idx = devm_kcalloc(nfc->dev, anand->ncs_idx, in anfc_chip_init()
1299 dev_err(nfc->dev, "invalid CS property: %d\n", ret); in anfc_chip_init()
1310 dev_err(nfc->dev, "Wrong RB %d\n", rb); in anfc_chip_init()
1318 mtd->dev.parent = nfc->dev; in anfc_chip_init()
1319 chip->controller = &nfc->controller; in anfc_chip_init()
1325 dev_err(nfc->dev, "NAND label property is mandatory\n"); in anfc_chip_init()
1331 dev_err(nfc->dev, "Scan operation failed\n"); in anfc_chip_init()
1341 list_add_tail(&anand->node, &nfc->chips); in anfc_chip_init()
1346 static void anfc_chips_cleanup(struct arasan_nfc *nfc) in anfc_chips_cleanup() argument
1352 list_for_each_entry_safe(anand, tmp, &nfc->chips, node) { in anfc_chips_cleanup()
1361 static int anfc_chips_init(struct arasan_nfc *nfc) in anfc_chips_init() argument
1363 struct device_node *np = nfc->dev->of_node, *nand_np; in anfc_chips_init()
1368 dev_err(nfc->dev, "Incorrect number of NAND chips (%d)\n", in anfc_chips_init()
1374 ret = anfc_chip_init(nfc, nand_np); in anfc_chips_init()
1377 anfc_chips_cleanup(nfc); in anfc_chips_init()
1385 static void anfc_reset(struct arasan_nfc *nfc) in anfc_reset() argument
1388 writel_relaxed(0, nfc->base + INTR_SIG_EN_REG); in anfc_reset()
1391 writel_relaxed(EVENT_MASK, nfc->base + INTR_STS_EN_REG); in anfc_reset()
1393 nfc->cur_cs = -1; in anfc_reset()
1396 static int anfc_parse_cs(struct arasan_nfc *nfc) in anfc_parse_cs() argument
1401 ret = rawnand_dt_parse_gpio_cs(nfc->dev, &nfc->cs_array, &nfc->ncs); in anfc_parse_cs()
1410 * case, the "not" chosen CS is assigned to nfc->spare_cs and selected in anfc_parse_cs()
1413 if (nfc->cs_array) { in anfc_parse_cs()
1414 if (nfc->ncs > 2 && !nfc->cs_array[0] && !nfc->cs_array[1]) { in anfc_parse_cs()
1415 dev_err(nfc->dev, in anfc_parse_cs()
1420 if (nfc->cs_array[0]) in anfc_parse_cs()
1421 nfc->spare_cs = 0; in anfc_parse_cs()
1423 nfc->spare_cs = 1; in anfc_parse_cs()
1426 if (!nfc->cs_array) { in anfc_parse_cs()
1427 nfc->cs_array = anfc_default_cs_array; in anfc_parse_cs()
1428 nfc->ncs = ANFC_MAX_CS; in anfc_parse_cs()
1437 struct arasan_nfc *nfc; in anfc_probe() local
1440 nfc = devm_kzalloc(&pdev->dev, sizeof(*nfc), GFP_KERNEL); in anfc_probe()
1441 if (!nfc) in anfc_probe()
1444 nfc->dev = &pdev->dev; in anfc_probe()
1445 nand_controller_init(&nfc->controller); in anfc_probe()
1446 nfc->controller.ops = &anfc_ops; in anfc_probe()
1447 INIT_LIST_HEAD(&nfc->chips); in anfc_probe()
1449 nfc->base = devm_platform_ioremap_resource(pdev, 0); in anfc_probe()
1450 if (IS_ERR(nfc->base)) in anfc_probe()
1451 return PTR_ERR(nfc->base); in anfc_probe()
1453 anfc_reset(nfc); in anfc_probe()
1455 nfc->controller_clk = devm_clk_get_enabled(&pdev->dev, "controller"); in anfc_probe()
1456 if (IS_ERR(nfc->controller_clk)) in anfc_probe()
1457 return PTR_ERR(nfc->controller_clk); in anfc_probe()
1459 nfc->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus"); in anfc_probe()
1460 if (IS_ERR(nfc->bus_clk)) in anfc_probe()
1461 return PTR_ERR(nfc->bus_clk); in anfc_probe()
1467 ret = anfc_parse_cs(nfc); in anfc_probe()
1471 ret = anfc_chips_init(nfc); in anfc_probe()
1475 platform_set_drvdata(pdev, nfc); in anfc_probe()
1483 struct arasan_nfc *nfc = platform_get_drvdata(pdev); in anfc_remove() local
1485 for (i = 0; i < nfc->ncs; i++) { in anfc_remove()
1486 if (nfc->cs_array[i]) { in anfc_remove()
1487 gpiod_put(nfc->cs_array[i]); in anfc_remove()
1491 anfc_chips_cleanup(nfc); in anfc_remove()
1499 .compatible = "arasan,nfc-v3p10",