Home
last modified time | relevance | path

Searched +full:factory +full:- +full:programmed (Results 1 – 25 of 47) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 - $ref: nvmem.yaml#
24 - st,stm32f4-otp
[all …]
H A Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
23 - enum:
24 - apple,t8103-efuses
[all …]
/openbmc/u-boot/board/davinci/da8xxevm/
H A DKconfig21 The OMAP-L138 and AM1808 SoM are programmed with
22 their MAC address in SPI Flash from the factory
28 The DA850 EVM comes with SoM are programmed with
29 their MAC address in SPI Flash from the factory,
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
19 User-defined MTD device name. Can be used to assign user friendly
24 '#address-cells':
27 '#size-cells':
34 - compatible
37 "@[0-9a-f]+$":
[all …]
/openbmc/linux/Documentation/misc-devices/
H A Dad525x_dpot.rst1 .. SPDX-License-Identifier: GPL-2.0
9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
24 and may vary greatly on a part-by-part basis. For exact interpretation of
35 0-0022 0-0027 0-002f
40 # ls /sys/bus/i2c/devices/0-002f/
45 # cd /sys/bus/i2c/devices/0-002f/
/openbmc/u-boot/board/gateworks/gw_ventana/
H A DREADME1 U-Boot for the Gateworks Ventana Product Family boards
3 This file contains information for the port of U-Boot to the Gateworks
7 is supported by a single bootloader build by using a common SPL and U-Boot
9 information from an EEPROM on the board programmed at the factory and supports
13 ---------------------------------
19 will build the following artifacts from U-Boot source:
20 - SPL - Secondary Program Loader that the i.MX6 BOOT ROM (Primary Program
22 The DRAM controller, loads u-boot.img from the detected boot device,
25 - u-boot.img - The main U-Boot core which is u-boot.bin with a image header.
29 --------
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
6 data programmed at the factory. The data is laid out in 32bit
/openbmc/linux/drivers/nvmem/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 such as the M1. These are e.g. used to store factory programmed
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
[all …]
H A Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
16 #include "stm32-bsec-optee-ta.h"
18 /* BSEC secure service access from non-secure */
49 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
61 return -EIO; in stm32_bsec_smc()
68 return -ENXIO; in stm32_bsec_smc()
[all …]
/openbmc/u-boot/board/gardena/smart-gateway-mt7688/
H A Dboard.c1 // SPDX-License-Identifier: GPL-2.0+
21 #error "U-Boot image with environment too big (overlapping with factory-data)!"
25 #define FACTORY_DATA_CRC_LEN (FACTORY_DATA_SIZE - \
26 FACTORY_DATA_USER_OFFS - sizeof(u32))
35 u8 pad_3[FACTORY_DATA_USER_OFFS - 4 - 6 - 30 - 6];
66 /* Convert non-ascii character to 'X' */ in prepare_uuid_var()
95 printf("F-Data:Unable to allocate buffer\n"); in factory_data_env_config()
100 * Get values from factory-data area in SPI NOR in factory_data_env_config()
107 printf("F-Data:Unable to access SPI NOR flash\n"); in factory_data_env_config()
114 printf("F-Data:Unable to read factory-data from SPI NOR\n"); in factory_data_env_config()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dti,tps380x-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marco Felsch <kernel@pengutronix.de>
16 reset input (MR). The RESET output remains asserted for the factory
17 programmed delay after the voltage return above its threshold or after the
25 - ti,tps3801
27 reset-gpios:
31 "#reset-cells":
[all …]
/openbmc/linux/drivers/mtd/chips/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
/openbmc/u-boot/board/Barix/ipam390/
H A DREADME.ipam3905 In the context of U-Boot, the board is booted in three stages. The initial
19 spl code starts the u-boot image
28 programmed for it. We do not take advantage of this and instead use SPL as
29 it allows for additional flexibility (run-time detect of board revision,
34 run "tools/buildman/buildman -k ipam390" in the u-boot source tree.
35 Once this build completes you will have a ../current/ipam390/u-boot.ais file
41 Assuming that the network is configured and enabled and the u-boot.ais file
44 U-Boot > print upd_uboot
45 upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;nand write c0000000 20000 ${filesize}
46 U-Boot >
[all …]
/openbmc/u-boot/arch/arm/mach-kirkwood/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
21 writel(readl(&cpureg->rstoutn_mask) | (1 << 2), in reset_cpu()
22 &cpureg->rstoutn_mask); in reset_cpu()
23 writel(readl(&cpureg->sys_soft_rst) | 1, in reset_cpu()
24 &cpureg->sys_soft_rst); in reset_cpu()
31 * Must be programmed from LSB to MSB as sequence of ones followed by
34 * NOTE: A value of 0x0 specifies 64-KByte size.
50 * kw_config_adr_windows - Configure address Windows
59 * Mbus-L to Mbus Bridge Registers Configuration.
[all …]
/openbmc/linux/drivers/hwmon/
H A Dnsa320-hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/hwmon/nsa320-hwmon.c
8 * Copyright (C) 2016 Adam Baker <linux@baker-net.org.uk>
18 #include <linux/hwmon-sysfs.h>
29 * The Zyxel hwmon MCU is a Holtek HT46R065 that is factory programmed
72 mutex_lock(&hwmon->update_lock); in nsa320_hwmon_update()
74 mcu_data = hwmon->mcu_data; in nsa320_hwmon_update()
76 if (time_after(jiffies, hwmon->last_updated + HZ) || mcu_data == 0) { in nsa320_hwmon_update()
77 gpiod_set_value(hwmon->act, 1); in nsa320_hwmon_update()
82 gpiod_set_value(hwmon->clk, 0); in nsa320_hwmon_update()
[all …]
/openbmc/linux/Documentation/networking/device_drivers/can/
H A Dcan327.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
7 --------
14 -----------
26 -------------
33 order to fake full-duplex operation.
36 enough to implement simple request-response protocols (such as OBD II),
50 -----------
59 ----------------------------------
61 Every ELM327 chip is factory programmed to operate at a serial setting
68 --debug \
[all …]
/openbmc/linux/drivers/mtd/devices/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h>
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <32768>;
20 clock-output-names = "osc_32k";
23 reg_1p8v: regulator-1p8v {
24 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V";
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6-logicpd-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart1;
18 reg_wl18xx_vmmc: regulator-wl18xx {
19 compatible = "regulator-fixed";
20 regulator-name = "vwl1837";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
24 startup-delay-us = <70000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
[all …]
H A Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
14 compatible = "mmc-pwrseq-simple";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
17 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
19 clock-names = "ext_clock";
20 post-power-on-delay-ms = <80>;
30 cpu-supply = <&buck2_reg>;
34 cpu-supply = <&buck2_reg>;
38 cpu-supply = <&buck2_reg>;
[all …]
H A Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 compatible = "mmc-pwrseq-simple";
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
16 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
18 clock-names = "ext_clock";
19 post-power-on-delay-ms = <80>;
29 cpu-supply = <&buck2_reg>;
33 cpu-supply = <&buck2_reg>;
37 cpu-supply = <&buck2_reg>;
[all …]
/openbmc/linux/drivers/misc/eeprom/
H A Dat24.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at24.c - handle most I2C EEPROMs
5 * Copyright (C) 2005-2007 David Brownell
20 #include <linux/nvmem-provider.h>
30 /* sysfs-entry will be read-only. */
32 /* sysfs-entry will be world-readable. */
36 /* Factory-programmed serial number. */
38 /* Factory-programmed mac address. */
40 /* Does not auto-rollover reads to the next slave address. */
50 * However, misconfiguration can lose data. "Set 16-bit memory address"
[all …]
/openbmc/linux/drivers/power/supply/
H A Dsmb347-charger.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <dt-bindings/power/summit,smb347-charger.h>
26 #define SMB3XX_SOFT_TEMP_COMPENSATE_DEFAULT -1
28 /* Use default factory programmed value for hard/soft temperature limit */
29 #define SMB3XX_TEMP_USE_DEFAULT -273
34 * reloaded from non-volatile registers after POR.
136 * struct smb347_charger - smb347 charger instance
149 * @pre_charge_current: current (in uA) to use in pre-charging phase
153 * pre-charge to fast charge mode
158 * current [%100 - %130] (in degree C)
[all …]
/openbmc/linux/drivers/mtd/maps/
H A Dichxrom.c1 // SPDX-License-Identifier: GPL-2.0-only
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
71 if (map->rsrc.parent) in ichxrom_cleanup()
72 release_resource(&map->rsrc); in ichxrom_cleanup()
73 mtd_device_unregister(map->mtd); in ichxrom_cleanup()
74 map_destroy(map->mtd); in ichxrom_cleanup()
75 list_del(&map->list); in ichxrom_cleanup()
[all …]

12