|
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7 |
|
| #
a0d23b86 |
| 14-Jan-2023 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon-renesom: Update Ethernet PHY ID
Due to the part shortage, the AR8031 PHY was replaced with a Micrel
KSZ9131. Hard-coding the ID of the PHY makes this new PHY
non-operati
arm64: dts: renesas: beacon-renesom: Update Ethernet PHY ID
Due to the part shortage, the AR8031 PHY was replaced with a Micrel
KSZ9131. Hard-coding the ID of the PHY makes this new PHY
non-operational on newer hardware. Since previous hardware had only
shipped to a limited number of people, and they have not gone to
production, it should be safe to update the PHY ID.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230114225647.227972-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47 |
|
| #
ba6165bc |
| 13-Jun-2022 |
Lukas Bulwahn <lukas.bulwahn@gmail.com> |
dt-bindings: clock: Move versaclock.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header
dt-bindings: clock: Move versaclock.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
This was discovered while investigating the state of ownership of the
files in include/dt-bindings/ according to the MAINTAINERS file.
This change here is similar to commit 8e28918a85a0 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae8177
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-3-lukas.bulwahn@gmail.com
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
|
|
Revision tags: v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39 |
|
| #
5cf12ac9 |
| 11-May-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Rename numbered regulators
Numbered regulators are prone to conflicts, causing silent overwrites
(see e.g. [1]).
Make conflicts less likely to happen by renaming all numbered r
arm64: dts: renesas: Rename numbered regulators
Numbered regulators are prone to conflicts, causing silent overwrites
(see e.g. [1]).
Make conflicts less likely to happen by renaming all numbered regulators
to names reflecting the regulator's purposes.
[1] commit 45f5d5a9e34d3fe4 ("arm64: dts: renesas: r8a77995: draak: Fix
backlight regulator name").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b90dfeb834c4d7dabd22bf03396f33df58f54507.1652264651.git.geert+renesas@glider.be
show more ...
|
|
Revision tags: v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26 |
|
| #
48d8ee5b |
| 24-Feb-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by:
arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/baee4b9980576ffbab24122fce7147c9cbc2ea59.1645705998.git.geert+renesas@glider.be
show more ...
|
|
Revision tags: v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8 |
|
| #
3a4f33ee |
| 08-Dec-2021 |
Fabio Estevam <festevam@gmail.com> |
arm64: dts: renesas: beacon: Remove the 'pm-ignore-notify' property
The 'pm-ignore-notify' property is not a valid property and there is
no bindings documentation for it.
Drop such invalid property
arm64: dts: renesas: beacon: Remove the 'pm-ignore-notify' property
The 'pm-ignore-notify' property is not a valid property and there is
no bindings documentation for it.
Drop such invalid property.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20211208195624.1864654-1-festevam@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64 |
|
| #
18a24271 |
| 09-Sep-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing Atheros
AR8031 PHYs on RZ/G2 boards. This allows software to ident
arm64: dts: renesas: Add compatible properties to AR8031 Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing Atheros
AR8031 PHYs on RZ/G2 boards. This allows software to identify the PHY
model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/3f1b58756f149f0c634c66abaecc88e699f4c3cc.1631174218.git.geert+renesas@glider.be
show more ...
|
| #
59a8bda0 |
| 24-Sep-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
While networking works fine in RGMII mode when using the Linux generic
PHY driver, it fails when using the Atheros PHY driver.
Fix this by correcti
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
While networking works fine in RGMII mode when using the Linux generic
PHY driver, it fails when using the Atheros PHY driver.
Fix this by correcting the Ethernet PHY mode to RGMII-RXID, which works
fine with both drivers.
Fixes: a5200e63af57d05e ("arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2a4c15b2df23bb63f15abf9dfb88860477f4f523.1632465965.git.geert+renesas@glider.be
show more ...
|
| #
a7b0d0d6 |
| 24-Sep-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
[ Upstream commit 59a8bda062f8646d99ff8c4956adf37dee1cb75e ]
While networking works fine in RGMII mode when using the Linux generic
PHY driver, it
arm64: dts: renesas: beacon: Fix Ethernet PHY mode
[ Upstream commit 59a8bda062f8646d99ff8c4956adf37dee1cb75e ]
While networking works fine in RGMII mode when using the Linux generic
PHY driver, it fails when using the Atheros PHY driver.
Fix this by correcting the Ethernet PHY mode to RGMII-RXID, which works
fine with both drivers.
Fixes: a5200e63af57d05e ("arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2a4c15b2df23bb63f15abf9dfb88860477f4f523.1632465965.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119 |
|
| #
56bc5449 |
| 13-May-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon: Fix USB extal reference
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2
arm64: dts: renesas: beacon: Fix USB extal reference
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2_clksel. Since usb_extal is referenced by the versaclock,
reference it here so the usb2_clksel can get the proper clock speed
of 50MHz.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101 |
|
| #
0decd50b |
| 24-Feb-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon kit: Setup AVB refclk
The AVB reference clock assumes an external clock that runs
automatically. Because the Versaclock is wired to provide the
AVB refclock, the device
arm64: dts: renesas: beacon kit: Setup AVB refclk
The AVB reference clock assumes an external clock that runs
automatically. Because the Versaclock is wired to provide the
AVB refclock, the device tree needs to reference it in order for the
driver to start the clock.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210224115146.9131-5-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14 |
|
| #
74477936 |
| 28-Jan-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: beacon: Fix EEPROM compatible value
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional
arm64: dts: renesas: beacon: Fix EEPROM compatible value
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'
Fix this by dropping the bogus "at" prefix.
Fixes: a1d8a344f1ca0709 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
show more ...
|
| #
d68c9edf |
| 19-Jan-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
arm64: dts: renesas: Disable SD functions for plain eMMC
Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-e
arm64: dts: renesas: Disable SD functions for plain eMMC
Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Adam Ford <aford173@gmail.com> (beacon)
Link: https://lore.kernel.org/r/20210119133322.87289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
| #
33aaab6d |
| 24-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
In preparation for adding new dev kits, move anything specific to the
RZ/G2M from the SOM-level and baseboard-levels and move th
arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
In preparation for adding new dev kits, move anything specific to the
RZ/G2M from the SOM-level and baseboard-levels and move them to the
kit-level. This allows the SOM and baseboard to be reused with
other SoC's.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-6-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
| #
fe82bb4d |
| 24-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon: Configure programmable clocks
When the board was added, clock drivers were being updated done at
the same time to allow the versaclock driver to properly configure
the m
arm64: dts: renesas: beacon: Configure programmable clocks
When the board was added, clock drivers were being updated done at
the same time to allow the versaclock driver to properly configure
the modes. Unfortunately, the updates were not applied to the board
files at the time they should have been, so do it now.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v5.10 |
|
| #
900d9fc3 |
| 13-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon: Correct I2C bus speeds
For greater compatibility with upcoming kits that will reuse the baseboard
and SOM-level files, adjust the I2C speeds to make it the most compatib
arm64: dts: renesas: beacon: Correct I2C bus speeds
For greater compatibility with upcoming kits that will reuse the baseboard
and SOM-level files, adjust the I2C speeds to make it the most compatible
with all devices.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201213183759.223246-15-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
| #
ac817b5a |
| 13-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon kit: Remove unnecessary nodes
VSPI0 and VSPB are already enabled by default. There is no need
to add extra nodes to enable them. Remove the redundant nodes.
Signed-off
arm64: dts: renesas: beacon kit: Remove unnecessary nodes
VSPI0 and VSPB are already enabled by default. There is no need
to add extra nodes to enable them. Remove the redundant nodes.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201213183759.223246-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
| #
db030c5a |
| 13-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon kit: Fix choppy Bluetooth Audio
The Bluetooth chip is capable of operating at 4Mbps, but the
max-speed setting was on the UART node instead of the Bluetooth
node, so the
arm64: dts: renesas: beacon kit: Fix choppy Bluetooth Audio
The Bluetooth chip is capable of operating at 4Mbps, but the
max-speed setting was on the UART node instead of the Bluetooth
node, so the chip didn't operate at the correct speed resulting
in choppy audio. Fix this by setting the max-speed in the proper
node.
Fixes: a1d8a344f1ca ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201213183759.223246-3-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
|
|
Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60 |
|
| #
a5200e63 |
| 19-Aug-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typical
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).
Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This was wrong, as these are meant solely for the
PHY, not for the MAC. Hence properties were introduced for explicit
configuration of these delays.
Convert the RZ/G2 DTS files from the old to the new scheme:
- Add default "rx-internal-delay-ps" and "tx-internal-delay-ps"
properties to the SoC .dtsi files, to be overridden by board files
where needed,
- Convert board files from "rgmii-*id" PHY modes to "rgmii", adding
the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps"
overrides.
Notes:
- RZ/G2E does not support TX internal delay handling.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be
show more ...
|
| #
e4da0e00 |
| 19-Aug-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
[ Upstream commit a5200e63af57d05ed8bf0ffd9a6ffefc40e01e89 ]
Some EtherAVB variants support internal clock delay configuration
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
[ Upstream commit a5200e63af57d05ed8bf0ffd9a6ffefc40e01e89 ]
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).
Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This was wrong, as these are meant solely for the
PHY, not for the MAC. Hence properties were introduced for explicit
configuration of these delays.
Convert the RZ/G2 DTS files from the old to the new scheme:
- Add default "rx-internal-delay-ps" and "tx-internal-delay-ps"
properties to the SoC .dtsi files, to be overridden by board files
where needed,
- Convert board files from "rgmii-*id" PHY modes to "rgmii", adding
the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps"
overrides.
Notes:
- RZ/G2E does not support TX internal delay handling.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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| #
e0dd4a0a |
| 13-May-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon: Fix USB extal reference
commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 upstream
The USB extal clock reference isn't associated to a crystal, it's
associated to a progr
arm64: dts: renesas: beacon: Fix USB extal reference
commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 upstream
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2_clksel. Since usb_extal is referenced by the versaclock,
reference it here so the usb2_clksel can get the proper clock speed
of 50MHz.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| #
104463e0 |
| 28-Jan-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: beacon: Fix EEPROM compatible value
[ Upstream commit 74477936a828a7c91a61ba7e625b7ce2299c8c98 ]
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-
arm64: dts: renesas: beacon: Fix EEPROM compatible value
[ Upstream commit 74477936a828a7c91a61ba7e625b7ce2299c8c98 ]
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'
Fix this by dropping the bogus "at" prefix.
Fixes: a1d8a344f1ca0709 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
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| #
072552f9 |
| 13-Dec-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon kit: Fix choppy Bluetooth Audio
[ Upstream commit db030c5a9658846a42fbed4d43a8b5f28a2d7ab7 ]
The Bluetooth chip is capable of operating at 4Mbps, but the
max-speed setti
arm64: dts: renesas: beacon kit: Fix choppy Bluetooth Audio
[ Upstream commit db030c5a9658846a42fbed4d43a8b5f28a2d7ab7 ]
The Bluetooth chip is capable of operating at 4Mbps, but the
max-speed setting was on the UART node instead of the Bluetooth
node, so the chip didn't operate at the correct speed resulting
in choppy audio. Fix this by setting the max-speed in the proper
node.
Fixes: a1d8a344f1ca ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201213183759.223246-3-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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|
Revision tags: v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9 |
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| #
a1d8a344 |
| 15-Jul-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200715140622.1295370-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
e4da0e00 |
| 19-Aug-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
[ Upstream commit a5200e63af57d05ed8bf0ffd9a6ffefc40e01e89 ]
Some EtherAVB variants support internal clock del
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
[ Upstream commit a5200e63af57d05ed8bf0ffd9a6ffefc40e01e89 ]
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).
Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This was wrong, as these are meant solely for the
PHY, not for the MAC. Hence properties were introduced for explicit
configuration of these delays.
Convert the RZ/G2 DTS files from the old to the new scheme:
- Add default "rx-internal-delay-ps" and "tx-internal-delay-ps"
properties to the SoC .dtsi files, to be overridden by board files
where needed,
- Convert board files from "rgmii-*id" PHY modes to "rgmii", adding
the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps"
overrides.
Notes:
- RZ/G2E does not support TX internal delay handling.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
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| #
e0dd4a0a |
| 13-May-2021 |
Adam Ford <aford173@gmail.com> |
arm64: dts: renesas: beacon: Fix USB extal reference
commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 upstream
The USB extal clock reference isn't associated to a crystal, it's
a
arm64: dts: renesas: beacon: Fix USB extal reference
commit 56bc54496f5d6bc638127bfc9df3742cbf0039e7 upstream
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2_clksel. Since usb_extal is referenced by the versaclock,
reference it here so the usb2_clksel can get the proper clock speed
of 50MHz.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210513114617.30191-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|