arm/mach-kirkwood/cpu.c

1 // SPDX-License-Identifier: GPL-2.0+
5  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
21 	writel(readl(&cpureg->rstoutn_mask) | (1 << 2),  in reset_cpu()
22 		&cpureg->rstoutn_mask);  in reset_cpu()
23 	writel(readl(&cpureg->sys_soft_rst) | 1,  in reset_cpu()
24 		&cpureg->sys_soft_rst);  in reset_cpu()
31  * Must be programmed from LSB to MSB as sequence of ones followed by
34  * NOTE: A value of 0x0 specifies 64-KByte size.
50  * kw_config_adr_windows - Configure address Windows
59  * Mbus-L to Mbus Bridge Registers Configuration.
106 	/* Window 6-7: Disabled */  in kw_config_adr_windows()
116  * Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
119  * or factory reset. Upon a long reset assertion that is greater than a
120  * pre-configured environment variable value for sysrstdelay,
122  * The counter is based on the 25-MHz reference clock (40ns)
123  * It is a 29-bit counter, yielding a maximum counting duration of
189 		return -1;  in print_cpuinfo()
228 	writel(readl(&cpureg->l2_cfg) | 0x18, &cpureg->l2_cfg);  in arch_cpu_init()
248 	 * and if u-boot is build without network support, network may fail at OS level  in arch_cpu_init()
261 	reg = readl(&cpureg->ctrl_stat);  in arch_cpu_init()
263 	writel(reg, &cpureg->ctrl_stat);  in arch_cpu_init()
288 	/* Disable L2C pre fetch - Set bit 24 */  in arch_misc_init()
290 	/* enable L2C - Set bit 22 */  in arch_misc_init()
299 	/* checks and execute resset to factory event */  in arch_misc_init()